Searched refs:hasV6Ops (Results 1 – 9 of 9) sorted by relevance
141 return hasV6Ops() && hasARMOps() && !isTargetWindows(); in isXRaySupported()399 if (!hasV6Ops()) in useFastISel()
536 bool hasV6Ops() const { return HasV6Ops; } in hasV6Ops() function592 return HasDataBarrier || (hasV6Ops() && !isThumb()); in hasAnyDataBarrier()
50 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) in copyPhysReg()
2692 bool hasV6Ops = Subtarget->hasV6Ops(); in ARMEmitIntExt() local2696 bool isSingleInstr = isSingleInstrTbl[Bitness][isThumb2][hasV6Ops][isZExt]; in ARMEmitIntExt()
824 if (Subtarget->isThumb1Only() || !Subtarget->hasV6Ops() in ARMTargetLowering()866 if (!Subtarget->hasV6Ops()) in ARMTargetLowering()1026 if (!Subtarget->hasV6Ops()) { in ARMTargetLowering()1178 if (Subtarget->hasV6Ops()) in ARMTargetLowering()1449 PrefAlign = (Subtarget->hasV6Ops() && !Subtarget->isMClass() ? 8 : 4); in shouldAlignPointerArgs()3416 assert(Subtarget->hasV6Ops() && !Subtarget->isThumb() && in LowerATOMIC_FENCE()10224 if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP()) in AddCombineTo64bitUMAAL()10272 if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP()) in PerformUMLALCombine()10848 if (!Subtarget->hasV6Ops() || in PerformORCombineToSMULWBT()13734 if (!Subtarget->hasV6Ops()) in ExpandInlineAsm()[all …]
730 !STI->hasV6Ops()) { in CreateLoadStoreMulti()2148 unsigned ReqAlign = STI->hasV6Ops() in CanFormLdStDWord()
2831 Subtarget->hasV6Ops() ? ARM::UMLAL : ARM::UMLALv5, dl, in Select()2850 Subtarget->hasV6Ops() ? ARM::SMLAL : ARM::SMLALv5, dl, in Select()2856 if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP()) in Select()
228 def HasV6 : Predicate<"Subtarget->hasV6Ops()">,230 def NoV6 : Predicate<"!Subtarget->hasV6Ops()">;
454 bool hasV6Ops() const { in hasV6Ops() function in __anonb936c2650111::ARMAsmParser9119 else if (Opc == ARM::tMOVr && !hasV6Ops() && in checkTargetMatchPredicate()