Lines Matching refs:hasV6Ops

824   if (Subtarget->isThumb1Only() || !Subtarget->hasV6Ops()  in ARMTargetLowering()
866   if (!Subtarget->hasV6Ops())  in ARMTargetLowering()
1026   if (!Subtarget->hasV6Ops()) {  in ARMTargetLowering()
1178   if (Subtarget->hasV6Ops())  in ARMTargetLowering()
1449   PrefAlign = (Subtarget->hasV6Ops() && !Subtarget->isMClass() ? 8 : 4);  in shouldAlignPointerArgs()
3416     assert(Subtarget->hasV6Ops() && !Subtarget->isThumb() &&  in LowerATOMIC_FENCE()
4417   if (((!Subtarget->isThumb() && Subtarget->hasV6Ops()) || Subtarget->isThumb2()) &&  in LowerSELECT_CC()
10177   if (Subtarget->hasV6Ops() && Subtarget->hasDSP() && Subtarget->useMulOps() &&  in AddCombineTo64bitMLAL()
10224   if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP())  in AddCombineTo64bitUMAAL()
10272   if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP())  in PerformUMLALCombine()
10848   if (!Subtarget->hasV6Ops() ||  in PerformORCombineToSMULWBT()
12404   if (N->getOpcode() == ISD::SRL && VT == MVT::i32 && ST->hasV6Ops()) {  in PerformShiftCombine()
13734   if (!Subtarget->hasV6Ops())  in ExpandInlineAsm()
14480     if (Subtarget->hasV6Ops() && !Subtarget->isThumb()) {  in makeDMB()