| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3579 return DAG.getVectorShuffle(VT, dl, V1, V2, Mask); in getMOVL() 5659 return DAG.getVectorShuffle(VT, dl, V1, V2, Mask); in getUnpackl() 5667 return DAG.getVectorShuffle(VT, dl, V1, V2, Mask); in getUnpackh() 10388 return DAG.getVectorShuffle( in lowerVectorShuffleAsBlend() 12066 return DAG.getVectorShuffle( in lowerVectorShuffleAsPermuteAndUnpack() 20386 Curr = DAG.getVectorShuffle(InVT, dl, In, In, Mask); in LowerEXTEND_VECTOR_INREG() 23824 SDValue Odd0 = DAG.getVectorShuffle(VT, dl, A, A, in LowerMULH() 23827 SDValue Odd1 = DAG.getVectorShuffle(VT, dl, B, B, in LowerMULH() 23919 return DAG.getVectorShuffle(VT, dl, Lo, Hi, in LowerMULH() 24482 return DAG.getVectorShuffle(VT, dl, R0, R1, {0, 3}); in LowerShift() [all …]
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 913 DAG.getVectorShuffle(SrcVT, DL, Src, DAG.getUNDEF(SrcVT), ShuffleMask)); in ExpandANY_EXTEND_VECTOR_INREG() 964 DAG.getVectorShuffle(SrcVT, DL, Zero, Src, ShuffleMask)); in ExpandZERO_EXTEND_VECTOR_INREG() 988 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT), ShuffleMask); in ExpandBSWAP() 1016 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT), in ExpandBITREVERSE()
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| H A D | LegalizeDAG.cpp | 254 return DAG.getVectorShuffle(NVT, dl, N1, N2, Mask); in ShuffleWithNarrowerEltType() 268 return DAG.getVectorShuffle(NVT, dl, N1, N2, NewMask); in ShuffleWithNarrowerEltType() 402 return DAG.getVectorShuffle(Vec.getValueType(), dl, Vec, ScVec, ShufOps); in ExpandINSERT_VECTOR_ELT() 1835 Shuffle = DAG.getVectorShuffle(VT, dl, IntermedVals[i].first, in ExpandBVWithShuffles() 1868 Res = DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec); in ExpandBVWithShuffles() 1977 return DAG.getVectorShuffle(VT, dl, Vec1, Vec2, ShuffleVec); in ExpandBUILD_VECTOR()
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| H A D | DAGCombiner.cpp | 3961 return DAG.getVectorShuffle(VT, DL, Logic, ShOp, SVN0->getMask()); in hoistLogicOpWithSameOpcodeHands() 3974 return DAG.getVectorShuffle(VT, DL, ShOp, Logic, SVN0->getMask()); in hoistLogicOpWithSameOpcodeHands() 10313 return DAG.getVectorShuffle(VT, SDLoc(N), SV0, SV1, NewMask); in visitBITCAST() 16187 SDValue Shuffle = DAG.getVectorShuffle(InVT1, DL, VecIn1, VecIn2, Mask); in createBuildVecShuffle() 16741 return DAG.getVectorShuffle(VT, SDLoc(N), DAG.getBitcast(VT, SV0), in combineConcatVectorOfExtracts() 17481 return DAG.getVectorShuffle(Splat->getValueType(0), SDLoc(Splat), in combineShuffleOfSplat() 17607 return DAG.getVectorShuffle(VT, SDLoc(N), N0, N1, NewMask); in visitVECTOR_SHUFFLE() 17890 return DAG.getVectorShuffle(VT, SDLoc(N), SV0, SV1, Mask); in visitVECTOR_SHUFFLE() 17923 Val = DAG.getVectorShuffle(InVecT, SDLoc(N), InVec, in visitSCALAR_TO_VECTOR() 18152 return DAG.getBitcast(VT, DAG.getVectorShuffle(ClearVT, DL, in XformToShuffleWithZero() [all …]
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| H A D | LegalizeVectorTypes.cpp | 1152 InHi = DAG.getVectorShuffle(InLoVT, dl, InLo, DAG.getUNDEF(InLoVT), SplitHi); in SplitVecRes_ExtVecInRegOp() 1665 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, Ops); in SplitVecRes_VECTOR_SHUFFLE() 3187 return DAG.getVectorShuffle(WidenVT, dl, in WidenVecRes_CONCAT_VECTORS() 3630 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, NewMask); in WidenVecRes_VECTOR_SHUFFLE()
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| H A D | SelectionDAGBuilder.cpp | 3225 setValue(&I, DAG.getVectorShuffle(VT, DL, Src1, Src2, Mask)); in visitShuffleVector() 3303 SDValue Result = DAG.getVectorShuffle(PaddedVT, DL, Src1, Src2, MappedOps); in visitShuffleVector() 3370 setValue(&I, DAG.getVectorShuffle(VT, DL, Src1, Src2, MappedOps)); in visitShuffleVector()
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| H A D | SelectionDAG.cpp | 1546 SDValue SelectionDAG::getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1, in getVectorShuffle() function in SelectionDAG 1726 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, MaskVec); in getCommutedVectorShuffle()
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| H A D | LegalizeIntegerTypes.cpp | 3677 return DAG.getVectorShuffle(OutVT, dl, V0, V1, NewMask); in PromoteIntRes_VECTOR_SHUFFLE()
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| H A D | TargetLowering.cpp | 1767 TLO.DAG.getVectorShuffle(VT, DL, Op.getOperand(0), in SimplifyDemandedVectorElts()
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 319 return DAG.getVectorShuffle(OpTy, dl, Op0, Op1, Mask); in getByteShuffle() 337 return DAG.getVectorShuffle(ResTy, dl, opCastElem(Op0, MVT::i8, DAG), in getByteShuffle() 465 SDValue S = DAG.getVectorShuffle(ExtTy, dl, ExtVec, in buildHvxVectorReg() 520 SDValue S = DAG.getVectorShuffle(ByteTy, dl, T, DAG.getUNDEF(ByteTy), Mask); in createHvxPrefixPred() 831 SDValue ShuffV = DAG.getVectorShuffle(ByteTy, dl, ByteVec, Undef, Mask); in extractHvxSubvectorPred() 857 SDValue ShuffV = DAG.getVectorShuffle(ByteTy, dl, ByteVec, Undef, Mask); in extractHvxSubvectorPred()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 727 SDValue getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1, SDValue N2,
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 7338 SDValue Arrange = DAG.getVectorShuffle(WideVT, dl, Wide, ShuffleSrc2, ShuffV); in LowerINT_TO_FPVector() 7826 SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, LHS, RHS, Ops); in BuildVSLDOI() 8275 SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, OpLHS, OpRHS, ShufIdxs); in GeneratePerfectShuffle() 9565 return DAG.getVectorShuffle(MVT::v16i8, dl, OddParts, EvenParts, Ops); in LowerMUL() 9567 return DAG.getVectorShuffle(MVT::v16i8, dl, EvenParts, OddParts, Ops); in LowerMUL() 12136 return DAG.getVectorShuffle(N->getValueType(0), dl, Load, in combineBVOfConsecutiveLoads() 12166 DAG.getVectorShuffle(Input.getValueType(), dl, Input, in addShuffleForVecExtend()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 6117 SDValue Shuffle = DAG.getVectorShuffle(ShuffleVT, dl, ShuffleOps[0], in ReconstructShuffle() 9483 DAG.getVectorShuffle( in performConcatVectorsCombine() 11111 SDValue Mask = DAG.getVectorShuffle(CCVT, DL, SetCC, SetCC, DUPMask); in performSelectCombine()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6775 SDValue Shuffle = DAG.getVectorShuffle(ShuffleVT, dl, ShuffleOps[0], in ReconstructShuffle() 11555 return DAG.getVectorShuffle(VT, SDLoc(N), NewConcat, in PerformVECTOR_SHUFFLECombine() 11986 SDValue Shuff = DAG.getVectorShuffle(WideVecVT, DL, WideVec, in PerformSTORECombine()
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| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 2437 Op = DAG.getVectorShuffle(MVT::v4f32, DL, Op, DAG.getUNDEF(MVT::v4f32), Mask); in expandV4F32ToV2F64()
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