| /freebsd-12.1/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 885 MVT SimpleVT = LoadedVT.getSimpleVT(); in tryLoad() 1023 MVT SimpleVT = LoadedVT.getSimpleVT(); in tryLoadVector() 1076 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLoadVector() 1103 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLoadVector() 1320 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLDGLDU() 1331 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLDGLDU() 1343 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLDGLDU() 1352 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLDGLDU() 1743 MVT SimpleVT = StoreVT.getSimpleVT(); in tryStore() 1901 MVT ScalarVT = StoreVT.getSimpleVT().getScalarType(); in tryStoreVector() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 242 DstTy.getSimpleVT(), in getCastInstrCost() 243 SrcTy.getSimpleVT())) in getCastInstrCost() 272 DstTy.getSimpleVT(), in getCastInstrCost() 273 SrcTy.getSimpleVT())) in getCastInstrCost() 303 ISD, DstTy.getSimpleVT(), in getCastInstrCost() 304 SrcTy.getSimpleVT())) in getCastInstrCost() 322 DstTy.getSimpleVT(), in getCastInstrCost() 323 SrcTy.getSimpleVT())) in getCastInstrCost() 371 SelCondTy.getSimpleVT(), in getCmpSelInstrCost() 372 SelValTy.getSimpleVT())) in getCmpSelInstrCost()
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| H A D | ARMFastISel.cpp | 650 MVT VT = CEVT.getSimpleVT(); in fastMaterializeConstant() 697 VT = evt.getSimpleVT(); in isTypeLegal() 1357 MVT SrcVT = SrcEVT.getSimpleVT(); in ARMEmitCmp() 1561 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP() 1803 MVT VT = FPVT.getSimpleVT(); in SelectBinaryFPOp() 2148 MVT RVVT = RVEVT.getSimpleVT(); in SelectRet() 2203 return ARMMaterializeGV(GV, LCREVT.getSimpleVT()); in getLibcallReg() 2766 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIntExt() 2767 MVT DestVT = DestEVT.getSimpleVT(); in SelectIntExt() 3052 switch (ArgVT.getSimpleVT().SimpleTy) { in fastLowerArguments()
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| H A D | ARMISelDAGToDAG.cpp | 1436 LoadedVT.getSimpleVT().SimpleTy != MVT::i32) in tryT1IndexedLoad() 1471 switch (LoadedVT.getSimpleVT().SimpleTy) { in tryT2IndexedLoad() 1762 switch (VT.getSimpleVT().SimpleTy) { in SelectVLD() 1904 switch (VT.getSimpleVT().SimpleTy) { in SelectVST() 2071 switch (VT.getSimpleVT().SimpleTy) { in SelectVLDSTLane() 2190 switch (VT.getSimpleVT().SimpleTy) { in SelectVLDDup() 3030 switch (VT.getSimpleVT().SimpleTy) { in Select() 3053 switch (VT.getSimpleVT().SimpleTy) { in Select() 3076 switch (VT.getSimpleVT().SimpleTy) { in Select()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 372 MVT VT = RealVT.getSimpleVT(); in getRegForValue() 616 CI->getZExtValue(), VT.getSimpleVT()); in selectBinaryOp() 664 unsigned ResultReg = fastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(), in selectBinaryOp() 1518 unsigned ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), in selectCast() 1545 MVT SrcVT = SrcEVT.getSimpleVT(); in selectBitCast() 1546 MVT DstVT = DstEVT.getSimpleVT(); in selectBitCast() 1724 unsigned ResultReg = fastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), ISD::FNEG, in selectFNeg() 1739 unsigned IntReg = fastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), in selectFNeg() 1745 IntVT.getSimpleVT(), ISD::XOR, IntReg, /*IsKill=*/true, in selectFNeg() 1750 ResultReg = fastEmit_r(IntVT.getSimpleVT(), VT.getSimpleVT(), ISD::BITCAST, in selectFNeg() [all …]
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| H A D | SelectionDAG.cpp | 874 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr; in RemoveNodeFromCSEMaps() 1485 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= in getValueType() 1487 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); in getValueType() 2052 MVT CompVT = N1.getValueType().getSimpleVT(); in FoldSetCC() 5063 assert(VT.getSimpleVT() <= N1.getSimpleValueType() && in getNode() 5073 if (VT.getSimpleVT() == N1.getSimpleValueType()) in getNode() 5338 if (VT.getSimpleVT() == N2.getSimpleValueType()) in getNode() 5585 TLI.isSafeMemOpType(NewVT.getSimpleVT())) in FindOptimalMemOpLowering() 5601 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT())); in FindOptimalMemOpLowering() 8708 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && in getValueTypeList() [all …]
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 397 MVT LoadMVT = LoadVT.getSimpleVT(); in isLoadBitCastBeneficial() 805 return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op]; in getOperationAction() 1001 unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy; in getLoadExtAction() 1002 unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy; in getLoadExtAction() 1026 unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy; in getTruncStoreAction() 1027 unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy; in getTruncStoreAction() 1164 return getValueType(DL, Ty, AllowUnknown).getSimpleVT(); 1181 assert((unsigned)VT.getSimpleVT().SimpleTy < in getRegisterType() 1183 return RegisterTypeForVT[VT.getSimpleVT().SimpleTy]; in getRegisterType() 1209 assert((unsigned)VT.getSimpleVT().SimpleTy < in getNumRegisters() [all …]
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| H A D | TargetCallingConv.h | 157 VT = vt.getSimpleVT(); in InputArg() 196 VT = vt.getSimpleVT(); in OutputArg()
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| H A D | ValueTypes.h | 102 MVT EltTy = getSimpleVT().getVectorElementType(); in changeVectorElementTypeToInteger() 253 MVT getSimpleVT() const { in getSimpleVT() function
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| /freebsd-12.1/contrib/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelDAGToDAG.cpp | 309 switch (VT.getSimpleVT().SimpleTy) { in isValidIndexedLoad() 334 MVT VT = LD->getMemoryVT().getSimpleVT(); in tryIndexedLoad() 363 MVT VT = LD->getMemoryVT().getSimpleVT(); in tryIndexedBinOp()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 216 MVT ValVT = ElemVT.getSimpleVT(); in lowerFormalArguments() 222 MVT ValVT = ValEVT.getSimpleVT(); in lowerFormalArguments()
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonTargetTransformInfo.cpp | 55 if (ST.isHVXVectorType(VecVT.getSimpleVT())) in isTypeForHVX() 57 auto Action = TLI.getPreferredVectorAction(VecVT.getSimpleVT()); in isTypeForHVX()
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| H A D | HexagonISelLowering.h | 368 return Op.getValueType().getSimpleVT(); in ty() 371 return { Ops.first.getValueType().getSimpleVT(), in ty() 372 Ops.second.getValueType().getSimpleVT() }; in ty()
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| H A D | HexagonISelDAGToDAG.cpp | 82 switch (LoadedVT.getSimpleVT().SimpleTy) { in SelectIndexedLoad() 478 switch (StoredVT.getSimpleVT().SimpleTy) { in SelectIndexedStore() 772 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectVAlign() 827 MVT OpTy = Op.getValueType().getSimpleVT(); in SelectTypecast() 834 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectP2D() 842 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectD2P() 851 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectV2Q() 862 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectQ2V() 1159 if (!OpVT.isSimple() || OpVT.getSimpleVT() != MVT::i1) in ppHoistZextI1() 1166 if (!UVT.isSimple() || !UVT.isInteger() || UVT.getSimpleVT() == MVT::i1) in ppHoistZextI1()
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| H A D | HexagonISelDAGToDAGHVX.cpp | 673 : InpNode(Inp), InpTy(Inp->getValueType(0).getSimpleVT()) {} in ResultStack() 1009 MVT OpTy = Op.getValueType().getSimpleVT(); in materialize() 1391 MVT LegalTy = Lower.getTypeToTransformTo(Ctx, ElemTy).getSimpleVT(); in scalarizeShuffle() 2007 MVT ResTy = N->getValueType(0).getSimpleVT(); in selectShuffle() 2079 MVT Ty = N->getValueType(0).getSimpleVT(); in selectRor()
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| H A D | HexagonISelLoweringHVX.cpp | 246 MVT CastTy = tyVector(Vec.getValueType().getSimpleVT(), ElemTy); in opCastElem() 281 if (ElemIdx.getValueType().getSimpleVT() != MVT::i32) in convertToByteIndex() 1447 MVT Ty = typeSplit(N->getVT().getSimpleVT()).first; in SplitHvxPairOp() 1477 MVT MemTy = BN->getMemoryVT().getSimpleVT(); in SplitHvxMemOp()
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| /freebsd-12.1/contrib/llvm/lib/Target/AVR/ |
| H A D | AVRISelDAGToDAG.cpp | 108 MVT VT = cast<MemSDNode>(Op)->getMemoryVT().getSimpleVT(); in SelectAddr() 125 MVT VT = LD->getMemoryVT().getSimpleVT(); in selectIndexedLoad() 372 MVT VT = LD->getMemoryVT().getSimpleVT(); in select()
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| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 454 MVT VT = CEVT.getSimpleVT(); in fastMaterializeConstant() 602 VT = evt.getSimpleVT(); in isTypeLegal() 1369 switch (ArgVT.getSimpleVT().SimpleTy) { in fastLowerArguments() 1738 MVT RVVT = RVEVT.getSimpleVT(); in selectRet() 1817 MVT SrcVT = SrcEVT.getSimpleVT(); in selectIntExt() 1818 MVT DestVT = DestEVT.getSimpleVT(); in selectIntExt() 1918 MVT DestVT = DestEVT.getSimpleVT(); in selectDivRem() 1979 MVT Op0MVT = TLI.getValueType(DL, Op0->getType(), true).getSimpleVT(); in selectShift() 2095 MVT VMVT = TLI.getValueType(DL, V->getType(), true).getSimpleVT(); in getRegEnsuringSimpleIntegerWidening()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 298 VT = evt.getSimpleVT(); in isTypeLegal() 333 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitLoad() 509 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore() 681 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore() 721 unsigned RR = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, in X86FastEmitExtend() 1253 SrcReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Op, in X86SelectRet() 1356 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpOpcode() 1379 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpImmediateOpcode() 3675 MVT SVT = SrcVT.getSimpleVT(); in fastSelectInstruction() 3676 MVT DVT = DstVT.getSimpleVT(); in fastSelectInstruction() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 390 DstTy.getSimpleVT(), in getCastInstrCost() 391 SrcTy.getSimpleVT())) in getCastInstrCost() 612 SelCondTy.getSimpleVT(), in getCmpSelInstrCost() 613 SelValTy.getSimpleVT())) in getCmpSelInstrCost()
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| H A D | AArch64FastISel.cpp | 510 MVT VT = CEVT.getSimpleVT(); in fastMaterializeConstant() 956 VT = evt.getSimpleVT(); in isTypeLegal() 1457 MVT VT = EVT.getSimpleVT(); in emitCmp() 2893 emitIntExt(SrcVT.getSimpleVT(), SrcReg, MVT::i32, /*isZExt*/ !Signed); in selectIntToFP() 2953 MVT VT = ArgVT.getSimpleVT().SimpleTy; in fastLowerArguments() 3855 MVT RVVT = RVEVT.getSimpleVT(); in selectRet() 3901 MVT SrcVT = SrcEVT.getSimpleVT(); in selectTrunc() 3902 MVT DestVT = DestEVT.getSimpleVT(); in selectTrunc() 4586 MVT DestVT = DestEVT.getSimpleVT(); in selectRem() 4951 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*IsZExt=*/false); in getRegForGEPIndex()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 738 MVT SVT = VT.getSimpleVT(); in getTypeConversion() 824 MVT NVT = MVT::getVectorVT(EltVT.getSimpleVT(), NumElts); in getTypeConversion() 847 MVT LargerVector = MVT::getVectorVT(EltVT.getSimpleVT(), NumElts); in getTypeConversion() 1298 RegisterVT = RegisterEVT.getSimpleVT(); in getVectorTypeBreakdown() 1529 return std::make_pair(Cost, MTy.getSimpleVT()); in getTypeLegalizationCost() 1536 return std::make_pair(Cost, MTy.getSimpleVT()); in getTypeLegalizationCost()
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 290 VT = Evt.getSimpleVT(); in isTypeLegal() 839 MVT SrcVT = SrcEVT.getSimpleVT(); in PPCEmitCmp() 1083 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP() 1758 MVT RVVT = RVEVT.getSimpleVT(); in SelectRet() 1927 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIntExt() 1928 MVT DestVT = DestEVT.getSimpleVT(); in SelectIntExt() 2253 MVT VT = CEVT.getSimpleVT(); in fastMaterializeConstant()
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| /freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 120 return VT.isSimple() ? VT.getSimpleVT().SimpleTy in getSimpleType() 1129 unsigned Reg = fastEmit_ISD_BITCAST_r(VT.getSimpleVT(), RetVT.getSimpleVT(), in selectBitCast()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 487 switch (RegVT.getSimpleVT().SimpleTy) { in LowerCallArguments() 490 << (unsigned)RegVT.getSimpleVT().SimpleTy << "\n"); in LowerCallArguments()
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