Lines Matching refs:getSimpleVT
372 MVT VT = RealVT.getSimpleVT(); in getRegForValue()
376 VT = TLI.getTypeToTransformTo(V->getContext(), VT).getSimpleVT(); in getRegForValue()
435 Reg = fastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP, IntegerReg, in materializeConstant()
520 IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN, in getRegForGEPIndex()
525 fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN, IdxNIsKill); in getRegForGEPIndex()
615 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, in selectBinaryOp()
616 CI->getZExtValue(), VT.getSimpleVT()); in selectBinaryOp()
648 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
649 Op0IsKill, Imm, VT.getSimpleVT()); in selectBinaryOp()
664 unsigned ResultReg = fastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(), in selectBinaryOp()
1518 unsigned ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), in selectCast()
1545 MVT SrcVT = SrcEVT.getSimpleVT(); in selectBitCast()
1546 MVT DstVT = DstEVT.getSimpleVT(); in selectBitCast()
1724 unsigned ResultReg = fastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), ISD::FNEG, in selectFNeg()
1739 unsigned IntReg = fastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), in selectFNeg()
1745 IntVT.getSimpleVT(), ISD::XOR, IntReg, /*IsKill=*/true, in selectFNeg()
1746 UINT64_C(1) << (VT.getSizeInBits() - 1), IntVT.getSimpleVT()); in selectFNeg()
1750 ResultReg = fastEmit_r(IntVT.getSimpleVT(), VT.getSimpleVT(), ISD::BITCAST, in selectFNeg()
1769 MVT VT = RealVT.getSimpleVT(); in selectExtractValue()