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Searched refs:getOpcode (Results 1 – 25 of 740) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp33 switch (FirstMI->getOpcode()) { in isArithmeticBccPair()
77 switch (FirstMI->getOpcode()) { in isArithmeticCbzPair()
118 switch (SecondMI.getOpcode()) { in isAESPair()
142 switch (FirstMI->getOpcode()) { in isCryptoEORPair()
191 switch (SecondMI.getOpcode()) { in isAddressLdStPair()
219 switch (FirstMI->getOpcode()) { in isAddressLdStPair()
240 switch (FirstMI->getOpcode()) { in isCCSelectPair()
258 switch (FirstMI->getOpcode()) { in isCCSelectPair()
279 switch (SecondMI.getOpcode()) { in isArithmeticLogicPair()
319 switch (FirstMI->getOpcode()) { in isArithmeticLogicPair()
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/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h183 inline unsigned getOpcode() const;
1112 return Node->getOpcode();
1383 unsigned Op = getOpcode();
2071 return N->getOpcode() == ISD::LOAD ||
2072 N->getOpcode() == ISD::STORE;
2100 return N->getOpcode() == ISD::LOAD;
2131 return N->getOpcode() == ISD::STORE;
2157 N->getOpcode() == ISD::MSTORE;
2183 return N->getOpcode() == ISD::MLOAD;
2218 return N->getOpcode() == ISD::MSTORE;
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/freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/
H A DWebAssemblyUtilities.cpp29 switch (MI.getOpcode()) { in isArgument()
57 switch (MI.getOpcode()) { in isCopy()
75 switch (MI.getOpcode()) { in isTee()
106 switch (MI.getOpcode()) { in isCallDirect()
138 switch (MI.getOpcode()) { in isCallIndirect()
170 switch (MI.getOpcode()) { in getCalleeOpNo()
227 switch (MI.getOpcode()) { in isMarker()
247 switch (MI.getOpcode()) { in isThrow()
259 switch (MI.getOpcode()) { in isRethrow()
271 switch (MI.getOpcode()) { in isCatch()
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/freebsd-12.1/contrib/llvm/include/llvm/IR/
H A DInstruction.h130 bool isUnaryOp() const { return isUnaryOp(getOpcode()); }
131 bool isBinaryOp() const { return isBinaryOp(getOpcode()); }
132 bool isIntDivRem() const { return isIntDivRem(getOpcode()); }
133 bool isShift() { return isShift(getOpcode()); }
134 bool isCast() const { return isCast(getOpcode()); }
137 return isExceptionalTerminator(getOpcode());
164 return getOpcode() == Shl || getOpcode() == LShr;
169 return getOpcode() == AShr;
179 return isBitwiseLogicOp(getOpcode());
542 switch (getOpcode()) {
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H A DOperator.h41 unsigned getOpcode() const { in getOpcode() function
43 return I->getOpcode(); in getOpcode()
44 return cast<ConstantExpr>(this)->getOpcode(); in getOpcode()
49 static unsigned getOpcode(const Value *V) { in getOpcode() function
51 return I->getOpcode(); in getOpcode()
53 return CE->getOpcode(); in getOpcode()
104 I->getOpcode() == Instruction::Shl; in classof()
370 Opcode = I->getOpcode(); in classof()
372 Opcode = CE->getOpcode(); in classof()
395 return I->getOpcode() == Opc; in classof()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DDelaySlotFiller.cpp118 (MI->getOpcode() == SP::RESTORErr in runOnMachineBasicBlock()
127 (MI->getOpcode() == SP::FCMPS || MI->getOpcode() == SP::FCMPD in runOnMachineBasicBlock()
128 || MI->getOpcode() == SP::FCMPQ)) { in runOnMachineBasicBlock()
179 if (slot->getOpcode() == SP::RET || slot->getOpcode() == SP::TLS_CALL) in findDelayInstr()
182 if (slot->getOpcode() == SP::RETL) { in findDelayInstr()
186 if (J->getOpcode() == SP::RESTORErr in findDelayInstr()
297 switch(MI->getOpcode()) { in insertCallDefsUses()
360 switch (I->getOpcode()) { in needsUnimp()
417 if (OrMI->getOpcode() == SP::ORrr in combineRestoreOR()
422 if (OrMI->getOpcode() == SP::ORri in combineRestoreOR()
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H A DSparcISelDAGToDAG.cpp84 if (Addr.getOpcode() == ISD::TargetExternalSymbol || in SelectADDRri()
85 Addr.getOpcode() == ISD::TargetGlobalAddress || in SelectADDRri()
86 Addr.getOpcode() == ISD::TargetGlobalTLSAddress) in SelectADDRri()
89 if (Addr.getOpcode() == ISD::ADD) { in SelectADDRri()
105 if (Addr.getOperand(0).getOpcode() == SPISD::Lo) { in SelectADDRri()
110 if (Addr.getOperand(1).getOpcode() == SPISD::Lo) { in SelectADDRri()
124 Addr.getOpcode() == ISD::TargetGlobalAddress || in SelectADDRrr()
128 if (Addr.getOpcode() == ISD::ADD) { in SelectADDRrr()
133 Addr.getOperand(1).getOpcode() == SPISD::Lo) in SelectADDRrr()
330 switch (N->getOpcode()) { in Select()
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/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCBranchSelector.cpp164 if (I->getOpcode() == PPC::BCC && !I->getOperand(2).isImm()) in runOnMachineFunction()
166 else if ((I->getOpcode() == PPC::BC || I->getOpcode() == PPC::BCn) && in runOnMachineFunction()
169 else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ || in runOnMachineFunction()
170 I->getOpcode() == PPC::BDZ8 || I->getOpcode() == PPC::BDZ) && in runOnMachineFunction()
209 if (I->getOpcode() == PPC::BCC) { in runOnMachineFunction()
220 } else if (I->getOpcode() == PPC::BC) { in runOnMachineFunction()
223 } else if (I->getOpcode() == PPC::BCn) { in runOnMachineFunction()
226 } else if (I->getOpcode() == PPC::BDNZ) { in runOnMachineFunction()
228 } else if (I->getOpcode() == PPC::BDNZ8) { in runOnMachineFunction()
230 } else if (I->getOpcode() == PPC::BDZ) { in runOnMachineFunction()
[all …]
H A DPPCMIPeephole.cpp143 unsigned Opcode = MI->getOpcode(); in getKnownLeadingZeroCount()
268 switch (MI.getOpcode()) { in simplifyCode()
700 (LiMI->getOpcode() != PPC::LI && LiMI->getOpcode() != PPC::LI8) in simplifyCode()
734 if (LiMI->getOpcode() == PPC::ADDI || LiMI->getOpcode() == PPC::ADDI8) in simplifyCode()
897 (*BII).getOpcode() == PPC::BCC && in eligibleForCompareElimination()
1072 is64bitCmpOp(CMPI1->getOpcode()) != is64bitCmpOp(CMPI2->getOpcode())) in eliminateRedundantCompare()
1080 if (CMPI1->getOpcode() != CMPI2->getOpcode()) { in eliminateRedundantCompare()
1097 CMPI1->getOpcode() == getSignedCmpOpCode(CMPI2->getOpcode())) in eliminateRedundantCompare()
1098 NewOpCode = CMPI1->getOpcode(); in eliminateRedundantCompare()
1100 getSignedCmpOpCode(CMPI1->getOpcode()) == CMPI2->getOpcode()) in eliminateRedundantCompare()
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/freebsd-12.1/contrib/llvm/lib/Target/Lanai/
H A DLanaiISelDAGToDAG.cpp114 if (Addr.getOpcode() == ISD::OR && in selectAddrSls()
115 Addr.getOperand(1).getOpcode() == LanaiISD::SMALL) { in selectAddrSls()
164 if ((Addr.getOpcode() == ISD::TargetExternalSymbol || in selectAddrRiSpls()
165 Addr.getOpcode() == ISD::TargetGlobalAddress)) in selectAddrRiSpls()
193 Addr.getOperand(1).getOpcode() == LanaiISD::SMALL) in selectAddrRiSpls()
215 if (Addr.getOpcode() == ISD::FrameIndex) in selectAddrRr()
219 if ((Addr.getOpcode() == ISD::TargetExternalSymbol || in selectAddrRr()
220 Addr.getOpcode() == ISD::TargetGlobalAddress)) in selectAddrRr()
233 if (Addr.getOperand(0).getOpcode() == LanaiISD::HI || in selectAddrRr()
234 Addr.getOperand(0).getOpcode() == LanaiISD::LO || in selectAddrRr()
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/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DR600EmitClauseMarkers.cpp54 switch (MI.getOpcode()) { in OccupiedDwords()
68 if (TII->isLDSRetInstr(MI.getOpcode())) in OccupiedDwords()
72 TII->isReductionOp(MI.getOpcode())) in OccupiedDwords()
87 if (TII->isALUInstr(MI.getOpcode())) in isALU()
89 if (TII->isVector(MI) || TII->isCubeOp(MI.getOpcode())) in isALU()
91 switch (MI.getOpcode()) { in isALU()
105 switch (MI.getOpcode()) { in IsTrivialInst()
135 if (!TII->isALUInstr(MI.getOpcode()) && MI.getOpcode() != R600::DOT_4) in SubstituteKCacheBank()
141 (TII->isALUInstr(MI.getOpcode()) || MI.getOpcode() == R600::DOT_4) && in SubstituteKCacheBank()
256 if (I->getOpcode() == R600::PRED_X) { in MakeALUClause()
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H A DSIInsertWaitcnts.cpp531 if (Inst.getOpcode() != AMDGPU::DS_APPEND && in updateByEvent()
791 unsigned Opc = MI.getOpcode(); in readsVCCZ()
819 if (MI.getOpcode() == AMDGPU::BUFFER_WBINVL1 || in generateWaitcntInstBefore()
833 else if ((MI.getOpcode() == AMDGPU::S_SENDMSG || in generateWaitcntInstBefore()
840 else if (MI.getOpcode() == SC_FENCE) { in generateWaitcntInstBefore()
916 if (MI.getOpcode() == SC_CALL) { in generateWaitcntInstBefore()
1000 if (MI.getOpcode() == AMDGPU::S_BARRIER && in generateWaitcntInstBefore()
1099 if (TII->isAlwaysGDS(Inst.getOpcode()) || in updateEventWaitcntAfter()
1134 switch (Inst.getOpcode()) { in updateEventWaitcntAfter()
1248 if (Inst.getOpcode() == AMDGPU::S_WAITCNT) { in insertWaitcntInBlock()
[all …]
H A DR600InstrInfo.cpp161 if (isALUInstr(MI.getOpcode())) in canBeConsideredALU()
165 switch (MI.getOpcode()) { in canBeConsideredALU()
185 return isTransOnly(MI.getOpcode()); in isTransOnly()
193 return isVectorOnly(MI.getOpcode()); in isVectorOnly()
240 if (!isALUInstr(MI.getOpcode())) { in readsLDSSrcReg()
615 if (!isALUInstr(MI.getOpcode())) in fitsConstReadLimitations()
689 if (isBranch(I->getOpcode())) in analyzeBranch()
691 if (!isJump(I->getOpcode())) { in analyzeBranch()
817 switch (I->getOpcode()) { in removeBranch()
841 switch (I->getOpcode()) { in removeBranch()
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H A DSIShrinkInstructions.cpp187 int SOPKOpc = AMDGPU::getSOPKOp(MI.getOpcode()); in shrinkScalarCompare()
224 unsigned Opc = MI.getOpcode(); in shrinkScalarLogicOp()
363 MovT.getOpcode() == AMDGPU::COPY); in matchSwap()
386 MovY.getOpcode() != AMDGPU::COPY) || in matchSwap()
415 I->getOpcode() != AMDGPU::COPY) || in matchSwap()
509 if (MI.getOpcode() == AMDGPU::S_NOP && in runOnMachineFunction()
534 if (MI.getOpcode() == AMDGPU::S_ADD_I32 || in runOnMachineFunction()
535 MI.getOpcode() == AMDGPU::S_MUL_I32) { in runOnMachineFunction()
573 if (MI.getOpcode() == AMDGPU::S_MOV_B32) { in runOnMachineFunction()
592 if (MI.getOpcode() == AMDGPU::S_AND_B32 || in runOnMachineFunction()
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H A DR600Packetizer.cpp73 if (!TII->isALUInstr(I->getOpcode()) && !I->isBundle()) in getPreviousVector()
90 int DstIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::dst); in getPreviousVector()
99 if (BI->getOpcode() == R600::DOT4_r600 || in getPreviousVector()
100 BI->getOpcode() == R600::DOT4_eg) { in getPreviousVector()
137 int OperandIdx = TII->getOperandIdx(MI.getOpcode(), Ops[i]); in substitutePV()
172 if (!TII->isALUInstr(MI.getOpcode())) in isSoloInstruction()
174 if (MI.getOpcode() == R600::GROUP_BARRIER) in isSoloInstruction()
178 return TII->isLDSInstr(MI.getOpcode()); in isSoloInstruction()
303 unsigned Op = TII->getOperandIdx(MI->getOpcode(), in addToPacket()
308 TII->getOperandIdx(MI.getOpcode(), R600::OpName::bank_swizzle); in addToPacket()
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H A DGCNHazardRecognizer.cpp93 if (TII.isAlwaysGDS(MI.getOpcode())) in isSendMsgTraceDataOrGDS()
96 switch (MI.getOpcode()) { in isSendMsgTraceDataOrGDS()
107 if (TII.isDS(MI.getOpcode())) { in isSendMsgTraceDataOrGDS()
194 if (isDivFMas(MI->getOpcode())) in PreEmitNoops()
197 if (isRWLane(MI->getOpcode())) in PreEmitNoops()
203 if (isSGetReg(MI->getOpcode())) in PreEmitNoops()
206 if (isSSetReg(MI->getOpcode())) in PreEmitNoops()
209 if (isRFE(MI->getOpcode())) in PreEmitNoops()
277 unsigned Opcode = MI->getOpcode(); in getWaitStatesSince()
300 return isSSetReg(MI->getOpcode()) && IsHazard(MI); in getWaitStatesSinceSetReg()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonNewValueJump.cpp137 if (II->getOpcode() == TargetOpcode::KILL) in INITIALIZE_PASS_DEPENDENCY()
221 if (MII->getOpcode() == TargetOpcode::KILL || in commonChecksToProhibitNewValueJump()
222 MII->getOpcode() == TargetOpcode::PHI || in commonChecksToProhibitNewValueJump()
223 MII->getOpcode() == TargetOpcode::COPY) in commonChecksToProhibitNewValueJump()
230 if (MII->getOpcode() == Hexagon::LDriw_pred || in commonChecksToProhibitNewValueJump()
231 MII->getOpcode() == Hexagon::STriw_pred) in commonChecksToProhibitNewValueJump()
258 switch (MI.getOpcode()) { in canCompareBeNewValueJump()
296 if (def->getOpcode() == TargetOpcode::COPY) in canCompareBeNewValueJump()
348 switch (MI->getOpcode()) { in getNewValueJumpOpcode()
430 switch (MI.getOpcode()) { in isNewValueJumpCandidate()
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/freebsd-12.1/contrib/llvm/lib/Target/ARC/
H A DARCISelDAGToDAG.cpp78 if (Addr.getOpcode() == ARCISD::GAWRAPPER) { in SelectAddrModeImm()
88 if (Addr.getOpcode() == ARCISD::GAWRAPPER) { in SelectAddrModeS9()
92 if (Addr.getOpcode() != ISD::ADD && Addr.getOpcode() != ISD::SUB && in SelectAddrModeS9()
94 if (Addr.getOpcode() == ISD::FrameIndex) { in SelectAddrModeS9()
108 if (Addr.getOpcode() == ISD::SUB) in SelectAddrModeS9()
115 if (Base.getOpcode() == ISD::FrameIndex) { in SelectAddrModeS9()
132 if (Addr.getOpcode() == ARCISD::GAWRAPPER) { in SelectAddrModeFar()
137 if (Addr.getOpcode() == ISD::SUB) in SelectAddrModeFar()
155 if (Addr.getOpcode() == ISD::ADD) { in SelectFrameADDR_ri()
171 switch (N->getOpcode()) { in Select()
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp2139 if (N0.getOpcode() == ISD::SUB && N1.getOpcode() == ISD::SUB) { in visitADD()
2246 V.getOpcode() != ISD::UADDO && V.getOpcode() != ISD::USUBO) in getAsCarry()
4116 if (N0.getOpcode() == ISD::ADD && N1.getOpcode() == ISD::SRL && in visitANDLike()
4747 if (N0.getOpcode() == N1.getOpcode()) in visitAND()
4869 if (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SHL) in MatchBSwapHWordLow()
4871 if (N0.getOpcode() != ISD::SHL || N1.getOpcode() != ISD::SRL) in MatchBSwapHWordLow()
5306 if (N0.getOpcode() == N1.getOpcode()) in visitOR()
5399 if (OppShiftLHS.getOpcode() != ExtractFrom.getOpcode() || in extractShiftForRotate()
5660 if (LHSShift.getOpcode() == RHSShift.getOpcode()) in MatchRotate()
8418 if (N1.getOpcode() == ISD::SHL && N0.getOpcode() != ISD::AND) in CombineZExtLogicopShiftLoad()
[all …]
/freebsd-12.1/contrib/llvm/include/llvm/MC/
H A DMCInstrAnalysis.h39 return Info->get(Inst.getOpcode()).isBranch(); in isBranch()
43 return Info->get(Inst.getOpcode()).isConditionalBranch(); in isConditionalBranch()
47 return Info->get(Inst.getOpcode()).isUnconditionalBranch(); in isUnconditionalBranch()
51 return Info->get(Inst.getOpcode()).isIndirectBranch(); in isIndirectBranch()
55 return Info->get(Inst.getOpcode()).isCall(); in isCall()
59 return Info->get(Inst.getOpcode()).isReturn(); in isReturn()
63 return Info->get(Inst.getOpcode()).isTerminator(); in isTerminator()
/freebsd-12.1/contrib/llvm/tools/clang/lib/StaticAnalyzer/Checkers/
H A DUndefResultChecker.cpp113 << BinaryOperator::getOpcodeStr(B->getOpcode()) in checkPostStmt()
119 if ((B->getOpcode() == BinaryOperatorKind::BO_Shl || in checkPostStmt()
120 B->getOpcode() == BinaryOperatorKind::BO_Shr) && in checkPostStmt()
123 << ((B->getOpcode() == BinaryOperatorKind::BO_Shl) ? "left" in checkPostStmt()
127 } else if ((B->getOpcode() == BinaryOperatorKind::BO_Shl || in checkPostStmt()
128 B->getOpcode() == BinaryOperatorKind::BO_Shr) && in checkPostStmt()
132 << ((B->getOpcode() == BinaryOperatorKind::BO_Shl) ? "left" in checkPostStmt()
149 } else if (B->getOpcode() == BinaryOperatorKind::BO_Shl && in checkPostStmt()
154 } else if (B->getOpcode() == BinaryOperatorKind::BO_Shl && in checkPostStmt()
170 << BinaryOperator::getOpcodeStr(B->getOpcode()) in checkPostStmt()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64ExternalSymbolizer.cpp93 } else if (MI.getOpcode() == AArch64::ADRP) { in tryAddingSymbolicOperand()
106 } else if (MI.getOpcode() == AArch64::ADDXri || in tryAddingSymbolicOperand()
107 MI.getOpcode() == AArch64::LDRXui || in tryAddingSymbolicOperand()
108 MI.getOpcode() == AArch64::LDRXl || in tryAddingSymbolicOperand()
109 MI.getOpcode() == AArch64::ADR) { in tryAddingSymbolicOperand()
110 if (MI.getOpcode() == AArch64::ADDXri) in tryAddingSymbolicOperand()
112 else if (MI.getOpcode() == AArch64::LDRXui) in tryAddingSymbolicOperand()
114 if (MI.getOpcode() == AArch64::LDRXl) { in tryAddingSymbolicOperand()
118 } else if (MI.getOpcode() == AArch64::ADR) { in tryAddingSymbolicOperand()
127 MI.getOpcode() == AArch64::ADDXri ? 0x91000000: 0xF9400000; in tryAddingSymbolicOperand()
/freebsd-12.1/contrib/llvm/lib/Transforms/Vectorize/
H A DVPlanSLP.cpp93 unsigned Opcode = OriginalInstr->getOpcode(); in areVectorizable()
97 return I->getOpcode() == Opcode && in areVectorizable()
127 if (VPI->getOpcode() == Instruction::Load && in areVectorizable()
173 cast<VPInstruction>(Values[0])->getOpcode()); in areCommutative()
181 switch (VPI->getOpcode()) { in getOperands()
200 return cast<VPInstruction>(V)->getOpcode() != Opcode; in getOpcode()
210 if (A->getOpcode() != B->getOpcode()) in areConsecutiveOrMatch()
213 if (A->getOpcode() != Instruction::Load && in areConsecutiveOrMatch()
214 A->getOpcode() != Instruction::Store) in areConsecutiveOrMatch()
390 unsigned ValuesOpcode = getOpcode(Values).getValue(); in buildGraph()
[all …]
/freebsd-12.1/contrib/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp50 if (MI.getOpcode() != TargetOpcode::COPY) in tryCombineCopy()
173 if (MI.getOpcode() != TargetOpcode::G_LOAD && in tryCombineExtendingLoads()
174 MI.getOpcode() != TargetOpcode::G_SEXTLOAD && in tryCombineExtendingLoads()
175 MI.getOpcode() != TargetOpcode::G_ZEXTLOAD) in tryCombineExtendingLoads()
190 unsigned PreferredOpcode = MI.getOpcode() == TargetOpcode::G_LOAD in tryCombineExtendingLoads()
197 if (UseMI.getOpcode() == TargetOpcode::G_SEXT || in tryCombineExtendingLoads()
198 UseMI.getOpcode() == TargetOpcode::G_ZEXT || in tryCombineExtendingLoads()
199 UseMI.getOpcode() == TargetOpcode::G_ANYEXT) { in tryCombineExtendingLoads()
202 UseMI.getOpcode(), &UseMI); in tryCombineExtendingLoads()
233 if (UseMI->getOpcode() == Preferred.ExtendOpcode || in tryCombineExtendingLoads()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.cpp111 if (LastInst.getOpcode() == NVPTX::GOTO) { in analyzeBranch()
114 } else if (LastInst.getOpcode() == NVPTX::CBranch) { in analyzeBranch()
132 if (SecondLastInst.getOpcode() == NVPTX::CBranch && in analyzeBranch()
133 LastInst.getOpcode() == NVPTX::GOTO) { in analyzeBranch()
142 if (SecondLastInst.getOpcode() == NVPTX::GOTO && in analyzeBranch()
143 LastInst.getOpcode() == NVPTX::GOTO) { in analyzeBranch()
162 if (I->getOpcode() != NVPTX::GOTO && I->getOpcode() != NVPTX::CBranch) in removeBranch()
173 if (I->getOpcode() != NVPTX::CBranch) in removeBranch()

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