Home
last modified time | relevance | path

Searched refs:getExtensionType (Results 1 – 25 of 41) sorted by relevance

12

/freebsd-12.1/contrib/llvm/tools/clang/lib/Driver/ToolChains/Arch/
H A DRISCV.cpp35 static StringRef getExtensionType(StringRef Ext) { in getExtensionType() function
131 StringRef Type = getExtensionType(Ext); in getExtensionFeatures()
192 StringRef Desc = getExtensionTypeDesc(getExtensionType(Ext)); in getExtensionFeatures()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h2092 ISD::LoadExtType getExtensionType() const {
2174 ISD::LoadExtType getExtensionType() const {
2418 return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD &&
2425 cast<LoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD;
2431 cast<LoadSDNode>(N)->getExtensionType() == ISD::EXTLOAD;
2437 cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD;
2443 cast<LoadSDNode>(N)->getExtensionType() == ISD::ZEXTLOAD;
/freebsd-12.1/contrib/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp129 if ((LD->getExtensionType() != ISD::NON_EXTLOAD) || in selectIndexedLoad()
174 if (LD->getExtensionType() != ISD::NON_EXTLOAD || AM != ISD::POST_INC) { in selectIndexedProgMemLoad()
H A DAVRISelLowering.cpp784 if (LD->getExtensionType() != ISD::NON_EXTLOAD) in getPreIndexedAddressParts()
839 if (LD->getExtensionType() != ISD::NON_EXTLOAD) in getPostIndexedAddressParts()
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp243 ISD::LoadExtType ExtType = LD->getExtensionType(); in LegalizeOp()
247 switch (TLI.getLoadExtAction(LD->getExtensionType(), LD->getValueType(0), in LegalizeOp()
602 ISD::LoadExtType ExtType = LD->getExtensionType(); in ExpandLoad()
H A DDAGCombiner.cpp4292 if (Load->getExtensionType() != ISD::NON_EXTLOAD && in isLegalNarrowLdSt()
4682 switch (Load->getExtensionType()) { in visitAND()
4697 if (Load->getExtensionType() == ISD::EXTLOAD) { in visitAND()
5862 return L->getExtensionType() == ISD::ZEXTLOAD in calculateByteProvider()
9378 if (LN0->getExtensionType() == ISD::SEXTLOAD) in ReduceLoadWidth()
12993 switch (LD->getExtensionType()) { in extendLoadedValueToExtension()
18303 (LLD->getExtensionType() != RLD->getExtensionType() && in SimplifySelectOps()
18305 LLD->getExtensionType() != ISD::EXTLOAD && in SimplifySelectOps()
18306 RLD->getExtensionType() != ISD::EXTLOAD) || in SimplifySelectOps()
18396 if (LLD->getExtensionType() == ISD::NON_EXTLOAD) { in SimplifySelectOps()
[all …]
H A DLegalizeFloatTypes.cpp639 if (L->getExtensionType() == ISD::NON_EXTLOAD) { in SoftenFloatRes_LOAD()
640 NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), NVT, dl, in SoftenFloatRes_LOAD()
1443 Hi = DAG.getExtLoad(LD->getExtensionType(), dl, NVT, Chain, Ptr, in ExpandFloatRes_LOAD()
2116 SDValue newL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), IVT, in PromoteFloatRes_LOAD()
H A DSelectionDAGDumper.cpp627 switch (LD->getExtensionType()) { in print_details()
H A DTargetLowering.cpp2306 if (LN0->getExtensionType() == ISD::ZEXTLOAD) { in SimplifySetCC()
2309 } else if (LN0->getExtensionType() == ISD::SEXTLOAD) { in SimplifySetCC()
2388 if (Lod->getExtensionType() != ISD::NON_EXTLOAD) in SimplifySetCC()
4745 ISD::LoadExtType ExtType = LD->getExtensionType(); in scalarizeVectorLoad()
4943 Load = DAG.getExtLoad(LD->getExtensionType(), dl, VT, TF, StackBase, in expandUnalignedLoad()
4963 ISD::LoadExtType HiExtType = LD->getExtensionType(); in expandUnalignedLoad()
H A DLegalizeVectorTypes.cpp299 ISD::UNINDEXED, N->getExtensionType(), in ScalarizeVecRes_LOAD()
1303 ISD::LoadExtType ExtType = LD->getExtensionType(); in SplitVecRes_LOAD()
1345 ISD::LoadExtType ExtType = MLD->getExtensionType(); in SplitVecRes_MLOAD()
3264 ISD::LoadExtType ExtType = LD->getExtensionType(); in WidenVecRes_LOAD()
3295 ISD::LoadExtType ExtType = N->getExtensionType(); in WidenVecRes_MLOAD()
/freebsd-12.1/contrib/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp304 if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD) in isValidIndexedLoad()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1385 ISD::LoadExtType ExtType = Load->getExtensionType(); in lowerPrivateExtLoad()
1442 ISD::LoadExtType ExtType = LoadNode->getExtensionType(); in LowerLOAD()
1463 ((LoadNode->getExtensionType() == ISD::NON_EXTLOAD) || in LowerLOAD()
1464 (LoadNode->getExtensionType() == ISD::ZEXTLOAD))) { in LowerLOAD()
1499 if (LoadNode->getExtensionType() == ISD::SEXTLOAD) { in LowerLOAD()
H A DAMDGPUInstructions.td384 return L->getExtensionType() == ISD::ZEXTLOAD ||
385 L->getExtensionType() == ISD::EXTLOAD;
H A DSIInstrInfo.td263 return cast<LoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD;
279 return cast<LoadSDNode>(N)->getExtensionType() == ISD::EXTLOAD;
283 return cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD;
287 return cast<LoadSDNode>(N)->getExtensionType() == ISD::ZEXTLOAD;
H A DSIISelLowering.cpp6389 assert((!MemVT.isVector() || Ld->getExtensionType() == ISD::NON_EXTLOAD) && in widenLoad()
6405 assert(Ld->getExtensionType() == ISD::NON_EXTLOAD && in widenLoad()
6411 if (Ld->getExtensionType() == ISD::SEXTLOAD) { in widenLoad()
6414 } else if (Ld->getExtensionType() == ISD::ZEXTLOAD || in widenLoad()
6415 Ld->getExtensionType() == ISD::NON_EXTLOAD) { in widenLoad()
6418 assert(Ld->getExtensionType() == ISD::EXTLOAD); in widenLoad()
6428 Cvt = getLoadExtOrTrunc(DAG, Ld->getExtensionType(), Cvt, SL, IntVT); in widenLoad()
6440 ISD::LoadExtType ExtType = Load->getExtensionType(); in LowerLOAD()
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZOperators.td492 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
507 unsigned Type = cast<LoadSDNode>(N)->getExtensionType();
522 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
H A DSystemZISelDAGToDAG.cpp985 (Load->getExtensionType() == ISD::EXTLOAD || in tryRISBGZero()
986 Load->getExtensionType() == ISD::ZEXTLOAD) && in tryRISBGZero()
H A DSystemZISelLowering.cpp1783 if (Load->getExtensionType() == ISD::SEXTLOAD) { in adjustSubwordCmp()
1806 } else if (Load->getExtensionType() == ISD::ZEXTLOAD) { in adjustSubwordCmp()
1819 Load->getExtensionType() != ExtType) { in adjustSubwordCmp()
1843 switch (Load->getExtensionType()) { in isNaturalMemoryOperand()
2001 unsigned Type = L->getExtensionType(); in adjustICmpTruncate()
/freebsd-12.1/contrib/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td664 // cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD
666 // cast<LoadSDNode>(N)->getExtensionType() == ISD::EXTLOAD;
668 // cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD;
670 // cast<LoadSDNode>(N)->getExtensionType() == ISD::ZEXTLOAD;
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp77 ISD::LoadExtType ExtType = LD->getExtensionType(); in SelectIndexedLoad()
296 if (N->getExtensionType() != IntExt) in tryLoadOfLoadIntrinsic()
1454 if (L->getExtensionType() != ISD::SEXTLOAD) in DetectUseSxtw()
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp267 (LD->getExtensionType() == ISD::NON_EXTLOAD || in isZExtFree()
268 LD->getExtensionType() == ISD::ZEXTLOAD)) in isZExtFree()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86InstrFragmentsSIMD.td971 cast<MaskedLoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD;
992 cast<MaskedLoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD;
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp1379 Opcode = (LD->getExtensionType() == ISD::SEXTLOAD) in tryARMIndexedLoad()
1383 if (LD->getExtensionType() == ISD::SEXTLOAD) { in tryARMIndexedLoad()
1435 if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD || in tryT1IndexedLoad()
1465 bool isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD; in tryT2IndexedLoad()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp2706 if (InputLoad && InputLoad->getExtensionType() == ISD::SEXTLOAD) in signExtendInputIfNeeded()
2745 if (InputLoad && InputLoad->getExtensionType() != ISD::SEXTLOAD) in zeroExtendInputIfNeeded()
4452 bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD; in Select()
4489 bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD; in Select()
H A DPPCISelLowering.cpp2521 LD->getExtensionType() == ISD::SEXTLOAD && in getPreIndexedAddressParts()
7177 if (!LD || LD->getExtensionType() != ET || LD->isVolatile() || in canReuseLoadAddress()
9312 Load = DAG.getExtLoad(LN->getExtensionType(), dl, ScalarVT, LoadChain, in LowerVectorLoad()
11961 return LD->getExtensionType() == ISD::EXTLOAD && in isFPExtLoad()
12074 IsRoundOfExtLoad = LD->getExtensionType() == ISD::EXTLOAD; in combineBVOfConsecutiveLoads()
12097 if (IsRoundOfExtLoad && LD2->getExtensionType() != ISD::EXTLOAD) in combineBVOfConsecutiveLoads()
12800 if (LD->getExtensionType() != ISD::NON_EXTLOAD || in PerformDAGCombine()
14148 (LD->getExtensionType() == ISD::NON_EXTLOAD || in isZExtFree()
14149 LD->getExtensionType() == ISD::ZEXTLOAD)) in isZExtFree()

12