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Searched refs:dev_priv (Results 1 – 25 of 69) sorted by relevance

123

/freebsd-12.1/sys/dev/drm/
H A Dsavage_bci.c218 dev_priv->head.next = &dev_priv->tail; in savage_freelist_init()
223 dev_priv->tail.prev = &dev_priv->head; in savage_freelist_init()
302 dev_priv->nr_dma_pages = dev_priv->cmd_dma->size / in savage_dma_init()
343 if (dev_priv->cmd_dma == &dev_priv->fake_dma) in savage_dma_wait()
358 if (dev_priv->wait_evnt(dev_priv, in savage_dma_wait()
387 dev_priv->dma_flush(dev_priv); in savage_dma_alloc()
391 dev_priv->dma_pages[i].age = dev_priv->last_dma_age; in savage_dma_alloc()
416 savage_dma_wait(dev_priv, dev_priv->current_dma_page); in savage_dma_alloc()
816 dev_priv->cmd_dma = &dev_priv->fake_dma; in savage_do_init_bci()
907 if (dev_priv->cmd_dma == &dev_priv->fake_dma) { in savage_do_cleanup_bci()
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H A Dvia_dma.c91 (dev_priv->dma_high + hw_addr - dev_priv->dma_low) : in via_cmdbuf_space()
106 (dev_priv->dma_wrap + dev_priv->dma_low - hw_addr)); in via_cmdbuf_lag()
156 return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); in via_check_dma()
188 if (!dev_priv || !dev_priv->mmio) { in via_initialize()
223 dev_priv->ring.virtual_start = dev_priv->ring.map.virtual; in via_initialize()
225 dev_priv->dma_ptr = dev_priv->ring.virtual_start; in via_initialize()
416 return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); in via_get_dma()
443 dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4; in via_hook_segment()
445 dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1; in via_hook_segment()
581 dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4; in via_cmdbuf_start()
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H A Dr128_cce.c217 if (GET_RING_HEAD(dev_priv) == dev_priv->ring.tail) { in r128_do_cce_idle()
243 dev_priv->cce_mode | dev_priv->ring.size_l2qw in r128_do_cce_start()
451 dev_priv->front_pitch_offset_c = (((dev_priv->front_pitch / 8) << 21) | in r128_do_init_cce()
453 dev_priv->back_pitch_offset_c = (((dev_priv->back_pitch / 8) << 21) | in r128_do_init_cce()
455 dev_priv->depth_pitch_offset_c = (((dev_priv->depth_pitch / 8) << 21) | in r128_do_init_cce()
458 dev_priv->span_pitch_offset_c = (((dev_priv->depth_pitch / 8) << 21) | in r128_do_init_cce()
545 dev_priv->ring.start = (u32 *) dev_priv->cce_ring->virtual; in r128_do_init_cce()
546 dev_priv->ring.end = ((u32 *) dev_priv->cce_ring->virtual in r128_do_init_cce()
551 dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1; in r128_do_init_cce()
655 if (dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4) { in r128_cce_start()
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H A Dmga_dma.c311 dev_priv->head = dev_priv->tail = NULL; in mga_freelist_cleanup()
405 if (!dev_priv) in mga_driver_load()
591 dev_priv->warp->virtual, dev_priv->primary->virtual, in mga_do_agp_dma_bootstrap()
723 err = drm_addmap(dev, dev_priv->mmio_base, dev_priv->mmio_size, in mga_do_dma_bootstrap()
905 dev_priv->prim.status = (u32 *) dev_priv->status->virtual; in mga_do_init_dma()
913 dev_priv->prim.start = (u8 *) dev_priv->primary->virtual; in mga_do_init_dma()
914 dev_priv->prim.end = ((u8 *) dev_priv->primary->virtual in mga_do_init_dma()
916 dev_priv->prim.size = dev_priv->primary->size; in mga_do_init_dma()
919 dev_priv->prim.space = dev_priv->prim.size; in mga_do_init_dma()
927 dev_priv->prim.status[0] = dev_priv->primary->offset; in mga_do_init_dma()
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H A Dmach64_dma.c658 mach64_ring_tick( dev_priv, &(dev_priv)->ring ); \
988 dev_priv->front_offset_pitch = (((dev_priv->front_pitch / 8) << 22) | in mach64_do_dma_init()
990 dev_priv->back_offset_pitch = (((dev_priv->back_pitch / 8) << 22) | in mach64_do_dma_init()
1102 dev_priv->ring.start = dev_priv->ring_map->virtual; in mach64_do_dma_init()
1103 dev_priv->ring.start_addr = (u32) dev_priv->ring_map->offset; in mach64_do_dma_init()
1105 memset(dev_priv->ring.start, 0, dev_priv->ring.size); in mach64_do_dma_init()
1107 dev_priv->ring.start, dev_priv->ring.start_addr); in mach64_do_dma_init()
1147 dev_priv->ring.head_addr = dev_priv->ring.start_addr; in mach64_do_dma_init()
1148 dev_priv->ring.head = dev_priv->ring.tail = 0; in mach64_do_dma_init()
1149 dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1; in mach64_do_dma_init()
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H A Dvia_irq.c127 dev_priv->usec_per_vblank = in via_driver_irq_handler()
136 dev_priv->usec_per_vblank); in via_driver_irq_handler()
170 if (dev_priv) { in viadrv_acknowledge_irqs()
174 dev_priv->irq_pending_mask); in viadrv_acknowledge_irqs()
221 if (!dev_priv) { in via_driver_irq_wait()
239 masks = dev_priv->irq_masks; in via_driver_irq_wait()
270 if (dev_priv) { in via_driver_irq_preinstall()
271 cur_irq = dev_priv->via_irqs; in via_driver_irq_preinstall()
317 if (!dev_priv) in via_driver_irq_postinstall()
322 | dev_priv->irq_enable_mask); in via_driver_irq_postinstall()
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H A Dvia_map.c38 dev_priv->sarea = drm_getsarea(dev); in via_do_init_map()
39 if (!dev_priv->sarea) { in via_do_init_map()
47 if (!dev_priv->fb) { in via_do_init_map()
54 if (!dev_priv->mmio) { in via_do_init_map()
61 dev_priv->sarea_priv = in via_do_init_map()
65 dev_priv->agpAddr = init->agpAddr; in via_do_init_map()
67 via_init_futex(dev_priv); in via_do_init_map()
100 drm_via_private_t *dev_priv; in via_driver_load() local
104 if (dev_priv == NULL) in via_driver_load()
109 dev_priv->chipset = chipset; in via_driver_load()
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H A Dmga_state.c359 mga_g200_emit_pipe(dev_priv); in mga_g200_emit_state()
369 mga_g200_emit_tex0(dev_priv); in mga_g200_emit_state()
381 mga_g400_emit_pipe(dev_priv); in mga_g400_emit_state()
391 mga_g400_emit_tex0(dev_priv); in mga_g400_emit_state()
396 mga_g400_emit_tex1(dev_priv); in mga_g400_emit_state()
416 dev_priv->back_offset); in mga_verify_context()
728 dev_priv->dma_access)); in mga_dma_dispatch_indices()
1052 if (!dev_priv) { in mga_getparam()
1064 value = dev_priv->chipset; in mga_getparam()
1084 if (!dev_priv) { in mga_set_fence()
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H A Dvia_mm.c53 dev_priv->agp_initialized = 1; in via_agp_init()
54 dev_priv->agp_offset = agp->offset; in via_agp_init()
73 dev_priv->vram_initialized = 1; in via_fb_init()
74 dev_priv->vram_offset = fb->offset; in via_fb_init()
94 via_cleanup_futex(dev_priv); in via_final_context()
105 if (!dev_priv) in via_lastclose()
108 drm_sman_cleanup(&dev_priv->sman); in via_lastclose()
109 dev_priv->vram_initialized = 0; in via_lastclose()
110 dev_priv->agp_initialized = 0; in via_lastclose()
127 dev_priv->agp_initialized)) { in via_mem_alloc()
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H A Dr128_state.c235 r128_emit_core(dev_priv); in r128_emit_state()
260 r128_emit_tex0(dev_priv); in r128_emit_state()
265 r128_emit_tex1(dev_priv); in r128_emit_state()
370 if (dev_priv->page_flipping && dev_priv->current_page == 1) { in r128_cce_dispatch_clear()
535 dev_priv->current_page, dev_priv->sarea_priv->pfCurrentPage); in r128_cce_dispatch_flip()
561 dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page = in r128_cce_dispatch_flip()
1285 dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page; in r128_do_init_pageflip()
1360 if (!dev_priv) { in r128_cce_vertex()
1416 if (!dev_priv) { in r128_cce_indices()
1561 if (!dev_priv) { in r128_cce_indirect()
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H A Dmach64_drv.h566 dev_priv->ring_running = 1; in mach64_ring_start()
619 if (!dev_priv->ring_running) { in mach64_ring_tick()
620 mach64_ring_start(dev_priv); in mach64_ring_tick()
664 dev_priv->ring.head_addr, dev_priv->ring.head, in mach64_ring_stop()
665 dev_priv->ring.tail, dev_priv->ring.space); in mach64_ring_stop()
676 dev_priv->ring_running = 0; in mach64_ring_stop()
686 mach64_ring_tick(dev_priv, ring); in mach64_update_ring_snapshot()
709 ((dev_priv->is_pci) ? \
718 dev_priv, in mach64_find_pending_buf_entry()
729 ptr = dev_priv->pending.prev; in mach64_find_pending_buf_entry()
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H A Dsavage_state.c53 dev_priv->waiting = 1; in savage_emit_clip_rect_s3d()
79 dev_priv->waiting = 1; in savage_emit_clip_rect_s4()
94 addr >= dev_priv->texture_offset + dev_priv->texture_size) { in savage_verify_texaddr()
254 dev_priv->waiting = 1; in savage_dispatch_state()
360 if (S3_SAVAGE3D_SERIES(dev_priv->chipset) && dev_priv->waiting) { in savage_dispatch_dma_prim()
369 dev_priv->waiting = 0; in savage_dispatch_dma_prim()
610 if (S3_SAVAGE3D_SERIES(dev_priv->chipset) && dev_priv->waiting) { in savage_dispatch_dma_idx()
619 dev_priv->waiting = 0; in savage_dispatch_dma_idx()
908 dev_priv->emit_clip_rect(dev_priv, &boxes[i]); in savage_dispatch_draw()
922 dev_priv, &cmd_header, in savage_dispatch_draw()
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H A Dmga_warp.c48 dev_priv->warp_pipe_phys[where] = pcbase; \
85 switch (dev_priv->chipset) { in mga_warp_microcode_size()
100 unsigned long pcbase = dev_priv->warp->offset; in mga_warp_install_g400_microcode()
102 memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys)); in mga_warp_install_g400_microcode()
128 unsigned long pcbase = dev_priv->warp->offset; in mga_warp_install_g200_microcode()
130 memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys)); in mga_warp_install_g200_microcode()
149 if (size > dev_priv->warp->size) { in mga_warp_install_microcode()
151 size, dev_priv->warp->size); in mga_warp_install_microcode()
155 switch (dev_priv->chipset) { in mga_warp_install_microcode()
168 int mga_warp_init(drm_mga_private_t * dev_priv) in mga_warp_init() argument
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H A Dmga_drv.h244 mga_g400_emit_state( dev_priv ); \
294 prim = dev_priv->prim.start; \
295 write = dev_priv->prim.tail; \
304 prim = dev_priv->prim.start; \
305 write = dev_priv->prim.tail; \
310 dev_priv->prim.tail = write; \
322 dev_priv->prim.tail, \
324 dev_priv->primary->offset ); \
327 if ( dev_priv->prim.space < \
331 mga_do_dma_flush( dev_priv ); \
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/freebsd-12.1/sys/dev/drm2/i915/
H A Di915_suspend.c156 dev_priv->regfile.saveCR[i] = in i915_save_vga()
172 dev_priv->regfile.saveGR[i] = in i915_save_vga()
175 dev_priv->regfile.saveGR[0x10] = in i915_save_vga()
177 dev_priv->regfile.saveGR[0x11] = in i915_save_vga()
179 dev_priv->regfile.saveGR[0x18] = in i915_save_vga()
184 dev_priv->regfile.saveSR[i] = in i915_save_vga()
209 dev_priv->regfile.saveSR[i]); in i915_restore_vga()
220 dev_priv->regfile.saveGR[i]); in i915_restore_vga()
223 dev_priv->regfile.saveGR[0x10]); in i915_restore_vga()
225 dev_priv->regfile.saveGR[0x11]); in i915_restore_vga()
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H A Di915_dma.c796 READ_BREADCRUMB(dev_priv), (int)dev_priv->dri1.counter); in i915_wait_irq()
814 if (!dev_priv || !LP_RING(dev_priv)->virtual_start) { in i915_irq_emit()
844 if (!dev_priv) { in i915_irq_wait()
861 if (!dev_priv) { in i915_vblank_pipe_get()
920 if (!dev_priv) { in i915_getparam()
942 value = dev_priv->num_fence_regs - dev_priv->fence_reg_start; in i915_getparam()
1542 dev_priv->mm.gtt_base_addr = dev_priv->mm.gtt->gma_bus_addr; in i915_driver_load()
1554 i915_mtrr_setup(dev_priv, dev_priv->mm.gtt_base_addr, in i915_driver_load()
1759 if (dev_priv->child_dev && dev_priv->child_dev_num) { in i915_driver_unload()
1775 taskqueue_drain(dev_priv->wq, &dev_priv->error_work); in i915_driver_unload()
[all …]
H A Di915_irq.c328 if (dev_priv->ips.cur_delay != dev_priv->ips.max_delay) in ironlake_handle_rps_change()
333 if (dev_priv->ips.cur_delay != dev_priv->ips.min_delay) in ironlake_handle_rps_change()
479 taskqueue_enqueue(dev_priv->wq, &dev_priv->l3_parity.error_work); in ivybridge_handle_parity_error()
526 taskqueue_enqueue(dev_priv->wq, &dev_priv->rps.work); in gen6_queue_rps_work()
612 taskqueue_enqueue(dev_priv->wq, &dev_priv->hotplug_work); in ibx_irq_handler()
655 taskqueue_enqueue(dev_priv->wq, &dev_priv->hotplug_work); in cpt_irq_handler()
1473 taskqueue_enqueue(dev_priv->wq, &dev_priv->error_work); in i915_handle_error()
2068 if (!dev_priv) in valleyview_irq_uninstall()
2089 if (!dev_priv) in ironlake_irq_uninstall()
2132 dev_priv->irq_mask = in i8xx_irq_postinstall()
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H A Dintel_pm.c307 if (taskqueue_cancel_timeout(dev_priv->wq, &dev_priv->fbc_work->work, in intel_cancel_fbc_work()
609 dev_priv->ips.r_t = dev_priv->mem_freq; in i915_ironlake_get_mem_freq()
642 } else if (dev_priv->fsb_freq > 3200 && dev_priv->fsb_freq <= 4800) { in i915_ironlake_get_mem_freq()
1025 dev_priv->fsb_freq, dev_priv->mem_freq); in pineview_update_wm()
3240 if (dev_priv->ips.max_delay > dev_priv->ips.fmax) in i915_gpu_raise()
3268 if (dev_priv->ips.max_delay < dev_priv->ips.min_delay) in i915_gpu_lower()
3323 dev_priv->ips.max_delay = dev_priv->ips.fstart; in i915_gpu_turbo_disable()
3325 if (!ironlake_set_drps(dev_priv->dev, dev_priv->ips.fstart)) in i915_gpu_turbo_disable()
4213 dev_priv->fsb_freq, dev_priv->mem_freq); in intel_init_pm()
4338 dev_priv->gt.force_wake_get(dev_priv); in gen6_gt_force_wake_get()
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H A Dintel_bios.c232 dev_priv->lvds_vbt = 1; in parse_lfp_panel_data()
354 dev_priv->lvds_ssc_freq = in parse_general_features()
507 if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp.support) in parse_edp()
514 dev_priv->edp.bpp = 18; in parse_edp()
517 dev_priv->edp.bpp = 24; in parse_edp()
520 dev_priv->edp.bpp = 30; in parse_edp()
534 dev_priv->edp.lanes = 1; in parse_edp()
537 dev_priv->edp.lanes = 2; in parse_edp()
541 dev_priv->edp.lanes = 4; in parse_edp()
648 dev_priv->lvds_vbt = 0; in init_vbt_defaults()
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H A Dintel_panel.c143 if (HAS_PCH_SPLIT(dev_priv->dev)) { in i915_read_blc_pwm_ctl()
293 dev_priv->backlight_level = level; in intel_panel_set_backlight()
294 if (dev_priv->backlight_enabled) in intel_panel_set_backlight()
342 if (dev_priv->num_pipe == 3) in intel_panel_enable_backlight()
376 dev_priv->backlight_enabled = dev_priv->backlight_level != 0; in intel_panel_init_backlight()
413 return dev_priv->backlight_level; in intel_panel_get_brightness()
429 if (WARN_ON(dev_priv->backlight)) in intel_panel_setup_backlight()
439 dev_priv->backlight = in intel_panel_setup_backlight()
447 dev_priv->backlight = NULL; in intel_panel_setup_backlight()
457 if (dev_priv->backlight) { in intel_panel_destroy_backlight()
[all …]
H A Di915_gem_gtt.c152 if (dev_priv->mm.gtt->needs_dmar) { in i915_gem_init_aliasing_ppgtt()
306 if (!dev_priv->mm.aliasing_ppgtt) in i915_gem_init_ppgtt()
415 (dev_priv->mm.gtt_end - dev_priv->mm.gtt_start) / PAGE_SIZE); in i915_gem_restore_gtt_mappings()
558 dev_priv->mm.gtt_start = start; in i915_gem_init_global_gtt()
560 dev_priv->mm.gtt_end = end; in i915_gem_init_global_gtt()
573 dev_priv->mm.gtt_base_addr + start + dev_priv->mm.mappable_gtt_total, in i915_gem_init_global_gtt()
667 if (!dev_priv->mm.gtt) { in i915_gem_gtt_init()
677 dev_priv->mm.gtt = malloc(sizeof(*dev_priv->mm.gtt), DRM_I915_GEM, M_WAITOK | M_ZERO); in i915_gem_gtt_init()
678 if (!dev_priv->mm.gtt) in i915_gem_gtt_init()
708 dev_priv->mm.gtt->gtt_mappable_entries > dev_priv->mm.gtt->gtt_total_entries) { in i915_gem_gtt_init()
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H A Di915_gem_stolen.c82 base -= dev_priv->mm.gtt->stolen_size; in i915_stolen_to_physical()
100 struct drm_i915_private *dev_priv = dev->dev_private; in i915_setup_compression() local
132 dev_priv->cfb_size = size; in i915_setup_compression()
134 dev_priv->compressed_fb = compressed_fb; in i915_setup_compression()
142 dev_priv->compressed_llb = compressed_llb; in i915_setup_compression()
154 dev_priv->no_fbc_reason = FBC_STOLEN_TOO_SMALL; in i915_setup_compression()
162 drm_mm_put_block(dev_priv->compressed_fb); in i915_cleanup_compression()
163 if (dev_priv->compressed_llb) in i915_cleanup_compression()
164 drm_mm_put_block(dev_priv->compressed_llb); in i915_cleanup_compression()
179 if (dev_priv->mm.stolen_base == 0) in i915_gem_init_stolen()
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H A Dintel_iic.c103 dev = sc->bus->dev_priv->dev; in intel_iicbus_reset()
127 struct drm_i915_private *dev_priv = bus->dev_priv; in get_reserved() local
144 struct drm_i915_private *dev_priv = bus->dev_priv; in get_clock() local
155 struct drm_i915_private *dev_priv = bus->dev_priv; in get_data() local
166 struct drm_i915_private *dev_priv = bus->dev_priv; in set_clock() local
184 struct drm_i915_private *dev_priv = bus->dev_priv; in set_data() local
203 struct drm_i915_private *dev_priv = bus->dev_priv; in intel_gpio_pre_xfer() local
218 struct drm_i915_private *dev_priv = bus->dev_priv; in intel_gpio_post_xfer() local
228 struct drm_i915_private *dev_priv = bus->dev_priv; in intel_gpio_setup() local
360 struct drm_i915_private *dev_priv = bus->dev_priv; in gmbus_xfer() local
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H A Di915_drv.c444 dev_priv->pch_id = id; in intel_detect_pch()
592 dev_priv->mm.suspended = 0; in __i915_drm_thaw()
797 dev_priv->gt.force_wake_get(dev_priv); in gen6_do_reset()
799 dev_priv->gt.force_wake_put(dev_priv); in gen6_do_reset()
830 if (dev_priv->stop_rings) { in intel_gpu_reset()
832 dev_priv->stop_rings = 0; in intel_gpu_reset()
898 !dev_priv->mm.suspended) { in i915_reset()
902 dev_priv->mm.suspended = 0; in i915_reset()
1198 ifbdev = dev_priv->fbdev; in i915_fb_helper_getinfo()
1360 dev_priv->gt.force_wake_get(dev_priv); \
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/freebsd-12.1/sys/dev/drm2/radeon/
H A Dradeon_irq.c45 dev_priv->irq_enable_reg |= mask; in radeon_irq_set_state()
47 dev_priv->irq_enable_reg &= ~mask; in radeon_irq_set_state()
188 drm_radeon_private_t *dev_priv = in radeon_driver_irq_handler() local
203 stat &= dev_priv->irq_enable_reg; in radeon_driver_irq_handler()
207 DRM_WAKEUP(&dev_priv->swi_queue); in radeon_driver_irq_handler()
228 if (!dev_priv) { in radeon_get_vblank_counter()
255 drm_radeon_private_t *dev_priv = in radeon_driver_irq_preinstall() local
273 drm_radeon_private_t *dev_priv = in radeon_driver_irq_postinstall() local
291 drm_radeon_private_t *dev_priv = in radeon_driver_irq_uninstall() local
293 if (!dev_priv) in radeon_driver_irq_uninstall()
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