| /freebsd-12.1/contrib/llvm/lib/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.cpp | 123 return buildInstr(TargetOpcode::DBG_VALUE) in buildFIDbgValue() 194 return buildInstr(TargetOpcode::G_GEP) in buildGEP() 223 return buildInstr(TargetOpcode::G_PTR_MASK) in buildPtrMask() 306 return buildInstr(Opcode) in buildLoadInstr() 317 return buildInstr(TargetOpcode::G_STORE) in buildStore() 368 return buildInstr(Opcode, Res, Op); in buildExtOrTrunc() 403 return buildInstr(Opcode, Dst, Src); in buildCast() 422 return buildInstr(TargetOpcode::G_EXTRACT) in buildExtract() 539 return buildInstr(TargetOpcode::G_INSERT) in buildInsert() 670 return buildInstr(Opcode) in buildAtomicRMW() [all …]
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| H A D | LegalizerHelper.cpp | 624 MIRBuilder.buildInstr(MI.getOpcode(), {DstRegs[i]}, in narrowScalar() 677 auto AndOp = MIRBuilder.buildInstr( in widenScalar() 702 MIBSrc = MIRBuilder.buildInstr( in widenScalar() 713 MIBNewOp = MIRBuilder.buildInstr( in widenScalar() 1008 MIRBuilder.buildInstr(Opcode) in lower() 1022 MIRBuilder.buildInstr(TargetOpcode::G_ASHR) in lower() 1060 MIRBuilder.buildInstr(TargetOpcode::G_FSUB) in lower() 1078 MIRBuilder.buildInstr(TargetOpcode::G_FADD) in lower() 1321 auto MIBOp = MIRBuilder.buildInstr( in lowerBitCount() 1364 auto MIBTmp = MIRBuilder.buildInstr( in lowerBitCount() [all …]
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| H A D | IRTranslator.cpp | 336 MIRBuilder.buildInstr(TargetOpcode::G_FNEG) in translateFSub() 345 MIRBuilder.buildInstr(TargetOpcode::G_FNEG) in translateFNeg() 641 MIRBuilder.buildInstr(Opcode).addDef(Res).addUse(Op); in translateCast() 782 MIRBuilder.buildInstr(Op) in translateOverflowIntrinsic() 851 MIRBuilder.buildInstr(TargetOpcode::G_VASTART) in translateKnownIntrinsic() 1035 MIRBuilder.buildInstr(Opcode) in translateKnownIntrinsic() 1041 MIRBuilder.buildInstr(TargetOpcode::G_CTPOP) in translateKnownIntrinsic() 1055 MIRBuilder.buildInstr(TargetOpcode::G_FCEIL) in translateKnownIntrinsic() 1075 MIRBuilder.buildInstr(TargetOpcode::INLINEASM) in translateInlineAsm() 1269 MIRBuilder.buildInstr(TargetOpcode::EH_LABEL) in translateLandingPad() [all …]
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| H A D | CSEMIRBuilder.cpp | 137 MachineInstrBuilder CSEMIRBuilder::buildInstr(unsigned Opc, in buildInstr() function in CSEMIRBuilder 168 return MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr() 172 auto MIB = MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr() 189 MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 299 MachineInstrBuilder buildInstr(unsigned Opcode); 1091 return buildInstr(TargetOpcode::G_ADD, {Dst}, {Src0, Src1}, Flags); 1108 return buildInstr(TargetOpcode::G_SUB, {Dst}, {Src0, Src1}, Flags); 1124 return buildInstr(TargetOpcode::G_MUL, {Dst}, {Src0, Src1}, Flags); 1140 return buildInstr(TargetOpcode::G_AND, {Dst}, {Src0, Src1}); in buildAnd() 1155 return buildInstr(TargetOpcode::G_OR, {Dst}, {Src0, Src1}); in buildOr() 1158 virtual MachineInstrBuilder buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps,
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| H A D | ConstantFoldingMIRBuilder.h | 29 MachineInstrBuilder buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps, 59 return MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps);
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| H A D | LegalizationArtifactCombiner.h | 62 Builder.buildInstr(ExtMI->getOpcode(), {DstReg}, {ExtSrc}); in tryCombineAnyExt() 120 auto MIBShl = Builder.buildInstr( in tryCombineSExt() 123 Builder.buildInstr(TargetOpcode::G_ASHR, {DstReg}, {MIBShl, MIBShAmt}); in tryCombineSExt() 149 Builder.buildInstr(TargetOpcode::G_IMPLICIT_DEF, {DstReg}, {}); in tryFoldImplicitDef()
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| H A D | CSEMIRBuilder.h | 95 MachineInstrBuilder buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps,
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.cpp | 393 auto CallSeqStart = MIRBuilder.buildInstr(AdjStackDown); in lowerCall() 433 MIRBuilder.buildInstr(X86::MOV8ri) in lowerCall() 477 MIRBuilder.buildInstr(AdjStackUp) in lowerCall()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64CallLowering.cpp | 375 auto CallSeqStart = MIRBuilder.buildInstr(AArch64::ADJCALLSTACKDOWN); in lowerCall() 435 MIRBuilder.buildInstr(AArch64::ADJCALLSTACKUP) in lowerCall()
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| H A D | AArch64InstructionSelector.cpp | 680 auto MovZ = MIB.buildInstr(AArch64::MOVZXi, {&AArch64::GPR64RegClass}, {}); in materializeLargeCMVal() 692 auto MovI = MIB.buildInstr(AArch64::MOVKXi).addDef(DstReg).addUse(SrcReg); in materializeLargeCMVal()
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| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsCallLowering.cpp | 458 MIRBuilder.buildInstr(Mips::ADJCALLSTACKDOWN); in lowerCall() 534 MIRBuilder.buildInstr(Mips::ADJCALLSTACKUP).addImm(NextStackOffset).addImm(0); in lowerCall()
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| H A D | MipsInstructionSelector.cpp | 297 MachineInstrBuilder MIB = B.buildInstr( in select()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 539 auto CallSeqStart = MIRBuilder.buildInstr(ARM::ADJCALLSTACKDOWN); in lowerCall() 619 MIRBuilder.buildInstr(ARM::ADJCALLSTACKUP) in lowerCall()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 41 MIRBuilder.buildInstr(AMDGPU::S_ENDPGM); in lowerReturn()
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