624       MIRBuilder.buildInstr(MI.getOpcode(), {DstRegs[i]},  in narrowScalar()
642   auto ExtB = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MO.getReg()});  in widenScalarSrc()
651   MIRBuilder.buildInstr(TruncOpcode, {MO.getReg()}, {DstExt});  in widenScalarDst()
666     auto LHSZext = MIRBuilder.buildInstr(TargetOpcode::G_ZEXT, {WideTy},  in widenScalar()
668     auto RHSZext = MIRBuilder.buildInstr(TargetOpcode::G_ZEXT, {WideTy},  in widenScalar()
674     auto NewOp = MIRBuilder.buildInstr(Opcode, {WideTy}, {LHSZext, RHSZext});  in widenScalar()
677     auto AndOp = MIRBuilder.buildInstr(  in widenScalar()
702       MIBSrc = MIRBuilder.buildInstr(  in widenScalar()
707     auto MIBNewOp = MIRBuilder.buildInstr(MI.getOpcode(), {WideTy}, {MIBSrc});  in widenScalar()
713       MIBNewOp = MIRBuilder.buildInstr(  in widenScalar()
980     MIRBuilder.buildInstr(MI.getOpcode() == G_SREM ? G_SDIV : G_UDIV)  in lower()
1008     MIRBuilder.buildInstr(Opcode)  in lower()
1022       MIRBuilder.buildInstr(TargetOpcode::G_ASHR)  in lower()
1060     MIRBuilder.buildInstr(TargetOpcode::G_FSUB)  in lower()
1077     MIRBuilder.buildInstr(TargetOpcode::G_FNEG).addDef(Neg).addUse(RHS);  in lower()
1078     MIRBuilder.buildInstr(TargetOpcode::G_FADD)  in lower()
1295       auto MIBCtlzZU = MIRBuilder.buildInstr(TargetOpcode::G_CTLZ_ZERO_UNDEF,  in lowerBitCount()
1321       auto MIBOp = MIRBuilder.buildInstr(  in lowerBitCount()
1323           {Op, MIRBuilder.buildInstr(TargetOpcode::G_LSHR, {Ty},  in lowerBitCount()
1327     auto MIBPop = MIRBuilder.buildInstr(TargetOpcode::G_CTPOP, {Ty}, {Op});  in lowerBitCount()
1328     MIRBuilder.buildInstr(TargetOpcode::G_SUB, {MI.getOperand(0).getReg()},  in lowerBitCount()
1346       auto MIBCttzZU = MIRBuilder.buildInstr(TargetOpcode::G_CTTZ_ZERO_UNDEF,  in lowerBitCount()
1363         MIRBuilder.buildInstr(TargetOpcode::G_XOR, {Ty}, {SrcReg, MIBCstNeg1});  in lowerBitCount()
1364     auto MIBTmp = MIRBuilder.buildInstr(  in lowerBitCount()
1366         {MIBNot, MIRBuilder.buildInstr(TargetOpcode::G_ADD, {Ty},  in lowerBitCount()
1371       MIRBuilder.buildInstr(  in lowerBitCount()
1374            MIRBuilder.buildInstr(TargetOpcode::G_CTLZ, {Ty}, {MIBTmp})});  in lowerBitCount()