Home
last modified time | relevance | path

Searched refs:addRegisterClass (Results 1 – 23 of 23) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp26 addRegisterClass(MVT::v64i8, &Hexagon::HvxVRRegClass); in initializeHVXLowering()
27 addRegisterClass(MVT::v32i16, &Hexagon::HvxVRRegClass); in initializeHVXLowering()
28 addRegisterClass(MVT::v16i32, &Hexagon::HvxVRRegClass); in initializeHVXLowering()
29 addRegisterClass(MVT::v128i8, &Hexagon::HvxWRRegClass); in initializeHVXLowering()
30 addRegisterClass(MVT::v64i16, &Hexagon::HvxWRRegClass); in initializeHVXLowering()
31 addRegisterClass(MVT::v32i32, &Hexagon::HvxWRRegClass); in initializeHVXLowering()
40 addRegisterClass(MVT::v16i1, &Hexagon::HvxQRRegClass); in initializeHVXLowering()
41 addRegisterClass(MVT::v32i1, &Hexagon::HvxQRRegClass); in initializeHVXLowering()
42 addRegisterClass(MVT::v64i1, &Hexagon::HvxQRRegClass); in initializeHVXLowering()
51 addRegisterClass(MVT::v32i1, &Hexagon::HvxQRRegClass); in initializeHVXLowering()
[all …]
H A DHexagonISelLowering.cpp1260 addRegisterClass(MVT::i1, &Hexagon::PredRegsRegClass); in HexagonTargetLowering()
1261 addRegisterClass(MVT::v2i1, &Hexagon::PredRegsRegClass); // bbbbaaaa in HexagonTargetLowering()
1264 addRegisterClass(MVT::i32, &Hexagon::IntRegsRegClass); in HexagonTargetLowering()
1265 addRegisterClass(MVT::v2i16, &Hexagon::IntRegsRegClass); in HexagonTargetLowering()
1266 addRegisterClass(MVT::v4i8, &Hexagon::IntRegsRegClass); in HexagonTargetLowering()
1267 addRegisterClass(MVT::i64, &Hexagon::DoubleRegsRegClass); in HexagonTargetLowering()
1268 addRegisterClass(MVT::v8i8, &Hexagon::DoubleRegsRegClass); in HexagonTargetLowering()
1269 addRegisterClass(MVT::v4i16, &Hexagon::DoubleRegsRegClass); in HexagonTargetLowering()
1270 addRegisterClass(MVT::v2i32, &Hexagon::DoubleRegsRegClass); in HexagonTargetLowering()
1272 addRegisterClass(MVT::f32, &Hexagon::IntRegsRegClass); in HexagonTargetLowering()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp58 addRegisterClass(MVT::i32, &WebAssembly::I32RegClass); in WebAssemblyTargetLowering()
59 addRegisterClass(MVT::i64, &WebAssembly::I64RegClass); in WebAssemblyTargetLowering()
60 addRegisterClass(MVT::f32, &WebAssembly::F32RegClass); in WebAssemblyTargetLowering()
61 addRegisterClass(MVT::f64, &WebAssembly::F64RegClass); in WebAssemblyTargetLowering()
63 addRegisterClass(MVT::v16i8, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
64 addRegisterClass(MVT::v8i16, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
65 addRegisterClass(MVT::v4i32, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
66 addRegisterClass(MVT::v4f32, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
68 addRegisterClass(MVT::v2i64, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
69 addRegisterClass(MVT::v2f64, &WebAssembly::V128RegClass); in WebAssemblyTargetLowering()
/freebsd-12.1/contrib/llvm/utils/TableGen/
H A DRegisterBankEmitter.cpp73 void addRegisterClass(const CodeGenRegisterClass *RC) { in addRegisterClass() function in __anon7080cf5b0111::RegisterBank
296 Bank.addRegisterClass(RC); in run()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp68 addRegisterClass(MVT::i32, &Mips::GPR32RegClass); in MipsSETargetLowering()
71 addRegisterClass(MVT::i64, &Mips::GPR64RegClass); in MipsSETargetLowering()
89 addRegisterClass(VecTys[i], &Mips::DSPRRegClass); in MipsSETargetLowering()
127 addRegisterClass(MVT::f16, &Mips::MSA128HRegClass); in MipsSETargetLowering()
172 addRegisterClass(MVT::f32, &Mips::FGR32RegClass); in MipsSETargetLowering()
177 addRegisterClass(MVT::f64, &Mips::FGR64RegClass); in MipsSETargetLowering()
179 addRegisterClass(MVT::f64, &Mips::AFGR64RegClass); in MipsSETargetLowering()
314 addRegisterClass(Ty, RC); in addMSAIntType()
367 addRegisterClass(Ty, RC); in addMSAFloatType()
H A DMips16ISelLowering.cpp126 addRegisterClass(MVT::i32, &Mips::CPU16RegsRegClass); in Mips16TargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp63 addRegisterClass(MVT::i64, &BPF::GPRRegClass); in BPFTargetLowering()
65 addRegisterClass(MVT::i32, &BPF::GPR32RegClass); in BPFTargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp58 addRegisterClass(MVT::f32, &R600::R600_Reg32RegClass); in R600TargetLowering()
59 addRegisterClass(MVT::i32, &R600::R600_Reg32RegClass); in R600TargetLowering()
60 addRegisterClass(MVT::v2f32, &R600::R600_Reg64RegClass); in R600TargetLowering()
61 addRegisterClass(MVT::v2i32, &R600::R600_Reg64RegClass); in R600TargetLowering()
62 addRegisterClass(MVT::v4f32, &R600::R600_Reg128RegClass); in R600TargetLowering()
63 addRegisterClass(MVT::v4i32, &R600::R600_Reg128RegClass); in R600TargetLowering()
H A DSIISelLowering.cpp118 addRegisterClass(MVT::i1, &AMDGPU::VReg_1RegClass); in SITargetLowering()
119 addRegisterClass(MVT::i64, &AMDGPU::SReg_64RegClass); in SITargetLowering()
122 addRegisterClass(MVT::f32, &AMDGPU::VGPR_32RegClass); in SITargetLowering()
124 addRegisterClass(MVT::f64, &AMDGPU::VReg_64RegClass); in SITargetLowering()
125 addRegisterClass(MVT::v2i32, &AMDGPU::SReg_64RegClass); in SITargetLowering()
126 addRegisterClass(MVT::v2f32, &AMDGPU::VReg_64RegClass); in SITargetLowering()
128 addRegisterClass(MVT::v2i64, &AMDGPU::SReg_128RegClass); in SITargetLowering()
129 addRegisterClass(MVT::v2f64, &AMDGPU::SReg_128RegClass); in SITargetLowering()
131 addRegisterClass(MVT::v4i32, &AMDGPU::SReg_128RegClass); in SITargetLowering()
132 addRegisterClass(MVT::v4f32, &AMDGPU::VReg_128RegClass); in SITargetLowering()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp83 addRegisterClass(MVT::i32, &SystemZ::GRX32BitRegClass); in SystemZTargetLowering()
85 addRegisterClass(MVT::i32, &SystemZ::GR32BitRegClass); in SystemZTargetLowering()
86 addRegisterClass(MVT::i64, &SystemZ::GR64BitRegClass); in SystemZTargetLowering()
88 addRegisterClass(MVT::f32, &SystemZ::VR32BitRegClass); in SystemZTargetLowering()
89 addRegisterClass(MVT::f64, &SystemZ::VR64BitRegClass); in SystemZTargetLowering()
91 addRegisterClass(MVT::f32, &SystemZ::FP32BitRegClass); in SystemZTargetLowering()
92 addRegisterClass(MVT::f64, &SystemZ::FP64BitRegClass); in SystemZTargetLowering()
95 addRegisterClass(MVT::f128, &SystemZ::VR128BitRegClass); in SystemZTargetLowering()
97 addRegisterClass(MVT::f128, &SystemZ::FP128BitRegClass); in SystemZTargetLowering()
100 addRegisterClass(MVT::v16i8, &SystemZ::VR128BitRegClass); in SystemZTargetLowering()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp376 addRegisterClass(MVT::i1, &NVPTX::Int1RegsRegClass); in NVPTXTargetLowering()
377 addRegisterClass(MVT::i16, &NVPTX::Int16RegsRegClass); in NVPTXTargetLowering()
378 addRegisterClass(MVT::i32, &NVPTX::Int32RegsRegClass); in NVPTXTargetLowering()
379 addRegisterClass(MVT::i64, &NVPTX::Int64RegsRegClass); in NVPTXTargetLowering()
380 addRegisterClass(MVT::f32, &NVPTX::Float32RegsRegClass); in NVPTXTargetLowering()
381 addRegisterClass(MVT::f64, &NVPTX::Float64RegsRegClass); in NVPTXTargetLowering()
382 addRegisterClass(MVT::f16, &NVPTX::Float16RegsRegClass); in NVPTXTargetLowering()
383 addRegisterClass(MVT::v2f16, &NVPTX::Float16x2RegsRegClass); in NVPTXTargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp138 addRegisterClass(MVT::i32, &PPC::GPRCRegClass); in PPCTargetLowering()
141 addRegisterClass(MVT::f32, &PPC::SPE4RCRegClass); in PPCTargetLowering()
142 addRegisterClass(MVT::f64, &PPC::SPERCRegClass); in PPCTargetLowering()
144 addRegisterClass(MVT::f32, &PPC::F4RCRegClass); in PPCTargetLowering()
145 addRegisterClass(MVT::f64, &PPC::F8RCRegClass); in PPCTargetLowering()
220 addRegisterClass(MVT::i1, &PPC::CRBITRCRegClass); in PPCTargetLowering()
532 addRegisterClass(MVT::i64, &PPC::G8RCRegClass); in PPCTargetLowering()
664 addRegisterClass(MVT::v4f32, &PPC::VRRCRegClass); in PPCTargetLowering()
665 addRegisterClass(MVT::v4i32, &PPC::VRRCRegClass); in PPCTargetLowering()
666 addRegisterClass(MVT::v8i16, &PPC::VRRCRegClass); in PPCTargetLowering()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp49 addRegisterClass(XLenVT, &RISCV::GPRRegClass); in RISCVTargetLowering()
52 addRegisterClass(MVT::f32, &RISCV::FPR32RegClass); in RISCVTargetLowering()
54 addRegisterClass(MVT::f64, &RISCV::FPR64RegClass); in RISCVTargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1422 addRegisterClass(MVT::i32, &SP::IntRegsRegClass); in SparcTargetLowering()
1424 addRegisterClass(MVT::f32, &SP::FPRegsRegClass); in SparcTargetLowering()
1425 addRegisterClass(MVT::f64, &SP::DFPRegsRegClass); in SparcTargetLowering()
1426 addRegisterClass(MVT::f128, &SP::QFPRegsRegClass); in SparcTargetLowering()
1429 addRegisterClass(MVT::i64, &SP::I64RegsRegClass); in SparcTargetLowering()
1433 addRegisterClass(MVT::v2i32, &SP::IntPairRegClass); in SparcTargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp46 addRegisterClass(MVT::i8, &MSP430::GR8RegClass); in MSP430TargetLowering()
47 addRegisterClass(MVT::i16, &MSP430::GR16RegClass); in MSP430TargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp77 addRegisterClass(MVT::i32, &ARC::GPR32RegClass); in ARCTargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp39 addRegisterClass(MVT::i8, &AVR::GPR8RegClass); in AVRTargetLowering()
40 addRegisterClass(MVT::i16, &AVR::DREGSRegClass); in AVRTargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp163 addRegisterClass(MVT::i8, &X86::GR8RegClass); in X86TargetLowering()
164 addRegisterClass(MVT::i16, &X86::GR16RegClass); in X86TargetLowering()
165 addRegisterClass(MVT::i32, &X86::GR32RegClass); in X86TargetLowering()
167 addRegisterClass(MVT::i64, &X86::GR64RegClass); in X86TargetLowering()
560 addRegisterClass(MVT::f32, &X86::FR32RegClass); in X86TargetLowering()
562 addRegisterClass(MVT::f64, &X86::RFP64RegClass); in X86TargetLowering()
592 addRegisterClass(MVT::f64, &X86::RFP64RegClass); in X86TargetLowering()
593 addRegisterClass(MVT::f32, &X86::RFP32RegClass); in X86TargetLowering()
642 addRegisterClass(MVT::f80, &X86::RFP80RegClass); in X86TargetLowering()
1305 addRegisterClass(MVT::v1i1, &X86::VK1RegClass); in X86TargetLowering()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp130 addRegisterClass(MVT::i32, &AArch64::GPR32allRegClass); in AArch64TargetLowering()
131 addRegisterClass(MVT::i64, &AArch64::GPR64allRegClass); in AArch64TargetLowering()
134 addRegisterClass(MVT::f16, &AArch64::FPR16RegClass); in AArch64TargetLowering()
135 addRegisterClass(MVT::f32, &AArch64::FPR32RegClass); in AArch64TargetLowering()
136 addRegisterClass(MVT::f64, &AArch64::FPR64RegClass); in AArch64TargetLowering()
137 addRegisterClass(MVT::f128, &AArch64::FPR128RegClass); in AArch64TargetLowering()
141 addRegisterClass(MVT::v16i8, &AArch64::FPR8RegClass); in AArch64TargetLowering()
142 addRegisterClass(MVT::v8i16, &AArch64::FPR16RegClass); in AArch64TargetLowering()
835 addRegisterClass(VT, &AArch64::FPR64RegClass); in addDRTypeForNEON()
840 addRegisterClass(VT, &AArch64::FPR128RegClass); in addQRTypeForNEON()
/freebsd-12.1/contrib/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp78 addRegisterClass(MVT::i32, &Lanai::GPRRegClass); in LanaiTargetLowering()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetLowering.h1882 void addRegisterClass(MVT VT, const TargetRegisterClass *RC) { in addRegisterClass() function
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp214 addRegisterClass(VT, &ARM::DPRRegClass); in addDRTypeForNEON()
219 addRegisterClass(VT, &ARM::DPairRegClass); in addQRTypeForNEON()
508 addRegisterClass(MVT::i32, &ARM::tGPRRegClass); in ARMTargetLowering()
510 addRegisterClass(MVT::i32, &ARM::GPRRegClass); in ARMTargetLowering()
514 addRegisterClass(MVT::f32, &ARM::SPRRegClass); in ARMTargetLowering()
515 addRegisterClass(MVT::f64, &ARM::DPRRegClass); in ARMTargetLowering()
519 addRegisterClass(MVT::f16, &ARM::HPRRegClass); in ARMTargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp78 addRegisterClass(MVT::i32, &XCore::GRRegsRegClass); in XCoreTargetLowering()