118   addRegisterClass(MVT::i1, &AMDGPU::VReg_1RegClass);  in SITargetLowering()
119   addRegisterClass(MVT::i64, &AMDGPU::SReg_64RegClass);  in SITargetLowering()
121   addRegisterClass(MVT::i32, &AMDGPU::SReg_32_XM0RegClass);  in SITargetLowering()
122   addRegisterClass(MVT::f32, &AMDGPU::VGPR_32RegClass);  in SITargetLowering()
124   addRegisterClass(MVT::f64, &AMDGPU::VReg_64RegClass);  in SITargetLowering()
125   addRegisterClass(MVT::v2i32, &AMDGPU::SReg_64RegClass);  in SITargetLowering()
126   addRegisterClass(MVT::v2f32, &AMDGPU::VReg_64RegClass);  in SITargetLowering()
128   addRegisterClass(MVT::v2i64, &AMDGPU::SReg_128RegClass);  in SITargetLowering()
129   addRegisterClass(MVT::v2f64, &AMDGPU::SReg_128RegClass);  in SITargetLowering()
131   addRegisterClass(MVT::v4i32, &AMDGPU::SReg_128RegClass);  in SITargetLowering()
132   addRegisterClass(MVT::v4f32, &AMDGPU::VReg_128RegClass);  in SITargetLowering()
134   addRegisterClass(MVT::v8i32, &AMDGPU::SReg_256RegClass);  in SITargetLowering()
135   addRegisterClass(MVT::v8f32, &AMDGPU::VReg_256RegClass);  in SITargetLowering()
137   addRegisterClass(MVT::v16i32, &AMDGPU::SReg_512RegClass);  in SITargetLowering()
138   addRegisterClass(MVT::v16f32, &AMDGPU::VReg_512RegClass);  in SITargetLowering()
141     addRegisterClass(MVT::i16, &AMDGPU::SReg_32_XM0RegClass);  in SITargetLowering()
142     addRegisterClass(MVT::f16, &AMDGPU::SReg_32_XM0RegClass);  in SITargetLowering()
145     addRegisterClass(MVT::v2i16, &AMDGPU::SReg_32_XM0RegClass);  in SITargetLowering()
146     addRegisterClass(MVT::v2f16, &AMDGPU::SReg_32_XM0RegClass);  in SITargetLowering()
147     addRegisterClass(MVT::v4i16, &AMDGPU::SReg_64RegClass);  in SITargetLowering()
148     addRegisterClass(MVT::v4f16, &AMDGPU::SReg_64RegClass);  in SITargetLowering()