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Searched refs:addDef (Results 1 – 25 of 28) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DShadowCallStack.cpp92 addDirectMem(BuildMI(MBB, MBBI, DL, TII->get(X86::MOV64rm)).addDef(ReturnReg), in addProlog()
96 .addDef(OffsetReg) in addProlog()
105 BuildMI(MBB, MBBI, DL, TII->get(X86::MOV64rm)).addDef(OffsetReg), X86::GS, in addProlog()
118 .addDef(FreeRegister), in addPrologLeaf()
128 .addDef(X86::R11) in addEpilog()
132 addSegmentedMem(BuildMI(MBB, MI, DL, TII->get(X86::MOV64rm)).addDef(X86::R10), in addEpilog()
135 addSegmentedMem(BuildMI(MBB, MI, DL, TII->get(X86::MOV64rm)).addDef(X86::R10), in addEpilog()
169 .addDef(X86::R10) in addEpilogOnlyR10()
173 addSegmentedMem(BuildMI(MBB, MI, DL, TII->get(X86::MOV64rm)).addDef(X86::R10), in addEpilogOnlyR10()
176 addSegmentedMem(BuildMI(MBB, MI, DL, TII->get(X86::MOV64rm)).addDef(X86::R10), in addEpilogOnlyR10()
H A DX86CallLowering.cpp314 MIB.addDef(PhysReg, RegState::Implicit); in markPhysRegUsed()
434 .addDef(X86::AL) in lowerCall()
H A DX86InstructionSelector.cpp260 .addDef(ExtSrc) in selectCopy()
824 .addDef(TransitRegTo) in selectZext()
830 .addDef(DstReg) in selectZext()
921 .addDef(DstReg) in selectAnyext()
1781 .addDef(DstReg) in selectDivRem()
H A DX86FlagsCopyLowering.cpp829 .addDef(TmpReg, RegState::Dead) in rewriteArithmetic()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64InstructionSelector.cpp340 .addDef(CopyReg) in selectFP16CopyFromGPR32()
344 .addDef(SubRegCopy) in selectFP16CopyFromGPR32()
414 .addDef(PromoteReg) in selectCopy()
655 .addDef(ArgsAddrReg) in selectVaStartDarwin()
896 .addDef(DefReg) in select()
975 .addDef(SrcReg) in select()
1271 .addDef(ExtSrc) in select()
1308 .addDef(SrcXReg) in select()
1487 .addDef(Def1Reg) in select()
1502 .addDef(DefReg) in select()
[all …]
H A DAArch64SpeculationHardening.cpp232 .addDef(MisspeculatingTaintReg) in insertTrackingCode()
370 .addDef(AArch64::XZR) in insertSPToRegTaintPropagation()
376 .addDef(MisspeculatingTaintReg) in insertSPToRegTaintPropagation()
393 .addDef(TmpReg) in insertRegToSPTaintPropagation()
399 .addDef(TmpReg, RegState::Renamable) in insertRegToSPTaintPropagation()
405 .addDef(AArch64::SP) in insertRegToSPTaintPropagation()
453 .addDef(Reg) in makeGPRSpeculationSafe()
577 .addDef(DstReg) in expandSpeculationSafeValue()
H A DAArch64CallLowering.cpp119 MIB.addDef(PhysReg, RegState::Implicit); in markPhysRegUsed()
H A DAArch64FastISel.cpp5075 .addDef(ResultReg1) in selectAtomicCmpXchg()
5076 .addDef(ScratchReg) in selectAtomicCmpXchg()
5082 .addDef(VT == MVT::i32 ? AArch64::WZR : AArch64::XZR) in selectAtomicCmpXchg()
5088 .addDef(ResultReg2) in selectAtomicCmpXchg()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp159 .addDef(HILOReg) in select()
167 .addDef(I.getOperand(0).getReg()) in select()
190 .addDef(LUiReg) in select()
194 .addDef(I.getOperand(0).getReg()) in select()
215 .addDef(LUiReg) in select()
220 .addDef(I.getOperand(0).getReg()) in select()
H A DMipsCallLowering.cpp122 MIB.addDef(PhysReg, RegState::Implicit); in markPhysRegUsed()
466 MIB.addDef(Mips::SP, RegState::Implicit); in lowerCall()
/freebsd-12.1/contrib/llvm/lib/CodeGen/GlobalISel/
H A DIRTranslator.cpp337 .addDef(getOrCreateVReg(U)) in translateFSub()
346 .addDef(getOrCreateVReg(U)) in translateFNeg()
763 MIB.addDef(DstReg); in getStackGuard()
783 .addDef(ResRegs[0]) in translateOverflowIntrinsic()
784 .addDef(ResRegs[1]) in translateOverflowIntrinsic()
894 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
902 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
909 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
916 .addDef(getOrCreateVReg(CI)) in translateKnownIntrinsic()
1379 .addDef(getOrCreateVReg(U)) in translateVAArg()
[all …]
H A DMachineIRBuilder.cpp166 .addDef(Res) in buildFrameIndex()
178 .addDef(Res) in buildGlobalValue()
195 .addDef(Res) in buildGEP()
224 .addDef(Res) in buildPtrMask()
307 .addDef(Res) in buildLoadInstr()
423 .addDef(Res) in buildExtract()
540 .addDef(Res) in buildInsert()
553 MIB.addDef(Res); in buildIntrinsic()
622 .addDef(OldValRes) in buildAtomicCmpXchgWithSuccess()
648 .addDef(OldValRes) in buildAtomicCmpXchg()
[all …]
H A DLegalizerHelper.cpp981 .addDef(QuotReg) in lower()
1009 .addDef(HiPart) in lower()
1023 .addDef(Shifted) in lower()
1061 .addDef(Res) in lower()
1077 MIRBuilder.buildInstr(TargetOpcode::G_FNEG).addDef(Neg).addUse(RHS); in lower()
1079 .addDef(Res) in lower()
H A DRegBankSelect.cpp163 MIRBuilder.buildInstrNoInsert(TargetOpcode::COPY).addDef(Dst).addUse(Src); in repairReg()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp443 .addDef(DestReg) in putConstant()
546 .addDef(ResReg) in insertComparison()
703 .addDef(ResReg) in selectSelect()
776 .addDef(SExtResult) in select()
825 .addDef(DstReg) in select()
826 .addDef(IgnoredBits) in select()
H A DThumb1FrameLowering.cpp368 .addDef(ARM::CPSR) in emitPrologue()
374 .addDef(ARM::CPSR) in emitPrologue()
H A DARMCallLowering.cpp497 MIB.addDef(PhysReg, RegState::Implicit); in markPhysRegUsed()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h76 MIB.addDef(Reg); in addDefToMIB()
79 MIB.addDef(MRI.createGenericVirtualRegister(LLTTy)); in addDefToMIB()
82 MIB.addDef(MRI.createVirtualRegister(RC)); in addDefToMIB()
H A DInstructionSelectorImpl.h734 OutMIs[InsnID].addDef(RegNum, RegState::Implicit); in executeMatchTable()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIShrinkInstructions.cpp435 .addDef(X1.Reg, 0, X1.SubReg) in matchSwap()
436 .addDef(Y1.Reg, 0, Y1.SubReg) in matchSwap()
H A DSIFormMemoryClauses.cpp367 B.addDef(R.first, S, SubReg); in runOnMachineFunction()
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DLiveDebugVariables.cpp267 void addDef(SlotIndex Idx, const MachineOperand &LocMO, bool IsIndirect) { in addDef() function in __anon9d48ada90211::UserValue
581 UV->addDef(Idx, MI.getOperand(0), IsIndirect); in handleDebugValue()
585 UV->addDef(Idx, MO, false); in handleDebugValue()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.cpp673 .addDef(Hexagon::D15) in insertEpilogueInBlock()
721 .addDef(Hexagon::D15) in insertEpilogueInBlock()
727 .addDef(Hexagon::D15) in insertEpilogueInBlock()
756 .addDef(SP) in insertAllocframe()
768 .addDef(SP) in insertAllocframe()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DMachineInstrBuilder.h103 const MachineInstrBuilder &addDef(unsigned RegNo, unsigned Flags = 0,
/freebsd-12.1/contrib/llvm/include/llvm/TableGen/
H A DRecord.h1635 void addDef(std::unique_ptr<Record> R) { in addDef() function

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