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Searched refs:SignBit (Results 1 – 7 of 7) sorted by relevance

/freebsd-12.1/contrib/llvm/include/llvm/DebugInfo/DWARF/
H A DDWARFExpression.h45 SignBit = 0x8, enumerator
46 SignedSize1 = SignBit | Size1,
47 SignedSize2 = SignBit | Size2,
48 SignedSize4 = SignBit | Size4,
49 SignedSize8 = SignBit | Size8,
50 SignedSizeLEB = SignBit | SizeLEB,
/freebsd-12.1/contrib/llvm/lib/DebugInfo/DWARF/
H A DDWARFExpression.cpp128 unsigned Signed = Size & Operation::SignBit; in extract()
133 switch (Size & ~Operation::SignBit) { in extract()
243 unsigned Signed = Size & Operation::SignBit; in print()
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeFloatTypes.cpp265 SDValue SignBit = DAG.getNode( in SoftenFloatRes_FCOPYSIGN() local
269 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit); in SoftenFloatRes_FCOPYSIGN()
274 SignBit = in SoftenFloatRes_FCOPYSIGN()
275 DAG.getNode(ISD::SRL, dl, RVT, SignBit, in SoftenFloatRes_FCOPYSIGN()
277 TLI.getShiftAmountTy(SignBit.getValueType(), in SoftenFloatRes_FCOPYSIGN()
279 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit); in SoftenFloatRes_FCOPYSIGN()
281 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit); in SoftenFloatRes_FCOPYSIGN()
282 SignBit = in SoftenFloatRes_FCOPYSIGN()
283 DAG.getNode(ISD::SHL, dl, LVT, SignBit, in SoftenFloatRes_FCOPYSIGN()
285 TLI.getShiftAmountTy(SignBit.getValueType(), in SoftenFloatRes_FCOPYSIGN()
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H A DLegalizeDAG.cpp71 uint8_t SignBit; member
1434 State.SignBit = NumBits - 1; in getSignAsIntValue()
1470 State.SignBit = 7; in getSignAsIntValue()
1508 SDValue Cond = DAG.getSetCC(DL, getSetCCResultType(IntVT), SignBit, in ExpandFCOPYSIGN()
1522 int ShiftAmount = SignAsInt.SignBit - MagAsInt.SignBit; in ExpandFCOPYSIGN()
1525 SignBit = DAG.getNode(ISD::ZERO_EXTEND, DL, MagVT, SignBit); in ExpandFCOPYSIGN()
1530 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
1533 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
1536 SignBit = DAG.getNode(ISD::TRUNCATE, DL, MagVT, SignBit); in ExpandFCOPYSIGN()
2358 SDValue SignBit = DAG.getConstant(0x80000000u, dl, MVT::i32); in ExpandLegalINT_TO_FP() local
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H A DDAGCombiner.cpp10159 SDValue SignBit = DAG.getConstant( in visitBITCAST() local
10163 FlipBit = SignBit; in visitBITCAST()
10172 FlipBit = DAG.getNode(ISD::AND, SDLoc(N0), MVT::i64, Hi, SignBit); in visitBITCAST()
10180 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); in visitBITCAST() local
10183 NewConv, DAG.getConstant(SignBit, DL, VT)); in visitBITCAST()
10186 NewConv, DAG.getConstant(~SignBit, DL, VT)); in visitBITCAST()
10228 APInt SignBit = APInt::getSignMask(VT.getSizeInBits() / 2); in visitBITCAST() local
10242 DAG.getConstant(SignBit, SDLoc(XorResult64), MVT::i64)); in visitBITCAST()
10249 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); in visitBITCAST() local
10251 X, DAG.getConstant(SignBit, SDLoc(X), VT)); in visitBITCAST()
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/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp2034 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); in LowerFTRUNC() local
2037 SDValue SignBit64 = DAG.getBuildVector(MVT::v2i32, SL, {Zero, SignBit}); in LowerFTRUNC()
2373 const SDValue SignBit = DAG.getConstant(63, SL, MVT::i64); in LowerINT_TO_FP32() local
2374 S = DAG.getNode(ISD::SRA, SL, MVT::i64, L, SignBit); in LowerINT_TO_FP32()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp18696 SDValue SignBit = DAG.getNode(X86ISD::FAND, dl, LogicVT, Sign, SignMask); in LowerFCOPYSIGN() local
18714 SDValue Or = DAG.getNode(X86ISD::FOR, dl, LogicVT, MagBits, SignBit); in LowerFCOPYSIGN()