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/freebsd-12.1/contrib/llvm/tools/lldb/tools/lldb-mi/
H A DMICmdCommands.cpp77 bOk &= Register<CMICmdCmdBreakAfter>(); in RegisterAll()
93 bOk &= Register<CMICmdCmdExecAbort>(); in RegisterAll()
98 bOk &= Register<CMICmdCmdExecNext>(); in RegisterAll()
100 bOk &= Register<CMICmdCmdExecRun>(); in RegisterAll()
101 bOk &= Register<CMICmdCmdExecStep>(); in RegisterAll()
104 bOk &= Register<CMICmdCmdGdbExit>(); in RegisterAll()
105 bOk &= Register<CMICmdCmdGdbInfo>(); in RegisterAll()
106 bOk &= Register<CMICmdCmdGdbSet>(); in RegisterAll()
107 bOk &= Register<CMICmdCmdGdbShow>(); in RegisterAll()
108 bOk &= Register<CMICmdCmdGdbThread>(); in RegisterAll()
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/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonGenPredicate.cpp49 struct Register { struct
70 Register Reg;
103 using RegToRegMap = std::map<Register, Register>;
119 Register getPredRegFor(const Register &Reg);
243 Register HexagonGenPredicate::getPredRegFor(const Register &Reg) { in getPredRegFor()
278 return Register(NewPR); in getPredRegFor()
321 std::queue<Register> WorkQ; in isScalarPred()
325 Register PR = WorkQ.front(); in isScalarPred()
376 Register Reg(MO); in convertToPredForm()
414 Register OutR(Op0); in convertToPredForm()
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H A DHexagonConstPropagation.cpp83 struct Register { struct
370 bool evaluateANDrr(const Register &R1, const Register &R2,
375 bool evaluateORrr(const Register &R1, const Register &R2,
380 bool evaluateXORrr(const Register &R1, const Register &R2,
623 Register DefR(MD); in visitPHI()
650 Register UseR(SO); in visitPHI()
693 Register DefR(MO); in visitNonBranch()
1925 Register DefR(MD); in evaluate()
2283 Register PR(MD); in evaluate()
2505 bool HexagonConstEvaluator::evaluateHexRSEQ32(Register RL, Register RH, in evaluateHexRSEQ32()
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/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DR600RegisterInfo.td2 class R600Reg <string name, bits<16> encoding> : Register<name> {
8 Register <name> {
19 class R600Reg_128<string n, list<Register> subregs, bits<16> encoding> :
40 [!cast<Register>("T"#lo#"_"#chan), !cast<Register>("T"#hi#"_"#chan)],
55 [!cast<Register>("T"#Index#"_X"),
56 !cast<Register>("T"#Index#"_Y"),
74 [!cast<Register>("T0_"#Chan),
75 !cast<Register>("T1_"#Chan),
76 !cast<Register>("T2_"#Chan),
77 !cast<Register>("T3_"#Chan)],
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H A DSIRegisterInfo.td122 class FlatReg <Register lo, Register hi, bits<16> encoding> :
262 list<Register> subRegs,
281 Register r0 = !cast<Register>("TTMP"#index0#tgt),
282 Register r1 = !cast<Register>("TTMP"#index1#tgt),
283 Register r2 = !cast<Register>("TTMP"#index2#tgt),
284 Register r3 = !cast<Register>("TTMP"#index3#tgt),
285 Register r4 = !cast<Register>("TTMP"#index4#tgt),
286 Register r5 = !cast<Register>("TTMP"#index5#tgt),
287 Register r6 = !cast<Register>("TTMP"#index6#tgt),
288 Register r7 = !cast<Register>("TTMP"#index7#tgt)> :
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/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCChecker.cpp438 std::get<2>(Producer).Register != Consumer.Register) { in checkNewValues()
447 if (std::get<2>(Producer).Register == Consumer.Register && in checkNewValues()
538 (ProducerPredicate.Register == ConsumerPredicate.Register && in registerProducer()
672 switch (Register) { in compoundRegisterMap()
676 Register = Hexagon::R23; in compoundRegisterMap()
679 Register = Hexagon::R22; in compoundRegisterMap()
682 Register = Hexagon::R21; in compoundRegisterMap()
685 Register = Hexagon::R20; in compoundRegisterMap()
688 Register = Hexagon::R19; in compoundRegisterMap()
691 Register = Hexagon::R18; in compoundRegisterMap()
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H A DHexagonMCChecker.h80 bool registerUsed(unsigned Register);
82 registerProducer(unsigned Register,
119 void reportErrorRegisters(unsigned Register);
120 void reportErrorNewValue(unsigned Register);
/freebsd-12.1/contrib/llvm/include/llvm/MC/
H A DMachineLocation.h26 unsigned Register = 0; ///< gcc/gdb register number. variable
38 : IsRegister(!Indirect), Register(R) {}
41 return IsRegister == Other.IsRegister && Register == Other.Register;
48 unsigned getReg() const { return Register; } in getReg()
50 void setRegister(unsigned R) { Register = R; } in setRegister()
H A DMCDwarf.h440 unsigned Register; variable
448 : Operation(Op), Label(L), Register(R), Offset(O), in MCCFIInstruction()
454 : Operation(Op), Label(L), Register(R1), Register2(R2) { in MCCFIInstruction()
463 return MCCFIInstruction(OpDefCfa, L, Register, -Offset, ""); in createDefCfa()
469 return MCCFIInstruction(OpDefCfaRegister, L, Register, 0, ""); in createDefCfaRegister()
490 return MCCFIInstruction(OpOffset, L, Register, Offset, ""); in createOffset()
498 return MCCFIInstruction(OpRelOffset, L, Register, Offset, ""); in createRelOffset()
522 return MCCFIInstruction(OpRestore, L, Register, 0, ""); in createRestore()
528 return MCCFIInstruction(OpUndefined, L, Register, 0, ""); in createUndefined()
534 return MCCFIInstruction(OpSameValue, L, Register, 0, ""); in createSameValue()
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H A DMCStreamer.h886 virtual void EmitCFIDefCfa(int64_t Register, int64_t Offset);
888 virtual void EmitCFIDefCfaRegister(int64_t Register);
889 virtual void EmitCFIOffset(int64_t Register, int64_t Offset);
894 virtual void EmitCFISameValue(int64_t Register);
895 virtual void EmitCFIRestore(int64_t Register);
896 virtual void EmitCFIRelOffset(int64_t Register, int64_t Offset);
899 virtual void EmitCFIReturnColumn(int64_t Register);
902 virtual void EmitCFIUndefined(int64_t Register);
917 virtual void EmitWinCFISetFrame(unsigned Register, unsigned Offset,
920 virtual void EmitWinCFISaveReg(unsigned Register, unsigned Offset,
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/freebsd-12.1/contrib/llvm/lib/Transforms/IPO/
H A DCalledValuePropagation.cpp48 enum class IPOGrouping { Register, Return, Memory }; enumerator
125 case IPOGrouping::Register: in ComputeLatticeVal()
205 if (Key.getInt() == IPOGrouping::Register) in PrintLatticeKey()
262 auto RegI = CVPLatticeKey(I, IPOGrouping::Register); in visitCallSite()
284 auto RegFormal = CVPLatticeKey(&A, IPOGrouping::Register); in visitCallSite()
305 auto RegI = CVPLatticeKey(&I, IPOGrouping::Register); in visitSelect()
306 auto RegT = CVPLatticeKey(I.getTrueValue(), IPOGrouping::Register); in visitSelect()
307 auto RegF = CVPLatticeKey(I.getFalseValue(), IPOGrouping::Register); in visitSelect()
318 auto RegI = CVPLatticeKey(&I, IPOGrouping::Register); in visitLoad()
351 auto RegI = CVPLatticeKey(&I, IPOGrouping::Register); in visitInst()
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/freebsd-12.1/contrib/llvm/lib/MC/
H A DMCWin64EH.cpp72 b2 |= (inst.Register & 0x0F) << 4; in EmitUnwindCode()
100 b2 |= (inst.Register & 0x0F) << 4; in EmitUnwindCode()
387 reg = inst.Register - 19; in ARM64EmitUnwindCode()
395 reg = inst.Register - 19; in ARM64EmitUnwindCode()
403 reg = inst.Register - 19; in ARM64EmitUnwindCode()
411 reg = inst.Register - 19; in ARM64EmitUnwindCode()
419 reg = inst.Register - 8; in ARM64EmitUnwindCode()
427 reg = inst.Register - 8; in ARM64EmitUnwindCode()
435 reg = inst.Register - 8; in ARM64EmitUnwindCode()
443 reg = inst.Register - 8; in ARM64EmitUnwindCode()
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H A DMCAsmStreamer.cpp59 void EmitRegisterName(int64_t Register);
1457 OS << Register; in EmitRegisterName()
1463 EmitRegisterName(Register); in EmitCFIDefCfa()
1503 EmitRegisterName(Register); in EmitCFIDefCfaRegister()
1510 EmitRegisterName(Register); in EmitCFIOffset()
1543 MCStreamer::EmitCFIRestore(Register); in EmitCFIRestore()
1545 EmitRegisterName(Register); in EmitCFIRestore()
1552 EmitRegisterName(Register); in EmitCFISameValue()
1559 EmitRegisterName(Register); in EmitCFIRelOffset()
1578 OS << "\t.cfi_undefined " << Register; in EmitCFIUndefined()
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H A DMCStreamer.cpp416 MCCFIInstruction::createDefCfa(Label, Register, Offset); in EmitCFIDefCfa()
444 void MCStreamer::EmitCFIDefCfaRegister(int64_t Register) { in EmitCFIDefCfaRegister() argument
447 MCCFIInstruction::createDefCfaRegister(Label, Register); in EmitCFIDefCfaRegister()
511 void MCStreamer::EmitCFISameValue(int64_t Register) { in EmitCFISameValue() argument
514 MCCFIInstruction::createSameValue(Label, Register); in EmitCFISameValue()
521 void MCStreamer::EmitCFIRestore(int64_t Register) { in EmitCFIRestore() argument
524 MCCFIInstruction::createRestore(Label, Register); in EmitCFIRestore()
557 void MCStreamer::EmitCFIUndefined(int64_t Register) { in EmitCFIUndefined() argument
560 MCCFIInstruction::createUndefined(Label, Register); in EmitCFIUndefined()
596 void MCStreamer::EmitCFIReturnColumn(int64_t Register) { in EmitCFIReturnColumn() argument
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp176 unsigned Register = (Insn >> 18) & 0x1f; in decodeRiMemoryValue() local
177 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRiMemoryValue()
188 unsigned Register = (Insn >> 15) & 0x1f; in decodeRrMemoryValue() local
189 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRrMemoryValue()
190 Register = (Insn >> 10) & 0x1f; in decodeRrMemoryValue()
191 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeRrMemoryValue()
200 unsigned Register = (Insn >> 12) & 0x1f; in decodeSplsValue() local
201 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Register])); in decodeSplsValue()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp453 if (Register == AArch64::XZR) in DecodeGPR64spRegisterClass()
454 Register = AArch64::SP; in DecodeGPR64spRegisterClass()
487 if (Register == AArch64::WZR) in DecodeGPR32spRegisterClass()
488 Register = AArch64::WSP; in DecodeGPR32spRegisterClass()
509 unsigned Register = ZPRDecoderTable[RegNo]; in DecodeZPRRegisterClass() local
546 unsigned Register = ZZDecoderTable[RegNo]; in DecodeZPR2RegisterClass() local
570 unsigned Register = ZZZDecoderTable[RegNo]; in DecodeZPR3RegisterClass() local
611 unsigned Register = PPRDecoderTable[RegNo]; in DecodePPRRegisterClass() local
662 unsigned Register = QQDecoderTable[RegNo]; in DecodeQQRegisterClass() local
685 unsigned Register = QQQDecoderTable[RegNo]; in DecodeQQQRegisterClass() local
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/freebsd-12.1/sys/dev/acpica/Osd/
H A DOsdHardware.c101 AcpiOsReadPciConfiguration(ACPI_PCI_ID *PciId, UINT32 Register, UINT64 *Value, in AcpiOsReadPciConfiguration() argument
116 PciId->Function, Register, Width / 8); in AcpiOsReadPciConfiguration()
124 AcpiOsWritePciConfiguration (ACPI_PCI_ID *PciId, UINT32 Register, in AcpiOsWritePciConfiguration() argument
138 pci_cfgregwrite(PciId->Bus, PciId->Device, PciId->Function, Register, in AcpiOsWritePciConfiguration()
/freebsd-12.1/contrib/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.td1 //===- LanaiRegisterInfo.td - Lanai Register defs ------------*- tablegen -*-===//
13 class LanaiReg<bits<5> num, string n, list<Register> subregs = [],
14 list<string> altNames = []> : Register<n, altNames> {
30 // Register aliases
45 // Register classes.
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsRegisterInfo.td217 def PC : Register<"pc">;
231 [!cast<Register>("LO"#I), !cast<Register>("HI"#I)]>;
236 def DSPPos : Register<"">;
237 def DSPSCount : Register<"">;
238 def DSPCarry : Register<"">;
239 def DSPEFI : Register<"">;
241 def DSPOutFlag20 : Register<"">;
242 def DSPOutFlag21 : Register<"">;
245 def DSPCCond : Register<"">;
274 // Register Classes
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/freebsd-12.1/contrib/llvm/lib/Target/BPF/
H A DBPFRegisterInfo.td1 //===-- BPFRegisterInfo.td - BPF Register defs -------------*- tablegen -*-===//
18 class Wi<bits<16> Enc, string n> : Register<n> {
25 class Ri<bits<16> Enc, string n, list<Register> subregs>
39 // Register classes.
/freebsd-12.1/contrib/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfExpression.cpp43 assert((LocationKind == Unknown || LocationKind == Register) && in addReg()
45 LocationKind = Register; in addReg()
56 assert(LocationKind != Register && "location description already locked down"); in addBReg()
355 assert(LocationKind != Register); in addExpression()
376 assert(LocationKind != Register); in addExpression()
385 assert(LocationKind != Register); in addExpression()
392 assert(LocationKind != Register); in addExpression()
396 assert(LocationKind != Register); in addExpression()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp462 unsigned Register = in getSingleInstruction() local
464 if ((Register & 0x6) == 0) in getSingleInstruction()
467 unsigned Lookback = (Register & 0x6) >> 1; in getSingleInstruction()
488 bool SubregBit = (Register & 0x1) != 0; in getSingleInstruction()
668 unsigned Register = CtrlRegDecoderTable[RegNo]; in DecodeCtrRegsRegisterClass() local
669 Inst.addOperand(MCOperand::createReg(Register)); in DecodeCtrRegsRegisterClass()
697 Inst.addOperand(MCOperand::createReg(Register)); in DecodeCtrRegs64RegisterClass()
704 unsigned Register = 0; in DecodeModRegsRegisterClass() local
707 Register = Hexagon::M0; in DecodeModRegsRegisterClass()
710 Register = Hexagon::M1; in DecodeModRegsRegisterClass()
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/freebsd-12.1/contrib/llvm/tools/lldb/source/Plugins/ABI/SysV-ppc64/
H A DABISysV_ppc64.cpp409 class Register { class in __anon1cbc4b130111::ReturnValueExtractor
419 Register(Type ty, uint32_t index, uint32_t offs, RegisterContext *reg_ctx, in Register() function in __anon1cbc4b130111::ReturnValueExtractor::Register
426 Register(Type ty, uint32_t index, RegisterContext *reg_ctx, in Register() function in __anon1cbc4b130111::ReturnValueExtractor::Register
428 : Register(ty, index, 0, reg_ctx, byte_order) {} in Register()
431 Register(uint32_t offs, RegisterContext *reg_ctx, ByteOrder byte_order) in Register() function in __anon1cbc4b130111::ReturnValueExtractor::Register
495 Register GetGPR(uint32_t index) const { in GetGPR()
496 return Register(Register::GPR, index, m_reg_ctx, m_byte_order); in GetGPR()
499 Register GetFPR(uint32_t index) const { in GetFPR()
500 return Register(Register::FPR, index, m_reg_ctx, m_byte_order); in GetFPR()
503 Register GetGPRByOffs(uint32_t offs) const { in GetGPRByOffs()
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/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/AsmParser/
H A DSystemZAsmParser.cpp402 struct Register { struct in __anone89483630111::SystemZAsmParser
408 bool parseRegister(Register &Reg);
422 bool parseAddressRegister(Register &Reg);
764 Register Reg; in parseRegister()
779 const MCExpr *Register; in parseAnyRegister() local
781 if (Parser.parseExpression(Register)) in parseAnyRegister()
798 Register Reg; in parseAnyRegister()
901 Register Reg1, Reg2; in parseAddress()
1129 Register Reg; in ParseRegister()
1202 Register Reg; in parseOperand()
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/freebsd-12.1/contrib/llvm/include/llvm/Target/
H A DTargetCallingConv.td89 class CCAssignToReg<list<Register> regList> : CCAction {
90 list<Register> RegList = regList;
95 class CCAssignToRegWithShadow<list<Register> regList,
96 list<Register> shadowList> : CCAction {
97 list<Register> RegList = regList;
98 list<Register> ShadowRegList = shadowList;
115 list<Register> shadowList> : CCAction {
118 list<Register> ShadowRegList = shadowList;

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