49   struct Register {  struct
52     Register(unsigned r = 0, unsigned s = 0) : R(r), S(s) {}  in Register()  function
53     Register(const MachineOperand &MO) : R(MO.getReg()), S(MO.getSubReg()) {}  in Register()  function
55     bool operator== (const Register &Reg) const {  in operator ==()  argument
59     bool operator< (const Register &Reg) const {  in operator <()  argument
67     PrintRegister(Register R, const TargetRegisterInfo &I) : Reg(R), TRI(I) {}  in PrintRegister()
70     Register Reg;
102     using SetOfReg = std::set<Register>;
103     using RegToRegMap = std::map<Register, Register>;
114     void processPredicateGPR(const Register &Reg);
118     bool isScalarPred(Register PredReg);
119     Register getPredRegFor(const Register &Reg);
214             Register RD = MI->getOperand(0);  in collectPredicateGPR()
224 void HexagonGenPredicate::processPredicateGPR(const Register &Reg) {  in processPredicateGPR()
243 Register HexagonGenPredicate::getPredRegFor(const Register &Reg) {  in getPredRegFor()
258     Register PR = DefI->getOperand(1);  in getPredRegFor()
275     G2P.insert(std::make_pair(Reg, Register(NewPR)));  in getPredRegFor()
276     LLVM_DEBUG(dbgs() << " -> !" << PrintRegister(Register(NewPR), *TRI)  in getPredRegFor()
278     return Register(NewPR);  in getPredRegFor()
320 bool HexagonGenPredicate::isScalarPred(Register PredReg) {  in isScalarPred()
321   std::queue<Register> WorkQ;  in isScalarPred()
325     Register PR = WorkQ.front();  in isScalarPred()
354             WorkQ.push(Register(MO.getReg()));  in isScalarPred()
376     Register Reg(MO);  in convertToPredForm()
403     Register PR = getPredRegFor(MI->getOperand(1));  in convertToPredForm()
414   Register OutR(Op0);  in convertToPredForm()
420   Register NewPR = MRI->createVirtualRegister(PredRC);  in convertToPredForm()
425     Register GPR = MI->getOperand(i);  in convertToPredForm()
426     Register Pred = getPredRegFor(GPR);  in convertToPredForm()
444     Register R(NewOutR);  in convertToPredForm()
471       Register DR = MI.getOperand(0);  in eliminatePredCopies()
472       Register SR = MI.getOperand(1);  in eliminatePredCopies()