| /freebsd-12.1/contrib/llvm/tools/lldb/include/lldb/Core/ |
| H A D | Opcode.h | 35 class Opcode {
85 case Opcode::eType8:
87 case Opcode::eType16:
91 case Opcode::eType32:
93 case Opcode::eType64:
105 case Opcode::eType8:
107 case Opcode::eType16:
111 case Opcode::eType32:
125 case Opcode::eType8:
144 case Opcode::eType8:
[all …]
|
| /freebsd-12.1/contrib/llvm/tools/lldb/source/Core/ |
| H A D | Opcode.cpp | 31 case Opcode::eType8: in Dump()
34 case Opcode::eType16: in Dump()
37 case Opcode::eType16_2: in Dump()
38 case Opcode::eType32: in Dump()
42 case Opcode::eType64: in Dump()
46 case Opcode::eTypeBytes: in Dump()
70 case Opcode::eType8: in GetDataByteOrder()
71 case Opcode::eType16: in GetDataByteOrder()
72 case Opcode::eType16_2: in GetDataByteOrder()
73 case Opcode::eType32: in GetDataByteOrder()
[all …]
|
| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 319 bool isSALU(uint16_t Opcode) const { in isSALU() argument
336 return isMUBUF(Opcode) || isMTBUF(Opcode) || isMIMG(Opcode); in isVMEM()
449 bool isDS(uint16_t Opcode) const { in isDS() argument
491 bool isEXP(uint16_t Opcode) const { in isEXP() argument
499 bool isWQM(uint16_t Opcode) const { in isWQM() argument
531 bool isDPP(uint16_t Opcode) const { in isDPP() argument
964 int getVOPe64(uint16_t Opcode);
967 int getVOPe32(uint16_t Opcode);
970 int getSDWAOp(uint16_t Opcode);
973 int getDPPOp32(uint16_t Opcode);
[all …]
|
| H A D | R600InstrInfo.h | 86 bool isALUInstr(unsigned Opcode) const;
87 bool hasInstrModifiers(unsigned Opcode) const;
88 bool isLDSInstr(unsigned Opcode) const;
89 bool isLDSRetInstr(unsigned Opcode) const;
95 bool isTransOnly(unsigned Opcode) const;
97 bool isVectorOnly(unsigned Opcode) const;
99 bool isExport(unsigned Opcode) const;
101 bool usesVertexCache(unsigned Opcode) const;
103 bool usesTextureCache(unsigned Opcode) const;
160 bool isMov(unsigned Opcode) const;
[all …]
|
| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZTargetTransformInfo.cpp | 79 switch (Opcode) { in getIntImmCost()
374 Opcode == Instruction::SDiv || Opcode == Instruction::SRem; in getArithmeticInstrCost()
376 Opcode == Instruction::UDiv || Opcode == Instruction::URem; in getArithmeticInstrCost()
403 if (Opcode == Instruction::Shl || Opcode == Instruction::LShr || in getArithmeticInstrCost()
423 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub || in getArithmeticInstrCost()
424 Opcode == Instruction::FMul || Opcode == Instruction::FDiv) { in getArithmeticInstrCost()
462 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub || in getArithmeticInstrCost()
463 Opcode == Instruction::FMul || Opcode == Instruction::FDiv) in getArithmeticInstrCost()
644 if (Opcode == Instruction::ZExt || Opcode == Instruction::UIToFP) in getBoolVecToIntConversionCost()
668 if (Opcode == Instruction::ZExt || Opcode == Instruction::SExt) { in getCastInstrCost()
[all …]
|
| H A D | SystemZInstrInfo.cpp | 283 unsigned Opcode; in emitGRX32Move() local
853 unsigned Opcode; in copyPhysReg() local
939 switch (Opcode) { in interpretAndImmediate()
1110 Opcode = (Opcode == SystemZ::AHI ? SystemZ::ASI : SystemZ::AGSI); in foldMemoryOperandImpl()
1150 if (Opcode == SystemZ::LGDR || Opcode == SystemZ::LDGR) { in foldMemoryOperandImpl()
1547 return Opcode; in getOpcodeForOffset()
1557 return Opcode; in getOpcodeForOffset()
1563 switch (Opcode) { in getLoadAndTest()
1635 switch (Opcode) { in getFusedCompare()
1750 switch (Opcode) { in getLoadAndTrap()
[all …]
|
| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86AvoidStoreForwardingBlocks.cpp | 134 return Opcode == X86::MOVUPSrm || Opcode == X86::MOVAPSrm || in isXMMLoadOpcode()
135 Opcode == X86::VMOVUPSrm || Opcode == X86::VMOVAPSrm || in isXMMLoadOpcode()
136 Opcode == X86::VMOVUPDrm || Opcode == X86::VMOVAPDrm || in isXMMLoadOpcode()
137 Opcode == X86::VMOVDQUrm || Opcode == X86::VMOVDQArm || in isXMMLoadOpcode()
144 return Opcode == X86::VMOVUPSYrm || Opcode == X86::VMOVAPSYrm || in isYMMLoadOpcode()
145 Opcode == X86::VMOVUPDYrm || Opcode == X86::VMOVAPDYrm || in isYMMLoadOpcode()
146 Opcode == X86::VMOVDQUYrm || Opcode == X86::VMOVDQAYrm || in isYMMLoadOpcode()
154 return isXMMLoadOpcode(Opcode) || isYMMLoadOpcode(Opcode); in isPotentialBlockedMemCpyLd()
212 Opcode == X86::MOV32mr || Opcode == X86::MOV32mi || in isPotentialBlockingStoreInst()
213 Opcode == X86::MOV16mr || Opcode == X86::MOV16mi || in isPotentialBlockingStoreInst()
[all …]
|
| H A D | X86TargetTransformInfo.h | 66 unsigned Opcode, Type *Ty,
73 int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
75 int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
77 int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
78 int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
82 int getGatherScatterOpCost(unsigned Opcode, Type *DataTy, Value *Ptr,
96 int getArithmeticReductionCost(unsigned Opcode, Type *Ty,
102 int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
107 int getInterleavedMemoryOpCostAVX512(unsigned Opcode, Type *VecTy,
112 int getInterleavedMemoryOpCostAVX2(unsigned Opcode, Type *VecTy,
[all …]
|
| H A D | X86ExpandPseudo.cpp | 116 EmitCondJump(Opcode, ThenMBB); in ExpandICallBranchFunnel()
174 unsigned Opcode = MI.getOpcode(); in ExpandMI() local
176 switch (Opcode) { in ExpandMI()
187 bool isMem = Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64; in ExpandMI()
202 if (Opcode == X86::TCRETURNdicc || Opcode == X86::TCRETURNdi64cc) { in ExpandMI()
214 if (Opcode == X86::TCRETURNdi || Opcode == X86::TCRETURNdicc || in ExpandMI()
215 Opcode == X86::TCRETURNdi64 || Opcode == X86::TCRETURNdi64cc) { in ExpandMI()
217 switch (Opcode) { in ExpandMI()
249 } else if (Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64) { in ExpandMI()
250 unsigned Op = (Opcode == X86::TCRETURNmi) in ExpandMI()
[all …]
|
| /freebsd-12.1/contrib/llvm/include/llvm/IR/ |
| H A D | Instruction.h | 147 return Opcode >= UnaryOpsBegin && Opcode < UnaryOpsEnd;
150 return Opcode >= BinaryOpsBegin && Opcode < BinaryOpsEnd;
154 return Opcode == UDiv || Opcode == SDiv || Opcode == URem || Opcode == SRem;
159 return Opcode >= Shl && Opcode <= AShr;
174 return Opcode == And || Opcode == Or || Opcode == Xor;
467 return Opcode == And || Opcode == Or || Opcode == Xor ||
468 Opcode == Add || Opcode == Mul;
480 switch (Opcode) {
498 return Opcode == And || Opcode == Or;
511 static bool isNilpotent(unsigned Opcode) {
[all …]
|
| /freebsd-12.1/contrib/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerInfo.cpp | 47 OS << Opcode << ", Tys={"; in print()
53 OS << Opcode << ", MMOs={"; in print()
220 Opcode, TypeIdx, ElementSize, in computeTables()
267 assert(Opcode >= FirstOp && Opcode <= LastOp && "Unsupported opcode"); in getOpcodeIdxForOpcode()
268 return Opcode - FirstOp; in getOpcodeIdxForOpcode()
483 if (Aspect.Opcode < FirstOp || Aspect.Opcode > LastOp) in findScalarLegalAction()
514 if (Aspect.Opcode < FirstOp || Aspect.Opcode > LastOp) in findVectorLegalAction()
548 for (unsigned Opcode = FirstOp; Opcode <= LastOp; ++Opcode) { in verify() local
557 LLVM_DEBUG(dbgs() << MII.getName(Opcode) << " (opcode " << Opcode in verify()
562 FailedOpcodes.push_back(Opcode); in verify()
[all …]
|
| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetTransformInfo.cpp | 116 return BaseT::getIntImmCost(Opcode, Idx, Imm, Ty); in getIntImmCost()
127 switch (Opcode) { in getIntImmCost()
328 unsigned Opcode, Type *Ty, TTI::OperandValueKind Op1Info, in getArithmeticInstrCost() argument
355 return BaseT::getCastInstrCost(Opcode, Dst, Src); in getCastInstrCost()
366 int ISD = TLI->InstructionOpcodeToISD(Opcode); in getVectorInstrCost()
374 return BaseT::getVectorInstrCost(Opcode, Val, Index); in getVectorInstrCost()
380 return BaseT::getVectorInstrCost(Opcode, Val, Index); in getVectorInstrCost()
399 return BaseT::getVectorInstrCost(Opcode, Val, Index); in getVectorInstrCost()
406 assert((Opcode == Instruction::Load || Opcode == Instruction::Store) && in getMemoryOpCost()
440 if (Opcode == Instruction::Load && in getMemoryOpCost()
[all …]
|
| H A D | PPCInstrInfo.cpp | 3505 if (Opcode == PPC::LI || Opcode == PPC::LI8 || in isSignExtendingOp()
3506 Opcode == PPC::LIS || Opcode == PPC::LIS8 || in isSignExtendingOp()
3507 Opcode == PPC::SRAW || Opcode == PPC::SRAWo || in isSignExtendingOp()
3508 Opcode == PPC::SRAWI || Opcode == PPC::SRAWIo || in isSignExtendingOp()
3509 Opcode == PPC::LWA || Opcode == PPC::LWAX || in isSignExtendingOp()
3510 Opcode == PPC::LWA_32 || Opcode == PPC::LWAX_32 || in isSignExtendingOp()
3511 Opcode == PPC::LHA || Opcode == PPC::LHAX || in isSignExtendingOp()
3512 Opcode == PPC::LHA8 || Opcode == PPC::LHAX8 || in isSignExtendingOp()
3513 Opcode == PPC::LBZ || Opcode == PPC::LBZX || in isSignExtendingOp()
3548 if (Opcode == PPC::LI || Opcode == PPC::LI8 || in isZeroExtendingOp()
[all …]
|
| H A D | PPCMIPeephole.cpp | 145 Opcode == PPC::RLDCL || Opcode == PPC::RLDCLo) in getKnownLeadingZeroCount()
165 Opcode == PPC::CNTLZW8 || Opcode == PPC::CNTTZW8) in getKnownLeadingZeroCount()
170 Opcode == PPC::CNTTZD || Opcode == PPC::CNTTZDo) in getKnownLeadingZeroCount()
174 if (Opcode == PPC::LHZ || Opcode == PPC::LHZX || in getKnownLeadingZeroCount()
175 Opcode == PPC::LHZ8 || Opcode == PPC::LHZX8 || in getKnownLeadingZeroCount()
176 Opcode == PPC::LHZU || Opcode == PPC::LHZUX || in getKnownLeadingZeroCount()
177 Opcode == PPC::LHZU8 || Opcode == PPC::LHZUX8) in getKnownLeadingZeroCount()
180 if (Opcode == PPC::LBZ || Opcode == PPC::LBZX || in getKnownLeadingZeroCount()
181 Opcode == PPC::LBZ8 || Opcode == PPC::LBZX8 || in getKnownLeadingZeroCount()
182 Opcode == PPC::LBZU || Opcode == PPC::LBZUX || in getKnownLeadingZeroCount()
[all …]
|
| /freebsd-12.1/contrib/llvm/tools/llvm-readobj/ |
| H A D | ARMEHABIPrinter.h | 101 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_00xxxxxx() local
107 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_01xxxxxx() local
126 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011101() local
131 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011111() local
136 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_1001nnnn() local
137 SW.startLine() << format("0x%02X ; vsp = r%u\n", Opcode, (Opcode & 0x0f)); in Decode_1001nnnn()
141 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10100nnn() local
148 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10101nnn() local
155 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10110000() local
172 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10110010_uleb128() local
[all …]
|
| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonTargetTransformInfo.cpp | 153 unsigned HexagonTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src, in getMemoryOpCost() argument
155 assert(Opcode == Instruction::Load || Opcode == Instruction::Store); in getMemoryOpCost()
156 if (Opcode == Instruction::Store) in getMemoryOpCost()
191 unsigned HexagonTTIImpl::getMaskedMemoryOpCost(unsigned Opcode, in getMaskedMemoryOpCost() argument
207 unsigned HexagonTTIImpl::getInterleavedMemoryOpCost(unsigned Opcode, in getInterleavedMemoryOpCost() argument
222 if (Opcode == Instruction::FCmp) in getCmpSelInstrCost()
225 return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, I); in getCmpSelInstrCost()
237 return BaseT::getArithmeticInstrCost(Opcode, Ty, Opd1Info, Opd2Info, in getArithmeticInstrCost()
241 unsigned HexagonTTIImpl::getCastInstrCost(unsigned Opcode, Type *DstTy, in getCastInstrCost() argument
258 if (Opcode == Instruction::InsertElement) { in getVectorInstrCost()
[all …]
|
| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 217 bool isAM3 = Opcode == ARM::LDRD || Opcode == ARM::STRD; in getMemoryOpOffset()
221 if (Opcode == ARM::t2LDRi12 || Opcode == ARM::t2LDRi8 || in getMemoryOpOffset()
222 Opcode == ARM::t2STRi12 || Opcode == ARM::t2STRi8 || in getMemoryOpOffset()
224 Opcode == ARM::LDRi12 || Opcode == ARM::STRi12) in getMemoryOpOffset()
228 if (Opcode == ARM::tLDRi || Opcode == ARM::tSTRi || in getMemoryOpOffset()
229 Opcode == ARM::tLDRspi || Opcode == ARM::tSTRspi) in getMemoryOpOffset()
772 Opcode = getLoadStoreMultipleOpcode(Opcode, Mode); in CreateLoadStoreMulti()
947 assert(isi32Store(Opcode) || Opcode == ARM::VSTRS || Opcode == ARM::VSTRD); in MergeOpsUpdate()
976 if (!isi32Load(Opcode) && !isi32Store(Opcode)) in mayCombineMisaligned()
1390 if (isi32Load(Opcode) || isi32Store(Opcode)) in MergeBaseUpdateLoadStore()
[all …]
|
| /freebsd-12.1/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMUnwindOpAsm.h | 73 void EmitInt8(unsigned Opcode) { in EmitInt8() argument
74 Ops.push_back(Opcode & 0xff); in EmitInt8()
78 void EmitInt16(unsigned Opcode) { in EmitInt16() argument
79 Ops.push_back((Opcode >> 8) & 0xff); in EmitInt16()
80 Ops.push_back(Opcode & 0xff); in EmitInt16()
84 void EmitBytes(const uint8_t *Opcode, size_t Size) { in EmitBytes() argument
85 Ops.insert(Ops.end(), Opcode, Opcode + Size); in EmitBytes()
|
| /freebsd-12.1/contrib/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.cpp | 41 uint8_t Opcode = Data.getU8(Offset); in parse() local
64 switch (Opcode) { in parse()
68 Opcode); in parse()
74 addInstruction(Opcode); in parse()
115 addInstruction(Opcode, op1, op2); in parse()
125 addInstruction(Opcode, op1, op2); in parse()
130 addInstruction(Opcode, 0); in parse()
143 addInstruction(Opcode, RegNum, 0); in parse()
222 uint8_t Opcode = Instr.Opcode; in printOperand() local
232 OS << format(" Opcode %x", Opcode); in printOperand()
[all …]
|
| H A D | DWARFExpression.cpp | 118 Opcode = Data.getU8(&Offset); in extract()
120 Desc = getOpDesc(Opcode); in extract()
200 if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx) in prettyPrintRegisterOp()
202 else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx) in prettyPrintRegisterOp()
203 DwarfRegNum = Opcode - DW_OP_breg0; in prettyPrintRegisterOp()
205 DwarfRegNum = Opcode - DW_OP_reg0; in prettyPrintRegisterOp()
210 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) || in prettyPrintRegisterOp()
211 Opcode == DW_OP_bregx) in prettyPrintRegisterOp()
235 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) || in print()
236 (Opcode >= DW_OP_reg0 && Opcode <= DW_OP_reg31) || in print()
[all …]
|
| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.h | 60 bool isWideningInstruction(Type *Ty, unsigned Opcode,
77 int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty);
113 int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
116 int getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
119 int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
122 unsigned Opcode, Type *Ty,
131 int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
134 int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
147 int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor,
169 bool useReductionIntrinsic(unsigned Opcode, Type *Ty,
[all …]
|
| /freebsd-12.1/contrib/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfo.h | 797 int getCFInstrCost(unsigned Opcode) const;
802 int getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
1002 bool useReductionIntrinsic(unsigned Opcode, Type *Ty,
1142 virtual int getCFInstrCost(unsigned Opcode) = 0;
1229 return Impl.getOperationCost(Opcode, Ty, OpTy); in getOperationCost()
1474 return Impl.getCastInstrCost(Opcode, Dst, Src, I); in getCastInstrCost()
1480 int getCFInstrCost(unsigned Opcode) override { in getCFInstrCost() argument
1481 return Impl.getCFInstrCost(Opcode); in getCFInstrCost()
1488 return Impl.getVectorInstrCost(Opcode, Val, Index); in getVectorInstrCost()
1613 bool useReductionIntrinsic(unsigned Opcode, Type *Ty, in useReductionIntrinsic() argument
[all …]
|
| /freebsd-12.1/sys/contrib/dev/acpica/components/executer/ |
| H A D | exoparg2.c | 218 switch (WalkState->Opcode) in AcpiExOpcode_2A_0T_0R()
255 WalkState->Opcode)); in AcpiExOpcode_2A_0T_0R()
287 AcpiPsGetOpcodeName (WalkState->Opcode)); in AcpiExOpcode_2A_2T_1R()
292 switch (WalkState->Opcode) in AcpiExOpcode_2A_2T_1R()
328 WalkState->Opcode)); in AcpiExOpcode_2A_2T_1R()
398 AcpiPsGetOpcodeName (WalkState->Opcode)); in AcpiExOpcode_2A_1T_1R()
415 WalkState->Opcode, in AcpiExOpcode_2A_1T_1R()
421 switch (WalkState->Opcode) in AcpiExOpcode_2A_1T_1R()
594 WalkState->Opcode)); in AcpiExOpcode_2A_1T_1R()
690 switch (WalkState->Opcode) in AcpiExOpcode_2A_0T_1R()
[all …]
|
| /freebsd-12.1/contrib/llvm/lib/Analysis/ |
| H A D | TargetTransformInfo.cpp | 59 int Cost = TTIImpl->getOperationCost(Opcode, Ty, OpTy); in getOperationCost()
441 unsigned Opcode, Type *Ty, OperandValueKind Opd1Info, in getArithmeticInstrCost() argument
460 assert ((I == nullptr || I->getOpcode() == Opcode) && in getCastInstrCost()
476 int Cost = TTIImpl->getCFInstrCost(Opcode); in getCFInstrCost()
483 assert ((I == nullptr || I->getOpcode() == Opcode) && in getCmpSelInstrCost()
501 assert ((I == nullptr || I->getOpcode() == Opcode) && in getMemoryOpCost()
727 : Opcode(Opcode), LHS(LHS), RHS(RHS), Kind(Kind) { in ReductionData()
730 unsigned Opcode = 0; member
735 return Kind == RD.Kind && Opcode == RD.Opcode; in hasSameData()
893 Opcode = RD->Opcode; in matchPairwiseReduction()
[all …]
|
| /freebsd-12.1/sys/contrib/dev/acpica/components/parser/ |
| H A D | psutils.c | 208 UINT16 Opcode) in AcpiPsInitOp() argument
214 Op->Common.AmlOpcode = Opcode; in AcpiPsInitOp()
217 (AcpiPsGetOpcodeInfo (Opcode))->Name, in AcpiPsInitOp()
239 UINT16 Opcode, in AcpiPsAllocOp() argument
250 OpInfo = AcpiPsGetOpcodeInfo (Opcode); in AcpiPsAllocOp()
262 else if (Opcode == AML_INT_BYTELIST_OP) in AcpiPsAllocOp()
286 AcpiPsInitOp (Op, Opcode); in AcpiPsAllocOp()
291 if (Opcode == AML_SCOPE_OP) in AcpiPsAllocOp()
|