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Searched refs:NumRegs (Results 1 – 25 of 52) sorted by relevance

123

/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DRegisterClassInfo.cpp96 unsigned NumRegs = RC->getNumRegs(); in compute() local
99 RCI.Order.reset(new MCPhysReg[NumRegs]); in compute()
128 RCI.NumRegs = N + CSRAlias.size(); in compute()
129 assert(RCI.NumRegs <= NumRegs && "Allocation order larger than regclass"); in compute()
142 if (StressRA && RCI.NumRegs > StressRA) in compute()
143 RCI.NumRegs = StressRA; in compute()
148 if (Super != RC && getNumAllocatableRegs(Super) > RCI.NumRegs) in compute()
156 for (unsigned I = 0; I != RCI.NumRegs; ++I) in compute()
H A DExecutionDomainFix.cpp71 assert(unsigned(rx) < NumRegs && "Invalid index"); in setLiveReg()
82 assert(unsigned(rx) < NumRegs && "Invalid index"); in kill()
92 assert(unsigned(rx) < NumRegs && "Invalid index"); in force()
122 for (unsigned rx = 0; rx != NumRegs; ++rx) in collapse()
144 for (unsigned rx = 0; rx != NumRegs; ++rx) { in merge()
160 LiveRegs.assign(NumRegs, nullptr); in enterBasicBlock()
178 for (unsigned rx = 0; rx != NumRegs; ++rx) { in enterBasicBlock()
421 assert(NumRegs == RC->getNumRegs() && "Bad regclass"); in runOnMachineFunction()
H A DLiveVariables.cpp426 for (unsigned Reg = 1, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) { in HandleRegMask() local
566 void LiveVariables::runOnBlock(MachineBasicBlock *MBB, const unsigned NumRegs) { in runOnBlock() argument
617 for (unsigned i = 0; i != NumRegs; ++i) in runOnBlock()
627 const unsigned NumRegs = TRI->getNumRegs(); in runOnMachineFunction() local
628 PhysRegDef.assign(NumRegs, nullptr); in runOnMachineFunction()
629 PhysRegUse.assign(NumRegs, nullptr); in runOnMachineFunction()
649 runOnBlock(MBB, NumRegs); in runOnMachineFunction()
651 PhysRegDef.assign(NumRegs, nullptr); in runOnMachineFunction()
652 PhysRegUse.assign(NumRegs, nullptr); in runOnMachineFunction()
H A DVirtRegMap.cpp78 unsigned NumRegs = MF->getRegInfo().getNumVirtRegs(); in grow() local
79 Virt2PhysMap.resize(NumRegs); in grow()
80 Virt2StackSlotMap.resize(NumRegs); in grow()
81 Virt2SplitMap.resize(NumRegs); in grow()
H A DMachineRegisterInfo.cpp49 unsigned NumRegs = getTargetRegisterInfo()->getNumRegs(); in MachineRegisterInfo() local
52 UsedPhysRegMask.resize(NumRegs); in MachineRegisterInfo()
53 PhysRegUseDefLists.reset(new MachineOperand*[NumRegs]()); in MachineRegisterInfo()
H A DMachineLICM.cpp495 unsigned NumRegs = TRI->getNumRegs(); in HoistRegionPostRA() local
496 BitVector PhysRegDefs(NumRegs); // Regs defined once in the loop. in HoistRegionPostRA()
497 BitVector PhysRegClobbers(NumRegs); // Regs defined more than once. in HoistRegionPostRA()
524 BitVector TermRegs(NumRegs); in HoistRegionPostRA()
H A DStackMaps.cpp263 for (unsigned Reg = 0, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) in parseRegisterLiveOutMask() local
/freebsd-12.1/contrib/llvm/lib/MCA/HardwareUnits/
H A DRegisterFile.cpp27 unsigned NumRegs) in RegisterFile() argument
31 initialize(SM, NumRegs);
34 void RegisterFile::initialize(const MCSchedModel &SM, unsigned NumRegs) { in initialize() argument
39 RegisterFiles.emplace_back(NumRegs); in initialize()
432 unsigned NumRegs = NumPhysRegs[I]; in isAvailable() local
433 if (!NumRegs) in isAvailable()
443 if (RMT.NumPhysRegs < NumRegs) { in isAvailable()
455 NumRegs = RMT.NumPhysRegs; in isAvailable()
458 if (RMT.NumPhysRegs < (RMT.NumUsedPhysRegs + NumRegs)) in isAvailable()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DRegisterClassInfo.h34 unsigned NumRegs = 0; member
43 return makeArrayRef(Order.get(), NumRegs);
91 return get(RC).NumRegs; in getNumAllocatableRegs()
H A DExecutionDomainFix.h117 const unsigned NumRegs; variable
132 : MachineFunctionPass(PassID), RC(&RC), NumRegs(RC.getNumRegs()) {} in ExecutionDomainFix()
H A DLiveVariables.h180 void runOnBlock(MachineBasicBlock *MBB, unsigned NumRegs);
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/InstPrinter/
H A DAMDGPUInstPrinter.cpp324 NumRegs = 1; in printRegOperand()
327 NumRegs = 1; in printRegOperand()
330 NumRegs = 2; in printRegOperand()
333 NumRegs = 2; in printRegOperand()
336 NumRegs = 4; in printRegOperand()
339 NumRegs = 4; in printRegOperand()
342 NumRegs = 3; in printRegOperand()
345 NumRegs = 8; in printRegOperand()
348 NumRegs = 8; in printRegOperand()
351 NumRegs = 16; in printRegOperand()
[all …]
/freebsd-12.1/contrib/llvm/include/llvm/MC/
H A DMCRegisterInfo.h151 unsigned NumRegs; // Number of entries in the array variable
253 NumRegs = NR; in InitMCRegisterInfo()
333 assert(RegNo < NumRegs &&
378 return NumRegs; in getNumRegs()
444 assert(RegNo < NumRegs && in getEncodingValue()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.cpp184 unsigned NumRegs = NextEmittedNumMemOps - EmittedNumMemOps; in EmitTargetCodeForMemcpy() local
187 DAG.getConstant(NumRegs, dl, MVT::i32)); in EmitTargetCodeForMemcpy()
191 DstPtrInfo = DstPtrInfo.getWithOffset(NumRegs * VTSize); in EmitTargetCodeForMemcpy()
192 SrcPtrInfo = SrcPtrInfo.getWithOffset(NumRegs * VTSize); in EmitTargetCodeForMemcpy()
H A DARMExpandPseudoInsts.cpp129 uint8_t NumRegs; // D registers loaded or stored member
477 unsigned NumRegs = TableEntry->NumRegs; in ExpandVLD() local
587 unsigned NumRegs = TableEntry->NumRegs; in ExpandVST() local
630 if (NumRegs > 1 && TableEntry->copyAllListRegs) in ExpandVST()
662 unsigned NumRegs = TableEntry->NumRegs; in ExpandLaneOp() local
688 if (NumRegs > 1) in ExpandLaneOp()
690 if (NumRegs > 2) in ExpandLaneOp()
692 if (NumRegs > 3) in ExpandLaneOp()
715 if (NumRegs > 1) in ExpandLaneOp()
717 if (NumRegs > 2) in ExpandLaneOp()
[all …]
/freebsd-12.1/contrib/llvm/include/llvm/MCA/HardwareUnits/
H A DRegisterFile.h185 void initialize(const MCSchedModel &SM, unsigned NumRegs);
189 unsigned NumRegs = 0);
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86CallingConv.h68 static const unsigned NumRegs = sizeof(RegList)/sizeof(RegList[0]); in CC_X86_32_MCUInReg() local
103 bool UseRegs = PendingMembers.size() <= std::min(2U, NumRegs - FirstFree); in CC_X86_32_MCUInReg()
/freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/
H A DWebAssemblyMachineFunctionInfo.cpp39 unsigned NumRegs = TLI.getNumRegisters(F.getContext(), VT); in ComputeLegalValueVTs() local
41 for (unsigned i = 0; i != NumRegs; ++i) in ComputeLegalValueVTs()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DRDFRegisters.cpp200 unsigned NumRegs = TRI.getNumRegs(); in aliasMM() local
204 for (unsigned w = 0, nw = NumRegs/32; w != nw; ++w) { in aliasMM()
215 unsigned TailRegs = NumRegs % 32; in aliasMM()
218 unsigned TW = NumRegs / 32; in aliasMM()
H A DHexagonBlockRanges.cpp475 unsigned NumRegs = TRI.getNumRegs(); in computeDeadMap() local
476 BitVector Visited(NumRegs); in computeDeadMap()
477 for (unsigned R = 1; R < NumRegs; ++R) { in computeDeadMap()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h225 const unsigned NumRegs = NumMergeRegs / NumDefs; in tryCombineMerges() local
228 for (unsigned j = 0, Idx = NumRegs * DefIdx + 1; j < NumRegs; in tryCombineMerges()
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp201 unsigned NumRegs = InlineAsm::getNumOperandRegisters(Flag); in tryInlineAsm() local
202 if (NumRegs) in tryInlineAsm()
219 || NumRegs != 2) in tryInlineAsm()
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp363 unsigned NumRegs; in getCopyFromPartsVector() local
370 NumRegs = in getCopyFromPartsVector()
696 unsigned NumRegs; in getCopyToPartsVector() local
702 NumRegs = in getCopyToPartsVector()
772 unsigned NumRegs = in RegsForValue() local
784 Reg += NumRegs; in RegsForValue()
810 Parts.resize(NumRegs); in getCopyFromRegs()
868 Part += NumRegs; in getCopyFromRegs()
7418 unsigned NumRegs = 1; in GetRegistersForValue() local
7438 for (; NumRegs; --NumRegs, ++I) { in GetRegistersForValue()
[all …]
/freebsd-12.1/contrib/llvm/tools/clang/lib/CodeGen/
H A DTargetInfo.cpp4197 NumRegs = Builder.CreateAdd(NumRegs, Builder.getInt8(1)); in EmitVAArg()
4198 NumRegs = Builder.CreateAnd(NumRegs, Builder.getInt8((uint8_t) ~1U)); in EmitVAArg()
4241 NumRegs = in EmitVAArg()
4242 Builder.CreateAdd(NumRegs, in EmitVAArg()
4689 uint32_t NumRegs = in isHomogeneousAggregateSmallEnough() local
4696 return Members * NumRegs <= 8; in isHomogeneousAggregateSmallEnough()
5279 unsigned NumRegs = 1; in EmitAAPCSVAArg() local
5327 RegSize = 16 * NumRegs; in EmitAAPCSVAArg()
7595 unsigned NumRegs = 0; in numRegsForType() local
7620 return NumRegs; in numRegsForType()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/InstPrinter/
H A DAArch64InstPrinter.cpp1254 unsigned NumRegs = 1; in printVectorList() local
1258 NumRegs = 2; in printVectorList()
1262 NumRegs = 3; in printVectorList()
1266 NumRegs = 4; in printVectorList()
1284 for (unsigned i = 0; i < NumRegs; ++i, Reg = getNextVectorRegister(Reg)) { in printVectorList()
1290 if (i + 1 != NumRegs) in printVectorList()

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