| /freebsd-12.1/contrib/llvm/tools/llvm-mca/Views/ |
| H A D | DispatchStatistics.cpp | 42 double Percentage = ((double)Entry.second / NumCycles) * 100.0; in printDispatchHistogram()
53 unsigned NumCycles) { in printStalls() argument
59 double Percentage = ((double)NumStalls / NumCycles) * 100.0; in printStalls()
69 printStalls(SS, HWStalls[HWStallEvent::RegisterFileStall], NumCycles); in printDispatchStalls()
71 printStalls(SS, HWStalls[HWStallEvent::RetireControlUnitStall], NumCycles); in printDispatchStalls()
73 printStalls(SS, HWStalls[HWStallEvent::SchedulerQueueFull], NumCycles); in printDispatchStalls()
75 printStalls(SS, HWStalls[HWStallEvent::LoadQueueFull], NumCycles); in printDispatchStalls()
77 printStalls(SS, HWStalls[HWStallEvent::StoreQueueFull], NumCycles); in printDispatchStalls()
79 printStalls(SS, HWStalls[HWStallEvent::DispatchGroupStall], NumCycles); in printDispatchStalls()
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| H A D | RetireControlUnitStatistics.cpp | 22 : NumRetired(0), NumCycles(0), EntriesInUse(0), MaxUsedEntries(0), in RetireControlUnitStatistics()
51 ++NumCycles; in onCycleEnd()
70 << format("%.1f", ((double)Entry.second / NumCycles) * 100.0) in printView()
74 unsigned AvgUsage = (double)SumOfUsedEntries / NumCycles; in printView()
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| H A D | DispatchStatistics.h | 47 unsigned NumCycles; variable
67 : NumDispatched(0), NumCycles(0), in DispatchStatistics()
74 void onCycleBegin() override { NumCycles++; } in onCycleBegin()
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| H A D | SchedulerStatistics.cpp | 24 NumCycles(0), MostRecentLoadDispatched(~0U), in SchedulerStatistics()
122 << format("%.1f", ((double)IPC / NumCycles) * 100) << "%)\n"; in printSchedulerStats()
129 assert(NumCycles && "Unexpected number of cycles!"); in printSchedulerUsage()
151 double AvgUsage = (double)BU.CumulativeNumUsedSlots / NumCycles; in printSchedulerUsage()
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| H A D | SchedulerStatistics.h | 54 unsigned NumCycles; variable
76 void onCycleBegin() override { NumCycles++; } in onCycleBegin()
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| H A D | RetireControlUnitStatistics.h | 44 unsigned NumCycles; variable
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| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.h | 220 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
228 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
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| H A D | SystemZInstrInfo.cpp | 697 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
711 return NumCycles == 1; in isProfitableToIfCvt()
725 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
728 return NumCycles == 1; in isProfitableToDupForIfCvt()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrInfo.h | 185 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
188 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
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| H A D | R600InstrInfo.cpp | 902 unsigned NumCycles, in isProfitableToIfCvt() argument
921 unsigned NumCycles, in isProfitableToDupForIfCvt() argument
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 267 unsigned NumCycles, unsigned ExtraPredCycles,
275 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
277 return NumCycles == 1; in isProfitableToDupForIfCvt()
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| H A D | ARMScheduleA9.td | 2039 foreach NumCycles = 2-8 in {
2040 def A9WriteCycle#NumCycles : WriteSequence<[A9WriteCycle1], NumCycles>;
2041 } // foreach NumCycles
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| H A D | ARMBaseInstrInfo.cpp | 1893 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
1895 if (!NumCycles) in isProfitableToIfCvt()
1922 return isProfitableToIfCvt(MBB, NumCycles, ExtraPredCycles, in isProfitableToIfCvt()
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 319 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
330 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.h | 154 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
176 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
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| H A D | HexagonInstrInfo.cpp | 761 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | IfConversion.cpp | 1003 unsigned NumCycles = SchedModel.computeInstrLatency(&MI, false); in ScanInstructions() local
1004 if (NumCycles > 1) in ScanInstructions()
1005 BBI.ExtraCost += NumCycles-1; in ScanInstructions()
2063 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in CopyAndPredicateBlock() local
2064 if (NumCycles > 1) in CopyAndPredicateBlock()
2065 ToBBI.ExtraCost += NumCycles-1; in CopyAndPredicateBlock()
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| H A D | MachinePipeliner.cpp | 833 unsigned NumCycles = getSUnit(MI)->Latency; in calculateResMII() local
837 for (unsigned C = 0; C < NumCycles; ++C) in calculateResMII()
850 for (unsigned C = ReservedCycles; C < NumCycles; ++C) { in calculateResMII()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 692 virtual bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToIfCvt() argument
719 unsigned NumCycles, in isProfitableToDupForIfCvt() argument
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedThunderX2T99.td | 92 // All definitions follow the format: THX2T99Write_<NumCycles>Cyc_<Resources>.
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