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Searched refs:NewMask (Results 1 – 21 of 21) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DRegisterPressure.cpp55 if (PrevMask.any() || NewMask.none()) in increaseSetPressure()
69 if (NewMask.any() || PrevMask.none()) in decreaseSetPressure()
143 if (PreviousMask.any() || NewMask.none()) in increaseRegPressure()
693 LaneBitmask NewMask = PrevMask | P.LaneMask; in addLiveRegs() local
707 LaneBitmask NewMask; in discoverLiveInOrOut() local
710 NewMask = Pair.LaneMask; in discoverLiveInOrOut()
714 NewMask = PrevMask | Pair.LaneMask; in discoverLiveInOrOut()
715 I->LaneMask = NewMask; in discoverLiveInOrOut()
772 if (NewMask.none()) { in recede()
792 if (NewMask == PreviousMask) in recede()
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/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DGCNRegPressure.cpp97 LaneBitmask NewMask, in inc() argument
99 if (NewMask == PrevMask) in inc()
103 if (NewMask < PrevMask) { in inc()
104 std::swap(NewMask, PrevMask); in inc()
113 assert(PrevMask.none() && NewMask == MaxMask); in inc()
119 assert(NewMask < MaxMask || NewMask == MaxMask); in inc()
120 assert(PrevMask < NewMask); in inc()
123 Sign * (~PrevMask & NewMask).getNumLanes(); in inc()
126 assert(NewMask.any()); in inc()
H A DSIModeRegister.cpp67 unsigned NewMask = (Mask & S.Mask) & (Mode ^ ~S.Mode); in intersect() local
68 unsigned NewMode = (Mode & NewMask); in intersect()
69 return Status(NewMask, NewMode); in intersect()
H A DGCNRegPressure.h59 LaneBitmask NewMask,
H A DSIISelLowering.cpp7379 unsigned NewMask = LCC == ISD::SETO ? in performAndCombine() local
7385 DAG.getConstant(NewMask, DL, MVT::i32)); in performAndCombine()
7473 uint32_t NewMask = (CLHS->getZExtValue() | CRHS->getZExtValue()) & MaxMask; in performOrCombine() local
7476 Src, DAG.getConstant(NewMask, DL, MVT::i32)); in performOrCombine()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAGHVX.cpp841 MutableArrayRef<int> NewMask, unsigned Options = None);
843 MutableArrayRef<int> NewMask);
1053 ResultStack &Results, MutableArrayRef<int> NewMask, in packs() argument
1079 memcpy(NewMask.data(), SM.Mask.data(), sizeof(int)*VecLen); in packs()
1087 NewMask[I] = M; in packs()
1117 NewMask[I] = M; in packs()
1140 NewMask[I] = M; in packs()
1192 NewMask[I] = M; in packp()
1249 SmallVector<int,128> NewMask(VecLen); in shuffs2() local
1250 OpRef P = packs(SM, Va, Vb, Results, NewMask); in shuffs2()
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/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DRegisterPressure.h554 LaneBitmask NewMask);
556 LaneBitmask NewMask);
/freebsd-12.1/contrib/llvm/lib/Transforms/InstCombine/
H A DInstCombineAndOrXor.cpp283 unsigned NewMask; in conjugateICmpMask() local
284 NewMask = (Mask & (AMask_AllOnes | BMask_AllOnes | Mask_AllZeros | in conjugateICmpMask()
292 return NewMask; in conjugateICmpMask()
514 Value *NewMask = ConstantInt::get(BCst->getType(), BorD); in foldLogOpOfMaskedICmps_NotAllZeros_BMask_Mixed() local
516 Value *NewAnd = Builder.CreateAnd(A, NewMask); in foldLogOpOfMaskedICmps_NotAllZeros_BMask_Mixed()
693 APInt NewMask = BCst->getValue() & DCst->getValue(); in foldLogOpOfMaskedICmps() local
695 if (NewMask == BCst->getValue()) in foldLogOpOfMaskedICmps()
697 else if (NewMask == DCst->getValue()) in foldLogOpOfMaskedICmps()
706 APInt NewMask = BCst->getValue() | DCst->getValue(); in foldLogOpOfMaskedICmps() local
708 if (NewMask == BCst->getValue()) in foldLogOpOfMaskedICmps()
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H A DInstCombineSimplifyDemanded.cpp298 APInt NewMask = ~(LHSKnown.One & RHSKnown.One & DemandedMask); in SimplifyDemandedUseBits() local
301 ConstantInt::get(I->getType(), NewMask & AndRHS->getValue()); in SimplifyDemandedUseBits()
306 ConstantInt::get(I->getType(), NewMask & XorRHS->getValue()); in SimplifyDemandedUseBits()
H A DInstCombineVectorOps.cpp1514 SmallVector<Constant *, 16> NewMask(NumElts); in foldIdentityExtractShuffle() local
1521 NewMask[i] = isa<UndefValue>(ExtractMaskElt) ? ExtractMaskElt : MaskElt; in foldIdentityExtractShuffle()
1523 return new ShuffleVectorInst(X, Y, ConstantVector::get(NewMask)); in foldIdentityExtractShuffle()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp1310 SDValue NewMask = DAG.getConstant(0xff, DL, VT); in foldMaskAndShiftToExtract() local
1312 SDValue And = DAG.getNode(ISD::AND, DL, VT, Srl, NewMask); in foldMaskAndShiftToExtract()
1323 insertDAGNode(DAG, N, NewMask); in foldMaskAndShiftToExtract()
1357 SDValue NewMask = DAG.getConstant(Mask >> ShiftAmt, DL, VT); in foldMaskedShiftToScaledMask() local
1358 SDValue NewAnd = DAG.getNode(ISD::AND, DL, VT, X, NewMask); in foldMaskedShiftToScaledMask()
1366 insertDAGNode(DAG, N, NewMask); in foldMaskedShiftToScaledMask()
1521 SDValue NewMask = DAG.getConstant(Mask >> AMShiftAmt, DL, VT); in foldMaskedShiftToBEXTR() local
1522 SDValue NewAnd = DAG.getNode(ISD::AND, DL, VT, NewSRL, NewMask); in foldMaskedShiftToBEXTR()
1533 insertDAGNode(DAG, N, NewMask); in foldMaskedShiftToBEXTR()
3337 SDValue NewMask = CurDAG->getConstant(NegMaskVal, SDLoc(And), VT); in shrinkAndImmediate() local
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H A DX86ISelLowering.cpp12303 NewMask[V2Index] -= 4; in lowerVectorShuffleWithSHUFPS()
12327 NewMask[2] -= 4; in lowerVectorShuffleWithSHUFPS()
12328 NewMask[3] -= 4; in lowerVectorShuffleWithSHUFPS()
12333 NewMask[0] -= 4; in lowerVectorShuffleWithSHUFPS()
12334 NewMask[1] -= 4; in lowerVectorShuffleWithSHUFPS()
14254 if (NewMask[i] < 0) in lowerVectorShuffleByMerging128BitLanes()
16053 for (int &M : NewMask) in lowerVectorShuffle()
37487 SDValue NewMask; in combineMaskedLoad() local
37497 NewMask = DAG.getVectorShuffle(WideVecVT, dl, NewMask, in combineMaskedLoad()
37626 SDValue NewMask; in combineMaskedStore() local
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H A DX86InstrInfo.cpp6436 unsigned NewMask = 0; in AdjustBlendMask() local
6444 NewMask |= (1u << i); in AdjustBlendMask()
6453 NewMask |= (SubMask << (i * Scale)); in AdjustBlendMask()
6459 *pNewMask = NewMask; in AdjustBlendMask()
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp256 SmallVector<int, 8> NewMask; in ShuffleWithNarrowerEltType() local
261 NewMask.push_back(-1); in ShuffleWithNarrowerEltType()
263 NewMask.push_back(Idx * NumEltsGrowth + j); in ShuffleWithNarrowerEltType()
266 assert(NewMask.size() == NumDestElts && "Non-integer NumEltsGrowth?"); in ShuffleWithNarrowerEltType()
267 assert(TLI.isShuffleMaskLegal(NewMask, NVT) && "Shuffle not legal?"); in ShuffleWithNarrowerEltType()
268 return DAG.getVectorShuffle(NVT, dl, N1, N2, NewMask); in ShuffleWithNarrowerEltType()
2912 SmallVector<int, 32> NewMask; in ExpandNode() local
2950 NewMask.push_back(Mask[i]); in ExpandNode()
2954 NewMask.push_back(Mask[i]*factor+fi); in ExpandNode()
2957 Mask = NewMask; in ExpandNode()
H A DDAGCombiner.cpp10300 SmallVector<int, 8> NewMask; in visitBITCAST() local
17477 SmallVector<int, 32> NewMask; in combineShuffleOfSplat() local
17483 NewMask); in combineShuffleOfSplat()
17581 SmallVector<int, 8> NewMask; in visitVECTOR_SHUFFLE() local
17585 NewMask.push_back(Idx); in visitVECTOR_SHUFFLE()
17597 SmallVector<int, 8> NewMask; in visitVECTOR_SHUFFLE() local
17604 NewMask.push_back(Idx); in visitVECTOR_SHUFFLE()
17707 SmallVector<int, 8> NewMask; in visitVECTOR_SHUFFLE() local
17711 return NewMask; in visitVECTOR_SHUFFLE()
17738 SmallVector<int, 8> NewMask; in visitVECTOR_SHUFFLE() local
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H A DLegalizeVectorTypes.cpp3620 SmallVector<int, 16> NewMask; in WidenVecRes_VECTOR_SHUFFLE() local
3624 NewMask.push_back(Idx); in WidenVecRes_VECTOR_SHUFFLE()
3626 NewMask.push_back(Idx - NumElts + WidenNumElts); in WidenVecRes_VECTOR_SHUFFLE()
3629 NewMask.push_back(-1); in WidenVecRes_VECTOR_SHUFFLE()
3630 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, NewMask); in WidenVecRes_VECTOR_SHUFFLE()
H A DTargetLowering.cpp1748 SmallVector<int, 32> NewMask(ShuffleMask.begin(), ShuffleMask.end()); in SimplifyDemandedVectorElts() local
1750 int &M = NewMask[i]; in SimplifyDemandedVectorElts()
1765 isShuffleMaskLegal(NewMask, VT)) in SimplifyDemandedVectorElts()
1768 Op.getOperand(1), NewMask)); in SimplifyDemandedVectorElts()
H A DLegalizeIntegerTypes.cpp3671 ArrayRef<int> NewMask = SV->getMask().slice(0, VT.getVectorNumElements()); in PromoteIntRes_VECTOR_SHUFFLE() local
3677 return DAG.getVectorShuffle(OutVT, dl, V0, V1, NewMask); in PromoteIntRes_VECTOR_SHUFFLE()
H A DSelectionDAG.cpp2098 APInt NewMask = Mask << Amt; in GetDemandedBits() local
2099 if (SDValue SimplifyLHS = GetDemandedBits(V.getOperand(0), NewMask)) in GetDemandedBits()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp271 unsigned NewMask = 0; in rewindImplicitITPosition() local
272 NewMask |= ITState.Mask & (0xC << TZ); in rewindImplicitITPosition()
273 NewMask |= 0x2 << TZ; in rewindImplicitITPosition()
274 ITState.Mask = NewMask; in rewindImplicitITPosition()
336 unsigned NewMask = 0; in extendImplicitITBlock() local
338 NewMask |= ITState.Mask & (0xE << TZ); in extendImplicitITBlock()
340 NewMask |= (Cond == ITState.Cond) << TZ; in extendImplicitITBlock()
342 NewMask |= 1 << (TZ - 1); in extendImplicitITBlock()
343 ITState.Mask = NewMask; in extendImplicitITBlock()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp11542 SmallVector<int, 16> NewMask; in PerformVECTOR_SHUFFLECombine() local
11553 NewMask.push_back(NewElt); in PerformVECTOR_SHUFFLECombine()
11556 DAG.getUNDEF(VT), NewMask); in PerformVECTOR_SHUFFLECombine()
13690 auto UseMask = [Mask, Op, VT, &TLO](unsigned NewMask) -> bool { in targetShrinkDemandedConstant() argument
13691 if (NewMask == Mask) in targetShrinkDemandedConstant()
13694 SDValue NewC = TLO.DAG.getConstant(NewMask, DL, VT); in targetShrinkDemandedConstant()