| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 3689 if (!LoadVT.isVector()) in adjustLoadValueTypeImpl()
3721 EVT LoadVT = M->getValueType(0); in adjustLoadValueType() local
3723 EVT EquivLoadVT = LoadVT; in adjustLoadValueType()
3727 LoadVT.getVectorNumElements()) : LoadVT; in adjustLoadValueType()
4850 if ((LoadVT.isVector() && LoadVT.getVectorNumElements() < DMaskLanes) || in lowerImage()
5076 MVT LoadVT = VT.getSimpleVT(); in lowerSBuffer() local
5077 unsigned NumElts = LoadVT.isVector() ? LoadVT.getVectorNumElements() : 1; in lowerSBuffer()
5084 LoadVT = MVT::v4i32; in lowerSBuffer()
5562 EVT LoadVT = Op.getValueType(); in LowerINTRINSIC_W_CHAIN() local
5590 EVT LoadVT = Op.getValueType(); in LowerINTRINSIC_W_CHAIN() local
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 390 virtual bool isLoadBitCastBeneficial(EVT LoadVT, in isLoadBitCastBeneficial() argument
394 if (!LoadVT.isSimple() || !BitcastVT.isSimple()) in isLoadBitCastBeneficial()
397 MVT LoadMVT = LoadVT.getSimpleVT(); in isLoadBitCastBeneficial()
2229 EVT LoadVT = getValueType(DL, Load->getType()); in isExtLoad() local
2233 if (!Load->hasOneUse() && (isTypeLegal(LoadVT) || !isTypeLegal(VT)) && in isExtLoad()
2246 return isLoadExtLegal(LType, VT, LoadVT); in isExtLoad()
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| H A D | BasicTTIImpl.h | 669 EVT LoadVT = EVT::getEVT(Src);
672 if (TLI->isLoadExtLegal(LType, ExtVT, LoadVT))
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 632 EVT LoadVT = WideVT; in ExpandLoad() local
635 LoadVT = EVT::getIntegerVT(*DAG.getContext(), LoadBytes << 3); in ExpandLoad()
639 LD->getPointerInfo().getWithOffset(Offset), LoadVT, in ExpandLoad()
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| H A D | SelectionDAGBuilder.cpp | 6657 static SDValue getMemCmpLoad(const Value *PtrVal, MVT LoadVT, in getMemCmpLoad() argument
6665 if (LoadVT.isVector()) in getMemCmpLoad()
6666 LoadTy = VectorType::get(LoadTy, LoadVT.getVectorNumElements()); in getMemCmpLoad()
6770 MVT LoadVT; in visitMemCmpCall() local
6776 LoadVT = MVT::i16; in visitMemCmpCall()
6779 LoadVT = MVT::i32; in visitMemCmpCall()
6784 LoadVT = hasFastLoadsAndCompare(NumBitsToCompare); in visitMemCmpCall()
6788 if (LoadVT == MVT::INVALID_SIMPLE_VALUE_TYPE) in visitMemCmpCall()
6791 SDValue LoadL = getMemCmpLoad(LHS, LoadVT, *this); in visitMemCmpCall()
6792 SDValue LoadR = getMemCmpLoad(RHS, LoadVT, *this); in visitMemCmpCall()
[all …]
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| H A D | LegalizeDAG.cpp | 870 EVT LoadVT = TLI.getRegisterType(SrcVT.getSimpleVT()); in LegalizeLoadOps() local
872 TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT)) { in LegalizeLoadOps()
876 (LoadVT == SrcVT) ? ISD::NON_EXTLOAD : ExtType; in LegalizeLoadOps()
878 SDValue Load = DAG.getExtLoad(MidExtType, dl, LoadVT, Chain, Ptr, in LegalizeLoadOps()
894 EVT LoadVT = TLI.getRegisterType(IDestVT.getSimpleVT()); in LegalizeLoadOps() local
896 SDValue Result = DAG.getExtLoad(ISD::ZEXTLOAD, dl, LoadVT, in LegalizeLoadOps()
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| H A D | DAGCombiner.cpp | 14364 EVT LoadVT; in getStoreMergeCandidates() local
14368 LoadVT = Ld->getMemoryVT(); in getStoreMergeCandidates()
14370 if (MemVT != LoadVT) in getStoreMergeCandidates()
14393 if (LoadVT != OtherLd->getMemoryVT()) in getStoreMergeCandidates()
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| /freebsd-12.1/contrib/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2475 EVT LoadVT = EltVT; in LowerFormalArguments() local
2477 LoadVT = MVT::i8; in LowerFormalArguments()
2482 LoadVT = MVT::i32; in LowerFormalArguments()
2484 EVT VecVT = EVT::getVectorVT(F->getContext(), LoadVT, NumElts); in LowerFormalArguments()
2498 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, LoadVT, P, in LowerFormalArguments()
2509 Ins[InsIdx].VT.getSizeInBits() > LoadVT.getSizeInBits()) { in LowerFormalArguments()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 1071 bool isLoadBitCastBeneficial(EVT LoadVT, EVT BitcastVT) const override;
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| H A D | X86ISelLowering.cpp | 4933 bool X86TargetLowering::isLoadBitCastBeneficial(EVT LoadVT, in isLoadBitCastBeneficial() argument
4935 if (!Subtarget.hasAVX512() && !LoadVT.isVector() && BitcastVT.isVector() && in isLoadBitCastBeneficial()
4939 if (!Subtarget.hasDQI() && BitcastVT == MVT::v8i1 && LoadVT == MVT::i8) in isLoadBitCastBeneficial()
4942 return TargetLowering::isLoadBitCastBeneficial(LoadVT, BitcastVT); in isLoadBitCastBeneficial()
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| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 5591 EVT LoadVT = N->getValueType(0); in combineBSWAP() local
5592 if (LoadVT == MVT::i16) in combineBSWAP()
5593 LoadVT = MVT::i32; in combineBSWAP()
5596 DAG.getVTList(LoadVT, MVT::Other), in combineBSWAP()
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 12782 MVT LoadVT = VT.getSimpleVT(); in PerformDAGCombine() local
12784 (LoadVT == MVT::v2f64 || LoadVT == MVT::v2i64 || in PerformDAGCombine()
12785 LoadVT == MVT::v4f32 || LoadVT == MVT::v4i32)) in PerformDAGCombine()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 11755 EVT LoadVT = isLaneOp ? VecTy.getVectorElementType() : AlignedVecTy; in CombineBaseUpdate() local
11756 SDValue UpdN = DAG.getMemIntrinsicNode(NewOpc, dl, SDTys, Ops, LoadVT, in CombineBaseUpdate()
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