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Searched refs:FRINT (Results 1 – 25 of 34) sorted by relevance

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/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h586 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
H A DBasicTTIImpl.h1210 ISDs.push_back(ISD::FRINT);
H A DTargetLowering.h860 case ISD::STRICT_FRINT: EqOpc = ISD::FRINT; break; in getStrictFPOperationAction()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCCTRLoops.cpp331 case Intrinsic::rint: Opcode = ISD::FRINT; break; in mightUseCTR()
388 Opcode = ISD::FRINT; break; in mightUseCTR()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64SchedA57.td490 def : InstRW<[A57Write_5cyc_1V], (instregex "^FRINT[AIMNPXZ](v2f32)")>;
492 def : InstRW<[A57Write_5cyc_2V], (instregex "^FRINT[AIMNPXZ](v4f32|v2f64)")>;
563 def : InstRW<[A57Write_5cyc_1V], (instregex "^FRINT.+r")>;
H A DAArch64SchedFalkorDetails.td593 def : InstRW<[FalkorWr_1VXVY_2cyc], (instregex "^FRINT(A|I|M|N|P|X|Z)v2f32$")>;
618 def : InstRW<[FalkorWr_2VXVY_2cyc], (instregex "^FRINT(A|I|M|N|P|X|Z)(v2f64|v4f32)$")>;
1124 def : InstRW<[FalkorWr_1VXVY_2cyc], (instregex "^FRINT(A|I|M|N|P|X|Z)(S|D)r$")>;
H A DAArch64SchedExynosM1.td470 def : InstRW<[M1WriteFCVT3], (instregex "^FRINT.+r")>;
572 def : InstRW<[M1WriteFCVT3], (instregex "^FRINT[AIMNPXZ]v")>;
H A DAArch64SchedExynosM3.td532 def : InstRW<[M3WriteFCVT3A], (instregex "^FRINT.+r")>;
645 def : InstRW<[M3WriteFCVT3A], (instregex "^FRINT[AIMNPXZ]v")>;
H A DAArch64SchedExynosM4.td643 def : InstRW<[M4WriteFCVT3A], (instregex "^FRINT.+r")>;
788 def : InstRW<[M4WriteFCVT3A], (instregex "^FRINT[AIMNPXZ]v")>;
H A DAArch64SchedThunderX2T99.td1186 (instregex "^FRINT(A|I|M|N|P|X|Z)(Sr|Dr)")>;
1407 (instregex "^FRINT[AIMNPXZ](v2f32)")>;
1410 (instregex "^FRINT[AIMNPXZ](v4f32|v2f64)")>;
H A DAArch64SchedKryoDetails.td964 (instregex "FRINT(A|I|M|N|P|X|Z)(S|D)r")>;
970 (instregex "FRINT(A|I|M|N|P|X|Z)v2f32")>;
976 (instregex "FRINT(A|I|M|N|P|X|Z)(v2f64|v4f32)")>;
H A DAArch64ISelLowering.cpp220 setOperationAction(ISD::FRINT, MVT::f128, Expand); in AArch64TargetLowering()
385 setOperationAction(ISD::FRINT, MVT::f16, Promote); in AArch64TargetLowering()
419 setOperationAction(ISD::FRINT, MVT::v4f16, Expand); in AArch64TargetLowering()
434 setOperationAction(ISD::FRINT, MVT::v8f16, Expand); in AArch64TargetLowering()
450 setOperationAction(ISD::FRINT, Ty, Legal); in AArch64TargetLowering()
463 setOperationAction(ISD::FRINT, MVT::f16, Legal); in AArch64TargetLowering()
637 setOperationAction(ISD::FRINT, MVT::v1f64, Expand); in AArch64TargetLowering()
743 setOperationAction(ISD::FRINT, Ty, Legal); in AArch64TargetLowering()
H A DAArch64SchedCyclone.td576 // FRINT(AIMNPXZ) V,V
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp201 case ISD::FRINT: return "frint"; in getOperationName()
H A DLegalizeFloatTypes.cpp100 case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break; in SoftenFloatResult()
1091 case ISD::FRINT: ExpandFloatRes_FRINT(N, Lo, Hi); break; in ExpandFloatResult()
1903 case ISD::FRINT: in PromoteFloatResult()
H A DLegalizeVectorOps.cpp404 case ISD::FRINT: in LegalizeOp()
H A DLegalizeVectorTypes.cpp94 case ISD::FRINT: in ScalarizeVectorResult()
780 case ISD::FRINT: in SplitVectorResult()
2518 case ISD::FRINT: in WidenVectorResult()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp308 setOperationAction(ISD::FRINT, MVT::f32, Legal); in AMDGPUTargetLowering()
461 setOperationAction(ISD::FRINT, VT, Expand); in AMDGPUTargetLowering()
557 case ISD::FRINT: in fnegFoldsIntoOp()
1153 case ISD::FRINT: return LowerFRINT(Op, DAG); in LowerOperation()
2093 return DAG.getNode(ISD::FRINT, SDLoc(Op), Op.getValueType(), Op.getOperand(0)); in LowerFNEARBYINT()
3687 case ISD::FRINT: in performFNegCombine()
H A DR600ISelLowering.cpp154 setOperationAction(ISD::FRINT, MVT::f64, Custom); in R600TargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp148 setOperationAction(ISD::FRINT, MVT::f16, Promote); in MipsSETargetLowering()
388 setOperationAction(ISD::FRINT, Ty, Legal); in addMSAFloatType()
1878 return DAG.getNode(ISD::FRINT, DL, Op->getValueType(0), Op->getOperand(1)); in lowerINTRINSIC_WO_CHAIN()
/freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp102 {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FRINT}) in WebAssemblyTargetLowering()
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp688 setOperationAction(ISD::FRINT, VT, Expand); in initActions()
/freebsd-12.1/contrib/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td440 def frint : SDNode<"ISD::FRINT" , SDTFPUnaryOp>;
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp602 setOperationAction(ISD::FRINT, MVT::v2f64, Expand); in ARMTargetLowering()
618 setOperationAction(ISD::FRINT, MVT::v4f32, Expand); in ARMTargetLowering()
634 setOperationAction(ISD::FRINT, MVT::v2f32, Expand); in ARMTargetLowering()
760 setOperationAction(ISD::FRINT, MVT::f64, Expand); in ARMTargetLowering()
1124 setOperationAction(ISD::FRINT, MVT::f32, Legal); in ARMTargetLowering()
1138 setOperationAction(ISD::FRINT, MVT::f64, Legal); in ARMTargetLowering()
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp387 setOperationAction(ISD::FRINT, VT, Legal); in SystemZTargetLowering()
429 setOperationAction(ISD::FRINT, MVT::v2f64, Legal); in SystemZTargetLowering()
447 setOperationAction(ISD::FRINT, MVT::v4f32, Legal); in SystemZTargetLowering()

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