Searched refs:DefSU (Results 1 – 3 of 3) sorted by relevance
304 SUnit *DefSU = I->SU; in addPhysRegDeps() local305 if (DefSU == &ExitSU) in addPhysRegDeps()307 if (DefSU != SU && in addPhysRegDeps()309 !DefSU->getInstr()->registerDefIsDead(*Alias))) { in addPhysRegDeps()311 DefSU->addPred(SDep(SU, Kind, /*Reg=*/*Alias)); in addPhysRegDeps()316 DefSU->addPred(Dep); in addPhysRegDeps()457 SUnit *DefSU = V2SU.SU; in addVRegDefDeps() local463 if (DefSU == SU) in addVRegDefDeps()467 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addVRegDefDeps()468 DefSU->addPred(Dep); in addVRegDefDeps()[all …]
1348 const SUnit *DefSU = getSUnit(DefMI); in computeCyclicCriticalPath() local1349 if (!DefSU) in computeCyclicCriticalPath()1352 unsigned LiveOutHeight = DefSU->getHeight(); in computeCyclicCriticalPath()1353 unsigned LiveOutDepth = DefSU->getDepth() + DefSU->Latency; in computeCyclicCriticalPath()1373 unsigned LiveInHeight = SU->getHeight() + DefSU->Latency; in computeCyclicCriticalPath()1380 LLVM_DEBUG(dbgs() << "Cyclic Path: SU(" << DefSU->NodeNum << ") -> SU(" in computeCyclicCriticalPath()
695 SUnit *DefSU = getSUnit(DefMI); in changeDependences() local696 if (!DefSU) in changeDependences()713 if (P->getSUnit() == DefSU) in changeDependences()3387 SUnit *DefSU = Insts.at(MoveDef); in orderDependence() local3397 orderDependence(SSD, DefSU, Insts); in orderDependence()3413 SUnit *DefSU = SSD->getSUnit(&Phi); in isLoopCarried() local3414 unsigned DefCycle = cycleScheduled(DefSU); in isLoopCarried()3415 int DefStage = stageScheduled(DefSU); in isLoopCarried()