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Searched refs:ARC (Results 1 – 25 of 81) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/ARC/
H A DARCFrameLowering.cpp67 AdjOp = Positive ? ARC::ADD_rru6 : ARC::SUB_rru6; in generateStackAdjustment()
69 AdjOp = Positive ? ARC::ADD_rrlimm : ARC::SUB_rrlimm; in generateStackAdjustment()
80 assert(Reg.getReg() >= ARC::R13 && Reg.getReg() <= ARC::R25 && in determineLastCalleeSave()
138 .addReg(ARC::SP) in emitPrologue()
139 .addReg(ARC::SP) in emitPrologue()
146 .addReg(ARC::FP) in emitPrologue()
147 .addReg(ARC::SP) in emitPrologue()
157 .addReg(ARC::SP) in emitPrologue()
185 ARC::FP) in emitPrologue()
250 BuildMI(MBB, MBBI, DebugLoc(), TII->get(ARC::SUB_rru6), ARC::SP) in emitEpilogue()
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H A DARCRegisterInfo.cpp75 unsigned AddOpc = isUInt<6>(Offset) ? ARC::ADD_rru6 : ARC::ADD_rrlimm; in ReplaceFrameIndex()
84 case ARC::LD_rs9: in ReplaceFrameIndex()
86 case ARC::LDH_rs9: in ReplaceFrameIndex()
87 case ARC::LDH_X_rs9: in ReplaceFrameIndex()
89 case ARC::LDB_rs9: in ReplaceFrameIndex()
97 case ARC::ST_rs9: in ReplaceFrameIndex()
99 case ARC::STH_rs9: in ReplaceFrameIndex()
101 case ARC::STB_rs9: in ReplaceFrameIndex()
109 case ARC::GETFI: in ReplaceFrameIndex()
112 TII.get(isUInt<6>(Offset) ? ARC::ADD_rru6 : ARC::ADD_rrlimm)) in ReplaceFrameIndex()
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H A DARCExpandPseudos.cpp49 case ARC::ST_FAR: in getMappedOp()
50 return ARC::ST_rs9; in getMappedOp()
51 case ARC::STH_FAR: in getMappedOp()
52 return ARC::STH_rs9; in getMappedOp()
53 case ARC::STB_FAR: in getMappedOp()
54 return ARC::STB_rs9; in getMappedOp()
63 unsigned AddrReg = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in ExpandStore()
65 isUInt<6>(SI.getOperand(2).getImm()) ? ARC::ADD_rru6 : ARC::ADD_rrlimm; in ExpandStore()
86 case ARC::ST_FAR: in runOnMachineFunction()
87 case ARC::STH_FAR: in runOnMachineFunction()
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H A DARCInstrInfo.cpp35 : ARCGenInstrInfo(ARC::ADJCALLSTACKDOWN, ARC::ADJCALLSTACKUP), RI() {} in ARCInstrInfo()
42 return Opcode == ARC::LD_rs9 || Opcode == ARC::LDH_rs9 || in isLoad()
43 Opcode == ARC::LDB_rs9; in isLoad()
47 return Opcode == ARC::ST_rs9 || Opcode == ARC::STH_rs9 || in isStore()
48 Opcode == ARC::STB_rs9; in isStore()
128 return Opc == ARC::BRcc_rr_p || Opc == ARC::BRcc_ru6_p; in isCondBranchOpcode()
273 assert(ARC::GPR32RegClass.contains(SrcReg) && in copyPhysReg()
303 BuildMI(MBB, I, dl, get(ARC::ST_rs9)) in storeRegToStackSlot()
330 BuildMI(MBB, I, dl, get(ARC::LD_rs9)) in loadRegFromStackSlot()
374 int BccOpc = Cond[1].isImm() ? ARC::BRcc_ru6_p : ARC::BRcc_rr_p; in insertBranch()
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H A DARCBranchFinalize.cpp96 return !(MI->getOpcode() != ARC::BRcc_rr_p && in isBRccPseudo()
97 MI->getOpcode() != ARC::BRcc_ru6_p); in isBRccPseudo()
102 if (MI->getOpcode() == ARC::BRcc_rr_p) in getBRccForPseudo()
103 return ARC::BRcc_rr; in getBRccForPseudo()
104 return ARC::BRcc_ru6; in getBRccForPseudo()
109 if (MI->getOpcode() == ARC::BRcc_rr_p) in getCmpForPseudo()
110 return ARC::CMP_rr; in getCmpForPseudo()
111 return ARC::CMP_ru6; in getCmpForPseudo()
137 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), TII->get(ARC::Bcc)) in replaceWithCmpBcc()
H A DARCRegisterInfo.td1 //===- ARCRegisterInfo.td - ARC Register defs --------------*- tablegen -*-===//
11 // Declarations that describe the ARC register file
16 let Namespace = "ARC";
71 def GPR32: RegisterClass<"ARC", [i32], 32,
76 def SREG : RegisterClass<"ARC", [i32], 1, (add STATUS32)>;
78 def GPR_S : RegisterClass<"ARC", [i32], 8,
H A DARCCallingConv.td1 //===- ARCCallingConv.td - Calling Conventions for ARC -----*- tablegen -*-===//
9 // This describes the calling conventions for ARC architecture.
13 // ARC Return Value Calling Convention
26 // ARC Argument Calling Conventions
H A DARC.td1 //===- ARC.td - Describe the ARC Target Machine ------------*- tablegen -*-===//
23 def ARC : Target {
H A DARCISelLowering.cpp77 addRegisterClass(MVT::i32, &ARC::GPR32RegClass); in ARCTargetLowering()
82 setStackPointerRegisterToSaveRestore(ARC::SP); in ARCTargetLowering()
291 StackPtr = DAG.getCopyFromReg(Chain, dl, ARC::SP, in LowerCall()
401 SDValue StackPtr = DAG.getRegister(ARC::SP, MVT::i32); in lowerCallResult()
494 unsigned VReg = RegInfo.createVirtualRegister(&ARC::GPR32RegClass); in LowerCallArguments()
522 static const MCPhysReg ArgRegs[] = {ARC::R0, ARC::R1, ARC::R2, ARC::R3, in LowerCallArguments()
523 ARC::R4, ARC::R5, ARC::R6, ARC::R7}; in LowerCallArguments()
539 unsigned VReg = RegInfo.createVirtualRegister(&ARC::GPR32RegClass); in LowerCallArguments()
H A DARCISelDAGToDAG.cpp55 Reg = CurDAG->getRegister(ARC::STATUS32, MVT::i32); in SelectCMOVPred()
175 isInt<12>(CVal) ? ARC::MOV_rs12 : ARC::MOV_rlimm, in Select()
H A DARCAsmPrinter.cpp70 case ARC::DBG_VALUE: in EmitInstruction()
H A DARCInstrFormats.td1 //===- ARCInstrFormats.td - ARC Instruction Formats --------*- tablegen -*-===//
62 let Namespace = "ARC";
70 // ARC pseudo instructions format
80 // All 32-bit ARC instructions have a 5-bit "major" opcode class designator
84 // N - Delay Slot bit. ARC v2 branch instructions have an optional delay slot
/freebsd-12.1/contrib/binutils/gas/doc/
H A Dc-arc.texi7 @node ARC-Dependent
18 @cindex ARC support
23 * ARC Directives:: ARC Machine Directives
28 @node ARC Options
84 @node ARC Syntax
91 @node ARC-Chars
98 @node ARC-Regs
116 @node ARC Directives
325 @node ARC Opcodes
328 @cindex ARC opcodes
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H A Dall.texi30 @set ARC
H A Dasconfig.texi31 @clear ARC
/freebsd-12.1/contrib/llvm/lib/Target/ARC/Disassembler/
H A DARCDisassembler.cpp115 ARC::R0, ARC::R1, ARC::R2, ARC::R3, ARC::R4, ARC::R5, ARC::R6,
116 ARC::R7, ARC::R8, ARC::R9, ARC::R10, ARC::R11, ARC::R12, ARC::R13,
117 ARC::R14, ARC::R15, ARC::R16, ARC::R17, ARC::R18, ARC::R19, ARC::R20,
118 ARC::R21, ARC::R22, ARC::R23, ARC::R24, ARC::R25, ARC::GP, ARC::FP,
119 ARC::SP, ARC::ILINK, ARC::R30, ARC::BLINK};
/freebsd-12.1/contrib/binutils/bfd/
H A Dcpu-arc.c26 #define ARC(mach, print_name, default_p, next) \ macro
44 ARC ( bfd_mach_arc_5, "arc5", FALSE, &arch_info_struct[1] ),
45 ARC ( bfd_mach_arc_5, "base", FALSE, &arch_info_struct[2] ),
46 ARC ( bfd_mach_arc_6, "arc6", FALSE, &arch_info_struct[3] ),
47 ARC ( bfd_mach_arc_7, "arc7", FALSE, &arch_info_struct[4] ),
48 ARC ( bfd_mach_arc_8, "arc8", FALSE, NULL ),
52 ARC ( bfd_mach_arc_6, "arc", TRUE, &arch_info_struct[0] );
/freebsd-12.1/contrib/llvm/lib/Target/ARC/MCTargetDesc/
H A DARCMCTargetDesc.cpp44 InitARCMCRegisterInfo(X, ARC::BLINK); in createARCMCRegisterInfo()
58 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, ARC::SP, 0); in createARCMCAsmInfo()
/freebsd-12.1/contrib/llvm/
H A DFREEBSD-Xlist148 lib/Target/ARC/CMakeLists.txt
149 lib/Target/ARC/Disassembler/CMakeLists.txt
150 lib/Target/ARC/Disassembler/LLVMBuild.txt
151 lib/Target/ARC/InstPrinter/CMakeLists.txt
152 lib/Target/ARC/InstPrinter/LLVMBuild.txt
153 lib/Target/ARC/LLVMBuild.txt
154 lib/Target/ARC/MCTargetDesc/CMakeLists.txt
155 lib/Target/ARC/MCTargetDesc/LLVMBuild.txt
156 lib/Target/ARC/TargetInfo/CMakeLists.txt
157 lib/Target/ARC/TargetInfo/LLVMBuild.txt
/freebsd-12.1/contrib/llvm/tools/clang/include/clang/AST/
H A DOperationKinds.def291 /// [ARC] Produces a retainable object pointer so that it may
296 /// [ARC] Consumes a retainable object pointer that has just
301 /// [ARC] Reclaim a retainable object pointer object that may
306 /// [ARC] Causes a value of block type to be copied to the
308 /// in ARC cause blocks to be copied; this is for cases where that
/freebsd-12.1/sys/gnu/dts/mips/
H A DFREESTATION5.dts7 model = "ARC FreeStation5";
/freebsd-12.1/contrib/file/magic/Magdir/
H A Dc6418 9 string PSUR ARC archive (c64)
H A Darchive278 # ARC archiver, from Daniel Quinlan ([email protected])
285 0 lelong&0x8080ffff 0x0000081a ARC archive data, dynamic LZW
287 0 lelong&0x8080ffff 0x0000091a ARC archive data, squashed
289 0 lelong&0x8080ffff 0x0000021a ARC archive data, uncompressed
291 0 lelong&0x8080ffff 0x0000031a ARC archive data, packed
293 0 lelong&0x8080ffff 0x0000041a ARC archive data, squeezed
295 0 lelong&0x8080ffff 0x0000061a ARC archive data, crunched
297 # [JW] stuff taken from idarc, obviously ARC successors:
300 0 lelong&0x8080ffff 0x0000141a ARC+ archive data
307 # [GRR: the original entries collide with ARC, above; replaced with combined
/freebsd-12.1/sys/cam/ctl/
H A DREADME.ctl.txt232 - ZFS ARC backend for CTL. Since ZFS copies all I/O into the ARC
236 allocate buffers out of the ARC directly, and DMA to/from them directly.
/freebsd-12.1/contrib/llvm/tools/clang/include/clang/Basic/
H A DLangOptions.def246 LANGOPT(ObjCWeakRuntime , 1, 0, "__weak support in the ARC runtime")
247 LANGOPT(ObjCWeak , 1, 0, "Objective-C __weak in ARC and MRC files")

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