49   if (MI.getOpcode() == ARC::LD_rs9 && (Offset >= 256 || Offset < -256)) {  in ReplaceFrameIndex()
51     BuildMI(MBB, II, dl, TII.get(ARC::LD_rlimm), Reg)  in ReplaceFrameIndex()
59   if (MI.getOpcode() != ARC::GETFI && (Offset >= 256 || Offset < -256)) {  in ReplaceFrameIndex()
61     BaseReg = RS->FindUnusedReg(&ARC::GPR32RegClass);  in ReplaceFrameIndex()
67       BaseReg = RS->scavengeRegister(&ARC::GPR32RegClass, II, SPAdj);  in ReplaceFrameIndex()
75     unsigned AddOpc = isUInt<6>(Offset) ? ARC::ADD_rru6 : ARC::ADD_rrlimm;  in ReplaceFrameIndex()
84   case ARC::LD_rs9:  in ReplaceFrameIndex()
86   case ARC::LDH_rs9:  in ReplaceFrameIndex()
87   case ARC::LDH_X_rs9:  in ReplaceFrameIndex()
89   case ARC::LDB_rs9:  in ReplaceFrameIndex()
90   case ARC::LDB_X_rs9:  in ReplaceFrameIndex()
97   case ARC::ST_rs9:  in ReplaceFrameIndex()
99   case ARC::STH_rs9:  in ReplaceFrameIndex()
101   case ARC::STB_rs9:  in ReplaceFrameIndex()
109   case ARC::GETFI:  in ReplaceFrameIndex()
112             TII.get(isUInt<6>(Offset) ? ARC::ADD_rru6 : ARC::ADD_rrlimm))  in ReplaceFrameIndex()
125 ARCRegisterInfo::ARCRegisterInfo() : ARCGenRegisterInfo(ARC::BLINK) {}  in ARCRegisterInfo()
139   Reserved.set(ARC::ILINK);  in getReservedRegs()
140   Reserved.set(ARC::SP);  in getReservedRegs()
141   Reserved.set(ARC::GP);  in getReservedRegs()
142   Reserved.set(ARC::R25);  in getReservedRegs()
143   Reserved.set(ARC::BLINK);  in getReservedRegs()
144   Reserved.set(ARC::FP);  in getReservedRegs()
207   assert(ARC::GPR32RegClass.contains(Reg) && "Unexpected register operand");  in eliminateFrameIndex()
225   return TFI->hasFP(MF) ? ARC::FP : ARC::SP;  in getFrameRegister()