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Searched refs:plt_write64 (Results 1 – 25 of 30) sorted by relevance

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/dpdk/drivers/common/cnxk/
H A Droc_nix_inl_dev_irq.c26 plt_write64(gw.u64[0], getwrk_op); in nix_inl_sso_work_cb()
84 plt_write64(intr, sso_base + SSO_LF_GGRP_INT); in nix_inl_sso_hwgrp_irq()
101 plt_write64(intr, ssow_base + SSOW_LF_GWS_INT); in nix_inl_sso_hws_irq()
170 plt_write64(0, sso_base + SSO_LF_GGRP_INT_THR); in nix_inl_sso_unregister_irqs()
253 plt_write64(intr, nix_base + NIX_LF_RAS); in nix_inl_nix_ras_irq()
286 plt_write64(intr, nix_base + NIX_LF_ERR_INT); in nix_inl_nix_err_irq()
330 plt_write64(~(BIT_ULL(11) | BIT_ULL(24)), in nix_inl_nix_register_irqs()
348 plt_write64(0, nix_base + NIX_LF_QINTX_CNT(q)); in nix_inl_nix_register_irqs()
357 plt_write64(0, nix_base + NIX_LF_QINTX_CNT(q)); in nix_inl_nix_register_irqs()
358 plt_write64(0, nix_base + NIX_LF_QINTX_INT(q)); in nix_inl_nix_register_irqs()
[all …]
H A Droc_npa_irq.c21 plt_write64(intr, lf->base + NPA_LF_ERR_INT); in npa_err_irq()
69 plt_write64(intr, lf->base + NPA_LF_RAS); in npa_ras_irq()
81 plt_write64(~0ull, lf->base + NPA_LF_RAS_ENA_W1C); in npa_register_ras_irq()
85 plt_write64(~0ull, lf->base + NPA_LF_RAS_ENA_W1S); in npa_register_ras_irq()
99 plt_write64(~0ull, lf->base + NPA_LF_RAS_ENA_W1C); in npa_unregister_ras_irq()
120 plt_write64(wdata | qint, lf->base + off); in npa_q_irq_get_and_clear()
211 plt_write64(0, lf->base + NPA_LF_QINTX_CNT(q)); in npa_register_queue_irqs()
231 plt_write64(0, lf->base + NPA_LF_QINTX_CNT(q)); in npa_register_queue_irqs()
232 plt_write64(0, lf->base + NPA_LF_QINTX_INT(q)); in npa_register_queue_irqs()
253 plt_write64(0, lf->base + NPA_LF_QINTX_CNT(q)); in npa_unregister_queue_irqs()
[all …]
H A Droc_nix_irq.c13 plt_write64(~(BIT_ULL(11) | BIT_ULL(24)), in nix_err_intr_enb_dis()
16 plt_write64(~0ull, nix->base + NIX_LF_ERR_INT_ENA_W1C); in nix_err_intr_enb_dis()
23 plt_write64(~0ull, nix->base + NIX_LF_RAS_ENA_W1S); in nix_ras_intr_enb_dis()
25 plt_write64(~0ull, nix->base + NIX_LF_RAS_ENA_W1C); in nix_ras_intr_enb_dis()
76 plt_write64(intr, nix->base + NIX_LF_ERR_INT); in nix_lf_err_irq()
124 plt_write64(intr, nix->base + NIX_LF_RAS); in nix_lf_ras_irq()
176 plt_write64(wdata | qint, nix->base + off); in nix_lf_q_irq_get_and_clear()
231 plt_write64(BIT_ULL(44), nix->base + off); in nix_lf_sq_debug_reg()
352 plt_write64(0, nix->base + NIX_LF_QINTX_CNT(q)); in roc_nix_register_queue_irqs()
369 plt_write64(0, nix->base + NIX_LF_QINTX_CNT(q)); in roc_nix_register_queue_irqs()
[all …]
H A Droc_tim_irq.c23 plt_write64(intr, base + TIM_LF_NRSPERR_INT); in tim_lf_irq()
24 plt_write64(intr, base + TIM_LF_RAS_INT); in tim_lf_irq()
37 plt_write64(~0ull, base + TIM_LF_NRSPERR_INT); in tim_lf_register_irq()
41 plt_write64(~0ull, base + TIM_LF_NRSPERR_INT_ENA_W1S); in tim_lf_register_irq()
46 plt_write64(~0ull, base + TIM_LF_RAS_INT); in tim_lf_register_irq()
50 plt_write64(~0ull, base + TIM_LF_RAS_INT_ENA_W1S); in tim_lf_register_irq()
80 plt_write64(~0ull, base + TIM_LF_NRSPERR_INT_ENA_W1C); in tim_lf_unregister_irq()
86 plt_write64(~0ull, base + TIM_LF_RAS_INT_ENA_W1C); in tim_lf_unregister_irq()
H A Droc_sso_irq.c21 plt_write64(intr, rsrc->base + SSO_LF_GGRP_INT); in sso_hwgrp_irq()
33 plt_write64(~0ull, rsrc->base + SSO_LF_GGRP_INT_ENA_W1C); in sso_hwgrp_register_irq()
37 plt_write64(~0ull, rsrc->base + SSO_LF_GGRP_INT_ENA_W1S); in sso_hwgrp_register_irq()
55 plt_write64(intr, rsrc->base + SSOW_LF_GWS_INT); in sso_hws_irq()
67 plt_write64(~0ull, rsrc->base + SSOW_LF_GWS_INT_ENA_W1C); in sso_hws_register_irq()
71 plt_write64(~0ull, rsrc->base + SSOW_LF_GWS_INT_ENA_W1S); in sso_hws_register_irq()
132 plt_write64(~0ull, rsrc->base + SSO_LF_GGRP_INT_ENA_W1C); in sso_hwgrp_unregister_irq()
145 plt_write64(~0ull, rsrc->base + SSOW_LF_GWS_INT_ENA_W1C); in sso_hws_unregister_irq()
H A Droc_dev.c133 plt_write64(~0ull, dev->bar2 + RVU_PF_INT); in af_pf_wait_msg()
622 plt_write64(intr, dev->bar2 + RVU_VF_INT); in roc_pf_vf_mbox_irq()
642 plt_write64(intr, dev->bar2 + RVU_PF_INT); in roc_af_pf_mbox_irq()
660 plt_write64(~0ull, in mbox_register_pf_irq()
693 plt_write64(~0ull, in mbox_register_pf_irq()
696 plt_write64(~0ull, dev->bar2 + RVU_PF_INT); in mbox_register_pf_irq()
720 plt_write64(~0ull, dev->bar2 + RVU_VF_INT); in mbox_register_vf_irq()
743 plt_write64(~0ull, in mbox_unregister_pf_irq()
837 plt_write64(BIT_ULL(vf), in roc_pf_vf_flr_irq()
918 plt_write64(intr, in clear_rvum_interrupts()
[all …]
H A Droc_cpt.c58 plt_write64(intr, lf->rbase + CPT_LF_MISC_INT); in cpt_lf_misc_irq()
100 plt_write64(0x1, lf->rbase + CPT_LF_DONE_INT_ENA_W1S); in cpt_lf_done_intr_enb_dis()
102 plt_write64(0x1, lf->rbase + CPT_LF_DONE_INT_ENA_W1C); in cpt_lf_done_intr_enb_dis()
120 plt_write64(intr, lf->rbase + CPT_LF_DONE_ACK); in cpt_lf_done_irq()
122 plt_write64(done_wait, lf->rbase + CPT_LF_DONE_WAIT); in cpt_lf_done_irq()
470 plt_write64(lf_q_base.u, lf->rbase + CPT_LF_Q_BASE); in cpt_iq_init()
474 plt_write64(lf_q_size.u, lf->rbase + CPT_LF_Q_SIZE); in cpt_iq_init()
693 plt_write64(reg.u, lf->rbase + CPT_LF_CTX_FLUSH); in roc_cpt_lf_ctx_flush()
711 plt_write64(reg.u, lf->rbase + CPT_LF_CTX_RELOAD); in roc_cpt_lf_ctx_reload()
824 plt_write64(lf_ctl.u, lf->rbase + CPT_LF_CTL); in roc_cpt_iq_disable()
[all …]
H A Droc_dpi.c43 plt_write64(0x1, dpi->rbase + DPI_VDMA_EN); in roc_dpi_enable()
50 plt_write64(0x0, dpi->rbase + DPI_VDMA_EN); in roc_dpi_disable()
119 plt_write64(0x0, roc_dpi->rbase + DPI_VDMA_REQQ_CTL); in roc_dpi_configure()
120 plt_write64(((uint64_t)(roc_dpi->chunk_base) >> 7) << 7, in roc_dpi_configure()
H A Droc_ree.c437 plt_write64(intr, base + REE_LF_MISC_INT); in roc_ree_lf_err_intr_handler()
447 plt_write64(~0ull, base + REE_LF_MISC_INT_ENA_W1C); in roc_ree_lf_err_intr_unregister()
475 plt_write64(~0ull, base + REE_LF_MISC_INT_ENA_W1C); in roc_ree_lf_err_intr_register()
485 plt_write64(~0ull, base + REE_LF_MISC_INT_ENA_W1S); in roc_ree_lf_err_intr_register()
538 plt_write64(val, qp->base + REE_LF_SBUF_ADDR); in roc_ree_iq_enable()
545 plt_write64(val, qp->base + REE_LF_ENA); in roc_ree_iq_enable()
559 plt_write64(val, qp->base + REE_LF_ENA); in roc_ree_iq_disable()
H A Droc_io_generic.h19 plt_write64(val0, (void *)(addr)); \
20 plt_write64(val1, (((uint8_t *)(addr)) + 8)); \
H A Droc_nix_inl_dev.c285 plt_write64(0x1, inl_dev->sso_base + SSO_LF_GGRP_QCTL); in nix_inl_sso_setup()
306 plt_write64(0, inl_dev->sso_base + SSO_LF_GGRP_QCTL); in nix_inl_sso_release()
624 plt_write64(0, inl_dev->sso_base + SSO_LF_GGRP_QCTL); in roc_nix_inl_dev_xaq_realloc()
653 plt_write64(0x1, inl_dev->sso_base + SSO_LF_GGRP_QCTL); in roc_nix_inl_dev_xaq_realloc()
H A Droc_mbox.c230 plt_write64(1, (volatile void *)(mbox->reg_base + in mbox_msg_send()
287 plt_write64(rsp_reg, reg_addr); in mbox_poll()
H A Droc_npa.h108 plt_write64(reg, roc_npa_aura_handle_to_base(aura_handle) + in roc_npa_aura_op_cnt_set()
137 plt_write64(reg, roc_npa_aura_handle_to_base(aura_handle) + in roc_npa_aura_op_limit_set()
H A Droc_nix_inl.c948 plt_write64(flush.u, rbase + CPT_LF_CTX_FLUSH); in roc_nix_inl_sa_sync()
952 plt_write64(reload.u, rbase + CPT_LF_CTX_RELOAD); in roc_nix_inl_sa_sync()
1011 plt_write64(flush.u, rbase + CPT_LF_CTX_FLUSH); in roc_nix_inl_ctx_write()
H A Droc_nix_rss.c35 plt_write64(val, nix->base + NIX_LF_RX_SECRETX(idx)); in roc_nix_rss_key_set()
H A Droc_platform.h165 #define plt_write64(val, addr) \ macro
H A Droc_bphy_cgx.c45 plt_write64(value, base + (lmac << shift) + offset); in roc_bphy_cgx_write()
H A Droc_nix_bpf.c21 #define NIX_RST_STATS(val) plt_write64(0, nix->base + NIX_LF_RX_STATX(val))
173 plt_write64(val, addr); in nix_precolor_conv_table_write()
/dpdk/drivers/event/cnxk/
H A Dcnxk_worker.h38 plt_write64(val, swtag_norm_op); in cnxk_sso_hws_swtag_norm()
44 plt_write64(0, swtag_untag_op); in cnxk_sso_hws_swtag_untag()
56 plt_write64(0, base + SSOW_LF_GWS_OP_SWTAG_FLUSH); in cnxk_sso_hws_swtag_flush()
88 plt_write64(u64, base + SSOW_LF_GWS_OP_UPD_WQP_GRP1); in cnxk_sso_hws_desched()
89 plt_write64(0, base + SSOW_LF_GWS_OP_DESCHED); in cnxk_sso_hws_desched()
H A Dcn10k_eventdev.c96 plt_write64(val, ws->base + SSOW_LF_GWS_NW_TIM); in cn10k_sso_hws_setup()
123 plt_write64(0, base + SSO_LF_GGRP_QCTL); in cn10k_sso_hws_flush_events()
125 plt_write64(0, ws->base + SSOW_LF_GWS_OP_GWC_INVAL); in cn10k_sso_hws_flush_events()
136 plt_write64(req, ws->base + SSOW_LF_GWS_OP_GET_WORK0); in cn10k_sso_hws_flush_events()
160 plt_write64(0, ws->base + SSOW_LF_GWS_OP_GWC_INVAL); in cn10k_sso_hws_flush_events()
180 plt_write64(0, ws->base + SSOW_LF_GWS_OP_GWC_INVAL); in cn10k_sso_hws_reset()
198 plt_write64(0, base + SSOW_LF_GWS_OP_DESCHED); in cn10k_sso_hws_reset()
219 plt_write64(BIT_ULL(16) | 1, in cn10k_sso_hws_reset()
231 plt_write64(0, base + SSOW_LF_GWS_OP_DESCHED); in cn10k_sso_hws_reset()
235 plt_write64(0, base + SSOW_LF_GWS_OP_GWC_INVAL); in cn10k_sso_hws_reset()
[all …]
H A Dcn9k_eventdev.c83 plt_write64(val, dws->base[0] + SSOW_LF_GWS_NW_TIM); in cn9k_sso_hws_setup()
84 plt_write64(val, dws->base[1] + SSOW_LF_GWS_NW_TIM); in cn9k_sso_hws_setup()
91 plt_write64(val, ws->base + SSOW_LF_GWS_NW_TIM); in cn9k_sso_hws_setup()
137 plt_write64(0, base + SSO_LF_GGRP_QCTL); in cn9k_sso_hws_flush_events()
161 plt_write64(req, ws_base + SSOW_LF_GWS_OP_GET_WORK0); in cn9k_sso_hws_flush_events()
183 plt_write64(0, ws_base + SSOW_LF_GWS_OP_GWC_INVAL); in cn9k_sso_hws_flush_events()
225 plt_write64(0, base + SSOW_LF_GWS_OP_DESCHED); in cn9k_sso_hws_reset()
233 plt_write64(0, base + SSOW_LF_GWS_OP_GWC_INVAL); in cn9k_sso_hws_reset()
H A Dcnxk_tim_evdev.c346 plt_write64((uint64_t)tim_ring->bkt, tim_ring->base + TIM_LF_RING_BASE); in cnxk_tim_ring_create()
347 plt_write64(tim_ring->aura, tim_ring->base + TIM_LF_RING_AURA); in cnxk_tim_ring_create()
H A Dcn10k_worker.h71 plt_write64(ev->u64, ws->base + SSOW_LF_GWS_OP_UPD_WQP_GRP1); in cn10k_sso_hws_fwd_group()
290 plt_write64(gw.u64[0], ws->base + SSOW_LF_GWS_OP_GET_WORK0); in cn10k_sso_hws_get_work()
H A Dcn9k_worker.h233 plt_write64(dws->gw_wdata, pair_base + SSOW_LF_GWS_OP_GET_WORK0); in cn9k_sso_hws_dual_get_work()
257 plt_write64(ws->gw_wdata, ws->base + SSOW_LF_GWS_OP_GET_WORK0); in cn9k_sso_hws_get_work()
/dpdk/drivers/dma/cnxk/
H A Dcnxk_dmadev.c272 plt_write64(num_words, in cnxk_dmadev_copy()
338 plt_write64(num_words, in cnxk_dmadev_copy_sg()
405 plt_write64(dpivf->num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); in cnxk_dmadev_submit()

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