Searched refs:phy_type (Results 1 – 15 of 15) sorted by relevance
636 #define ICE_PHY_TYPE_SUPPORT_50G(phy_type) \ argument642 ((phy_type) & ICE_PHY_TYPE_LOW_50G_LAUI2) || \644 ((phy_type) & ICE_PHY_TYPE_LOW_50G_AUI2) || \645 ((phy_type) & ICE_PHY_TYPE_LOW_50GBASE_CP) || \646 ((phy_type) & ICE_PHY_TYPE_LOW_50GBASE_SR) || \647 ((phy_type) & ICE_PHY_TYPE_LOW_50GBASE_FR) || \648 ((phy_type) & ICE_PHY_TYPE_LOW_50GBASE_LR) || \651 ((phy_type) & ICE_PHY_TYPE_LOW_50G_AUI1))661 ((phy_type) & ICE_PHY_TYPE_LOW_100G_AUI4) || \666 ((phy_type) & ICE_PHY_TYPE_LOW_100GBASE_DR))[all …]
1554 #define I40E_PHY_TYPE_SUPPORT_40G(phy_type) \ argument1557 ((phy_type) & I40E_CAP_PHY_TYPE_40GBASE_AOC) || \1558 ((phy_type) & I40E_CAP_PHY_TYPE_40GBASE_CR4) || \1559 ((phy_type) & I40E_CAP_PHY_TYPE_40GBASE_SR4) || \1560 ((phy_type) & I40E_CAP_PHY_TYPE_40GBASE_LR4))1562 #define I40E_PHY_TYPE_SUPPORT_25G(phy_type) \ argument1563 (((phy_type) & I40E_CAP_PHY_TYPE_25GBASE_KR) || \1564 ((phy_type) & I40E_CAP_PHY_TYPE_25GBASE_CR) || \1565 ((phy_type) & I40E_CAP_PHY_TYPE_25GBASE_SR) || \1566 ((phy_type) & I40E_CAP_PHY_TYPE_25GBASE_LR) || \[all …]
2264 if (is_up && phy_ab.phy_type != 0 && in i40e_phy_conf_link()2292 phy_conf.phy_type = is_up ? cpu_to_le32(phy_type_mask) : 0; in i40e_phy_conf_link()11248 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) { in i40e_get_module_info()
2988 phy_type = e1000_phy_m88; in e1000_get_phy_type_from_id()2991 phy_type = e1000_phy_igp_2; in e1000_get_phy_type_from_id()2997 phy_type = e1000_phy_igp_3; in e1000_get_phy_type_from_id()3002 phy_type = e1000_phy_ife; in e1000_get_phy_type_from_id()3006 phy_type = e1000_phy_bm; in e1000_get_phy_type_from_id()3009 phy_type = e1000_phy_82578; in e1000_get_phy_type_from_id()3012 phy_type = e1000_phy_82577; in e1000_get_phy_type_from_id()3018 phy_type = e1000_phy_i217; in e1000_get_phy_type_from_id()3024 phy_type = e1000_phy_i210; in e1000_get_phy_type_from_id()3030 return phy_type; in e1000_get_phy_type_from_id()[all …]
3028 phy_type = igc_phy_m88; in igc_get_phy_type_from_id()3031 phy_type = igc_phy_igp_2; in igc_get_phy_type_from_id()3037 phy_type = igc_phy_igp_3; in igc_get_phy_type_from_id()3042 phy_type = igc_phy_ife; in igc_get_phy_type_from_id()3046 phy_type = igc_phy_bm; in igc_get_phy_type_from_id()3049 phy_type = igc_phy_82578; in igc_get_phy_type_from_id()3058 phy_type = igc_phy_i217; in igc_get_phy_type_from_id()3064 phy_type = igc_phy_i210; in igc_get_phy_type_from_id()3067 phy_type = igc_phy_i225; in igc_get_phy_type_from_id()3073 return phy_type; in igc_get_phy_type_from_id()[all …]
427 enum ixgbe_phy_type phy_type; in ixgbe_get_phy_type_from_id() local433 phy_type = ixgbe_phy_tn; in ixgbe_get_phy_type_from_id()438 phy_type = ixgbe_phy_aq; in ixgbe_get_phy_type_from_id()441 phy_type = ixgbe_phy_qt; in ixgbe_get_phy_type_from_id()444 phy_type = ixgbe_phy_nl; in ixgbe_get_phy_type_from_id()448 phy_type = ixgbe_phy_x550em_ext_t; in ixgbe_get_phy_type_from_id()452 phy_type = ixgbe_phy_ext_1g_t; in ixgbe_get_phy_type_from_id()455 phy_type = ixgbe_phy_unknown; in ixgbe_get_phy_type_from_id()458 return phy_type; in ixgbe_get_phy_type_from_id()
203 #define ELINK_FW_PARAM_SET(phy_addr, phy_type, mdio_access) \ argument204 (phy_addr | phy_type | mdio_access << ELINK_FW_PARAM_MDIO_CTRL_OFFSET)
13252 uint32_t ext_phy_config, phy_type, config2; in elink_populate_ext_phy() local13256 phy_type = ELINK_XGXS_EXT_PHY_TYPE(ext_phy_config); in elink_populate_ext_phy()13258 switch (phy_type) { in elink_populate_ext_phy()13302 if (phy_type == PORT_HW_CFG_XGXS_EXT_PHY2_TYPE_BNX2X54618SE) in elink_populate_ext_phy()13314 if ((phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) && in elink_populate_ext_phy()13315 (phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN)) in elink_populate_ext_phy()13367 phy_type, port, phy_index); in elink_populate_ext_phy()
206 enum txgbe_phy_type phy_type; in txgbe_get_phy_type_from_id() local210 phy_type = txgbe_phy_tn; in txgbe_get_phy_type_from_id()213 phy_type = txgbe_phy_qt; in txgbe_get_phy_type_from_id()216 phy_type = txgbe_phy_nl; in txgbe_get_phy_type_from_id()219 phy_type = txgbe_phy_cu_mtd; in txgbe_get_phy_type_from_id()222 phy_type = txgbe_phy_unknown; in txgbe_get_phy_type_from_id()226 return phy_type; in txgbe_get_phy_type_from_id()
2058 __le32 phy_type; /* bitmap using the above enum for offsets */ member2113 __le32 phy_type; member2183 u8 phy_type; /* i40e_aq_phy_type */ member
1270 switch (hw->phy.link_info.phy_type) { in i40e_get_media_type()1768 hw->phy.phy_types = LE32_TO_CPU(abilities->phy_type); in i40e_aq_get_phy_capabilities()1865 config.phy_type = abilities.phy_type; in i40e_set_fc()2042 hw_link_info->phy_type = (enum i40e_aq_phy_type)resp->phy_type; in i40e_aq_get_link_info()2078 hw->aq.fw_min_ver < 40)) && hw_link_info->phy_type == 0xE) in i40e_aq_get_link_info()2079 hw_link_info->phy_type = I40E_PHY_TYPE_10GBASE_SFPP_CU; in i40e_aq_get_link_info()6566 config.phy_type = abilities.phy_type; in i40e_enable_eee()
248 enum i40e_aq_phy_type phy_type; member
293 uint8_t phy_type; member
1502 link_info->phy_type = resp->phy_type; in bnxt_hwrm_port_phy_qcfg()3263 if (bp->link_info->phy_type == in bnxt_set_hwrm_link_config()3265 bp->link_info->phy_type == in bnxt_set_hwrm_link_config()
25003 uint8_t phy_type; member