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Searched refs:fc_conf (Results 1 – 25 of 44) sorted by relevance

12

/dpdk/drivers/net/octeontx/
H A Docteontx_ethdev_ops.c221 fc_conf->mode = RTE_ETH_FC_FULL; in octeontx_dev_flow_ctrl_get()
247 if (fc_conf->pause_time || fc_conf->mac_ctrl_frame_fwd || in octeontx_dev_flow_ctrl_set()
248 fc_conf->autoneg) { in octeontx_dev_flow_ctrl_set()
256 fc_conf->mode == fc->mode) in octeontx_dev_flow_ctrl_set()
262 fc_conf->high_water < fc_conf->low_water) { in octeontx_dev_flow_ctrl_set()
269 if (fc_conf->high_water % BIT(4) || fc_conf->low_water % BIT(4)) { in octeontx_dev_flow_ctrl_set()
291 fc->mode = fc_conf->mode; in octeontx_dev_flow_ctrl_set()
301 struct rte_eth_fc_conf fc_conf; in octeontx_dev_flow_ctrl_init() local
312 fc->def_mode = fc_conf.mode; in octeontx_dev_flow_ctrl_init()
322 struct rte_eth_fc_conf fc_conf; in octeontx_dev_flow_ctrl_fini() local
[all …]
H A Docteontx_ethdev.h183 struct rte_eth_fc_conf *fc_conf);
185 struct rte_eth_fc_conf *fc_conf);
/dpdk/examples/ethtool/lib/
H A Drte_ethtool.c223 struct rte_eth_fc_conf fc_conf; in rte_ethtool_get_pauseparam() local
229 status = rte_eth_dev_flow_ctrl_get(port_id, &fc_conf); in rte_ethtool_get_pauseparam()
235 switch (fc_conf.mode) { in rte_ethtool_get_pauseparam()
249 pause_param->autoneg = (uint32_t)fc_conf.autoneg; in rte_ethtool_get_pauseparam()
258 struct rte_eth_fc_conf fc_conf; in rte_ethtool_set_pauseparam() local
272 status = rte_eth_dev_flow_ctrl_get(port_id, &fc_conf); in rte_ethtool_set_pauseparam()
276 fc_conf.autoneg = (uint8_t)pause_param->autoneg; in rte_ethtool_set_pauseparam()
280 fc_conf.mode = RTE_ETH_FC_FULL; in rte_ethtool_set_pauseparam()
282 fc_conf.mode = RTE_ETH_FC_TX_PAUSE; in rte_ethtool_set_pauseparam()
285 fc_conf.mode = RTE_ETH_FC_RX_PAUSE; in rte_ethtool_set_pauseparam()
[all …]
/dpdk/drivers/net/dpaa/
H A Ddpaa_ethdev.c477 rte_free(dpaa_intf->fc_conf); in dpaa_eth_dev_close()
1323 if (!(dpaa_intf->fc_conf)) { in dpaa_flow_ctrl_set()
1326 if (!dpaa_intf->fc_conf) { in dpaa_flow_ctrl_set()
1331 net_fc = dpaa_intf->fc_conf; in dpaa_flow_ctrl_set()
1333 if (fc_conf->high_water < fc_conf->low_water) { in dpaa_flow_ctrl_set()
1343 fc_conf->high_water, in dpaa_flow_ctrl_set()
1344 fc_conf->low_water, in dpaa_flow_ctrl_set()
1346 if (fc_conf->pause_time) in dpaa_flow_ctrl_set()
1386 fc_conf->pause_time = in dpaa_flow_ctrl_get()
1642 if (!dpaa_intf->fc_conf) { in dpaa_fc_set_default()
[all …]
/dpdk/drivers/net/mlx4/
H A Dmlx4_ethdev.c847 mlx4_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) in mlx4_flow_ctrl_get() argument
864 fc_conf->autoneg = ethpause.autoneg; in mlx4_flow_ctrl_get()
866 fc_conf->mode = RTE_ETH_FC_FULL; in mlx4_flow_ctrl_get()
868 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; in mlx4_flow_ctrl_get()
870 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; in mlx4_flow_ctrl_get()
872 fc_conf->mode = RTE_ETH_FC_NONE; in mlx4_flow_ctrl_get()
901 ethpause.autoneg = fc_conf->autoneg; in mlx4_flow_ctrl_set()
902 if (((fc_conf->mode & RTE_ETH_FC_FULL) == RTE_ETH_FC_FULL) || in mlx4_flow_ctrl_set()
903 (fc_conf->mode & RTE_ETH_FC_RX_PAUSE)) in mlx4_flow_ctrl_set()
907 if (((fc_conf->mode & RTE_ETH_FC_FULL) == RTE_ETH_FC_FULL) || in mlx4_flow_ctrl_set()
[all …]
H A Dmlx4.h230 struct rte_eth_fc_conf *fc_conf);
232 struct rte_eth_fc_conf *fc_conf);
/dpdk/drivers/net/cnxk/
H A Dcnxk_ethdev_ops.c203 struct rte_eth_fc_conf *fc_conf) in cnxk_nix_flow_ctrl_get() argument
218 fc_conf->mode = mode_map[mode]; in cnxk_nix_flow_ctrl_get()
243 struct rte_eth_fc_conf *fc_conf) in cnxk_nix_flow_ctrl_set() argument
263 if (fc_conf->high_water || fc_conf->low_water || fc_conf->pause_time || in cnxk_nix_flow_ctrl_set()
264 fc_conf->mac_ctrl_frame_fwd || fc_conf->autoneg) { in cnxk_nix_flow_ctrl_set()
269 if (fc_conf->mode == fc->mode) in cnxk_nix_flow_ctrl_set()
272 rx_pause = (fc_conf->mode == RTE_ETH_FC_FULL) || in cnxk_nix_flow_ctrl_set()
273 (fc_conf->mode == RTE_ETH_FC_RX_PAUSE); in cnxk_nix_flow_ctrl_set()
274 tx_pause = (fc_conf->mode == RTE_ETH_FC_FULL) || in cnxk_nix_flow_ctrl_set()
275 (fc_conf->mode == RTE_ETH_FC_TX_PAUSE); in cnxk_nix_flow_ctrl_set()
[all …]
/dpdk/drivers/net/e1000/
H A Dem_ethdev.c50 struct rte_eth_fc_conf *fc_conf);
52 struct rte_eth_fc_conf *fc_conf);
1663 fc_conf->low_water = hw->fc.low_water; in eth_em_flow_ctrl_get()
1664 fc_conf->send_xon = hw->fc.send_xon; in eth_em_flow_ctrl_get()
1665 fc_conf->autoneg = hw->mac.autoneg; in eth_em_flow_ctrl_get()
1683 fc_conf->mode = RTE_ETH_FC_FULL; in eth_em_flow_ctrl_get()
1685 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; in eth_em_flow_ctrl_get()
1687 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; in eth_em_flow_ctrl_get()
1689 fc_conf->mode = RTE_ETH_FC_NONE; in eth_em_flow_ctrl_get()
1718 (fc_conf->high_water < fc_conf->low_water)) { in eth_em_flow_ctrl_set()
[all …]
H A Digb_ethdev.c111 struct rte_eth_fc_conf *fc_conf);
113 struct rte_eth_fc_conf *fc_conf);
3002 fc_conf->low_water = hw->fc.low_water; in eth_igb_flow_ctrl_get()
3003 fc_conf->send_xon = hw->fc.send_xon; in eth_igb_flow_ctrl_get()
3004 fc_conf->autoneg = hw->mac.autoneg; in eth_igb_flow_ctrl_get()
3022 fc_conf->mode = RTE_ETH_FC_FULL; in eth_igb_flow_ctrl_get()
3024 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; in eth_igb_flow_ctrl_get()
3026 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; in eth_igb_flow_ctrl_get()
3028 fc_conf->mode = RTE_ETH_FC_NONE; in eth_igb_flow_ctrl_get()
3058 (fc_conf->high_water < fc_conf->low_water)) { in eth_igb_flow_ctrl_set()
[all …]
/dpdk/drivers/net/mlx5/windows/
H A Dmlx5_ethdev_os.c177 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) in mlx5_dev_get_flow_ctrl() argument
180 RTE_SET_USED(fc_conf); in mlx5_dev_get_flow_ctrl()
196 mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) in mlx5_dev_set_flow_ctrl() argument
199 RTE_SET_USED(fc_conf); in mlx5_dev_set_flow_ctrl()
/dpdk/drivers/net/igc/
H A Digc_ethdev.c2130 fc_conf->low_water = hw->fc.low_water; in eth_igc_flow_ctrl_get()
2131 fc_conf->send_xon = hw->fc.send_xon; in eth_igc_flow_ctrl_get()
2132 fc_conf->autoneg = hw->mac.autoneg; in eth_igc_flow_ctrl_get()
2150 fc_conf->mode = RTE_ETH_FC_FULL; in eth_igc_flow_ctrl_get()
2152 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; in eth_igc_flow_ctrl_get()
2154 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; in eth_igc_flow_ctrl_get()
2156 fc_conf->mode = RTE_ETH_FC_NONE; in eth_igc_flow_ctrl_get()
2179 fc_conf->high_water < fc_conf->low_water) { in eth_igc_flow_ctrl_set()
2182 fc_conf->high_water, fc_conf->low_water, in eth_igc_flow_ctrl_set()
2187 switch (fc_conf->mode) { in eth_igc_flow_ctrl_set()
[all …]
/dpdk/drivers/net/mlx5/linux/
H A Dmlx5_ethdev_os.c662 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) in mlx5_dev_get_flow_ctrl() argument
679 fc_conf->autoneg = ethpause.autoneg; in mlx5_dev_get_flow_ctrl()
681 fc_conf->mode = RTE_ETH_FC_FULL; in mlx5_dev_get_flow_ctrl()
683 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; in mlx5_dev_get_flow_ctrl()
685 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; in mlx5_dev_get_flow_ctrl()
687 fc_conf->mode = RTE_ETH_FC_NONE; in mlx5_dev_get_flow_ctrl()
712 ethpause.autoneg = fc_conf->autoneg; in mlx5_dev_set_flow_ctrl()
713 if (((fc_conf->mode & RTE_ETH_FC_FULL) == RTE_ETH_FC_FULL) || in mlx5_dev_set_flow_ctrl()
714 (fc_conf->mode & RTE_ETH_FC_RX_PAUSE)) in mlx5_dev_set_flow_ctrl()
719 if (((fc_conf->mode & RTE_ETH_FC_FULL) == RTE_ETH_FC_FULL) || in mlx5_dev_set_flow_ctrl()
[all …]
/dpdk/app/proc-info/
H A Dmain.c725 struct rte_eth_fc_conf fc_conf; in show_port() local
770 ret = rte_eth_dev_flow_ctrl_get(i, &fc_conf); in show_port()
771 if (ret == 0 && fc_conf.mode != RTE_ETH_FC_NONE) { in show_port()
773 fc_conf.mode == RTE_ETH_FC_RX_PAUSE ? "rx " : in show_port()
774 fc_conf.mode == RTE_ETH_FC_TX_PAUSE ? "tx " : in show_port()
776 fc_conf.autoneg ? " auto" : "", in show_port()
777 fc_conf.high_water, in show_port()
778 fc_conf.low_water, in show_port()
779 fc_conf.pause_time, in show_port()
780 fc_conf.send_xon ? " xon" : "", in show_port()
[all …]
/dpdk/drivers/net/ionic/
H A Dionic_ethdev.c32 struct rte_eth_fc_conf *fc_conf);
34 struct rte_eth_fc_conf *fc_conf);
455 struct rte_eth_fc_conf *fc_conf) in ionic_flow_ctrl_get() argument
463 fc_conf->autoneg = 0; in ionic_flow_ctrl_get()
466 fc_conf->mode = RTE_ETH_FC_FULL; in ionic_flow_ctrl_get()
468 fc_conf->mode = RTE_ETH_FC_NONE; in ionic_flow_ctrl_get()
476 struct rte_eth_fc_conf *fc_conf) in ionic_flow_ctrl_set() argument
484 if (fc_conf->autoneg) { in ionic_flow_ctrl_set()
489 switch (fc_conf->mode) { in ionic_flow_ctrl_set()
/dpdk/drivers/net/mvpp2/
H A Dmrvl_ethdev.c2176 memcpy(fc_conf, &priv->fc_conf, sizeof(struct rte_eth_fc_conf)); in mrvl_flow_ctrl_get()
2180 fc_conf->autoneg = 1; in mrvl_flow_ctrl_get()
2199 fc_conf->mode = RTE_ETH_FC_FULL; in mrvl_flow_ctrl_get()
2224 if (fc_conf->high_water || in mrvl_flow_ctrl_set()
2225 fc_conf->low_water || in mrvl_flow_ctrl_set()
2226 fc_conf->pause_time || in mrvl_flow_ctrl_set()
2227 fc_conf->mac_ctrl_frame_fwd) { in mrvl_flow_ctrl_set()
2233 if (fc_conf->autoneg == 0) { in mrvl_flow_ctrl_set()
2239 memcpy(&priv->fc_conf, fc_conf, sizeof(struct rte_eth_fc_conf)); in mrvl_flow_ctrl_set()
2244 switch (fc_conf->mode) { in mrvl_flow_ctrl_set()
[all …]
/dpdk/drivers/net/ngbe/
H A Dngbe_ethdev.c2249 fc_conf->pause_time = hw->fc.pause_time; in ngbe_flow_ctrl_get()
2250 fc_conf->high_water = hw->fc.high_water; in ngbe_flow_ctrl_get()
2251 fc_conf->low_water = hw->fc.low_water; in ngbe_flow_ctrl_get()
2252 fc_conf->send_xon = hw->fc.send_xon; in ngbe_flow_ctrl_get()
2276 fc_conf->mode = RTE_ETH_FC_FULL; in ngbe_flow_ctrl_get()
2278 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; in ngbe_flow_ctrl_get()
2280 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; in ngbe_flow_ctrl_get()
2282 fc_conf->mode = RTE_ETH_FC_NONE; in ngbe_flow_ctrl_get()
2312 fc_conf->high_water < fc_conf->low_water) { in ngbe_flow_ctrl_set()
2322 hw->fc.send_xon = fc_conf->send_xon; in ngbe_flow_ctrl_set()
[all …]
/dpdk/drivers/net/atlantic/
H A Datl_ethdev.c75 struct rte_eth_fc_conf *fc_conf);
77 struct rte_eth_fc_conf *fc_conf);
1520 atl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) in atl_flow_ctrl_get() argument
1531 fc_conf->mode = RTE_ETH_FC_NONE; in atl_flow_ctrl_get()
1533 fc_conf->mode = RTE_ETH_FC_FULL; in atl_flow_ctrl_get()
1535 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; in atl_flow_ctrl_get()
1537 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; in atl_flow_ctrl_get()
1552 if (fc_conf->mode == RTE_ETH_FC_NONE) in atl_flow_ctrl_set()
1554 else if (fc_conf->mode == RTE_ETH_FC_RX_PAUSE) in atl_flow_ctrl_set()
1556 else if (fc_conf->mode == RTE_ETH_FC_TX_PAUSE) in atl_flow_ctrl_set()
[all …]
/dpdk/drivers/net/cxgbe/
H A Dcxgbe_ethdev.c1068 struct rte_eth_fc_conf *fc_conf) in cxgbe_flow_ctrl_get() argument
1076 fc_conf->autoneg = 1; in cxgbe_flow_ctrl_get()
1085 fc_conf->mode = RTE_ETH_FC_FULL; in cxgbe_flow_ctrl_get()
1087 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; in cxgbe_flow_ctrl_get()
1089 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; in cxgbe_flow_ctrl_get()
1091 fc_conf->mode = RTE_ETH_FC_NONE; in cxgbe_flow_ctrl_get()
1096 struct rte_eth_fc_conf *fc_conf) in cxgbe_flow_ctrl_set() argument
1104 if (fc_conf->mode == RTE_ETH_FC_FULL) { in cxgbe_flow_ctrl_set()
1107 } else if (fc_conf->mode == RTE_ETH_FC_TX_PAUSE) { in cxgbe_flow_ctrl_set()
1109 } else if (fc_conf->mode == RTE_ETH_FC_RX_PAUSE) { in cxgbe_flow_ctrl_set()
[all …]
/dpdk/drivers/net/sfc/
H A Dsfc_ethdev.c978 memset(fc_conf, 0, sizeof(*fc_conf)); in sfc_flow_ctrl_get()
989 fc_conf->mode = RTE_ETH_FC_NONE; in sfc_flow_ctrl_get()
992 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; in sfc_flow_ctrl_get()
995 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; in sfc_flow_ctrl_get()
998 fc_conf->mode = RTE_ETH_FC_FULL; in sfc_flow_ctrl_get()
1005 fc_conf->autoneg = sa->port.flow_ctrl_autoneg; in sfc_flow_ctrl_get()
1020 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 || in sfc_flow_ctrl_set()
1021 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 || in sfc_flow_ctrl_set()
1022 fc_conf->mac_ctrl_frame_fwd != 0) { in sfc_flow_ctrl_set()
1028 switch (fc_conf->mode) { in sfc_flow_ctrl_set()
[all …]
/dpdk/drivers/net/axgbe/
H A Daxgbe_ethdev.c79 struct rte_eth_fc_conf *fc_conf);
81 struct rte_eth_fc_conf *fc_conf);
1277 fc_conf->high_water = (1024 + (fc.low_water[0] << 9)) / 1024; in axgbe_flow_ctrl_get()
1279 fc_conf->pause_time = fc.pause_time[0]; in axgbe_flow_ctrl_get()
1280 fc_conf->send_xon = fc.send_xon; in axgbe_flow_ctrl_get()
1281 fc_conf->mode = fc.mode; in axgbe_flow_ctrl_get()
1294 pdata->pause_autoneg = fc_conf->autoneg; in axgbe_flow_ctrl_set()
1296 fc.send_xon = fc_conf->send_xon; in axgbe_flow_ctrl_set()
1298 AXGMAC_FLOW_CONTROL_VALUE(1024 * fc_conf->high_water)); in axgbe_flow_ctrl_set()
1300 AXGMAC_FLOW_CONTROL_VALUE(1024 * fc_conf->low_water)); in axgbe_flow_ctrl_set()
[all …]
/dpdk/drivers/net/hns3/
H A Dhns3_ethdev_dump.c837 struct rte_eth_fc_conf fc_conf; in get_link_fc_info() local
847 ret = hns3_flow_ctrl_get(dev, &fc_conf); in get_link_fc_info()
855 hns3_fc_mode_to_rxtx_pause((enum hns3_fc_mode)fc_conf.mode, in get_link_fc_info()
870 fc_conf.autoneg == RTE_ETH_LINK_AUTONEG ? "On" : "Off", in get_link_fc_info()
871 fc_conf.pause_time); in get_link_fc_info()
/dpdk/drivers/net/txgbe/
H A Dtxgbe_ethdev.c3191 fc_conf->pause_time = hw->fc.pause_time; in txgbe_flow_ctrl_get()
3192 fc_conf->high_water = hw->fc.high_water[0]; in txgbe_flow_ctrl_get()
3193 fc_conf->low_water = hw->fc.low_water[0]; in txgbe_flow_ctrl_get()
3194 fc_conf->send_xon = hw->fc.send_xon; in txgbe_flow_ctrl_get()
3218 fc_conf->mode = RTE_ETH_FC_FULL; in txgbe_flow_ctrl_get()
3220 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; in txgbe_flow_ctrl_get()
3222 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; in txgbe_flow_ctrl_get()
3224 fc_conf->mode = RTE_ETH_FC_NONE; in txgbe_flow_ctrl_get()
3255 fc_conf->high_water < fc_conf->low_water) { in txgbe_flow_ctrl_set()
3265 hw->fc.send_xon = fc_conf->send_xon; in txgbe_flow_ctrl_set()
[all …]
/dpdk/drivers/net/hinic/
H A Dhinic_pmd_ethdev.c1844 struct rte_eth_fc_conf *fc_conf) in hinic_flow_ctrl_get() argument
1861 fc_conf->autoneg = nic_pause.auto_neg; in hinic_flow_ctrl_get()
1864 fc_conf->mode = RTE_ETH_FC_FULL; in hinic_flow_ctrl_get()
1866 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; in hinic_flow_ctrl_get()
1868 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; in hinic_flow_ctrl_get()
1870 fc_conf->mode = RTE_ETH_FC_NONE; in hinic_flow_ctrl_get()
1876 struct rte_eth_fc_conf *fc_conf) in hinic_flow_ctrl_set() argument
1882 nic_pause.auto_neg = fc_conf->autoneg; in hinic_flow_ctrl_set()
1884 if (((fc_conf->mode & RTE_ETH_FC_FULL) == RTE_ETH_FC_FULL) || in hinic_flow_ctrl_set()
1885 (fc_conf->mode & RTE_ETH_FC_TX_PAUSE)) in hinic_flow_ctrl_set()
[all …]
/dpdk/drivers/net/dpaa2/
H A Ddpaa2_ethdev.c2043 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) in dpaa2_flow_ctrl_get() argument
2055 if (dpni == NULL || fc_conf == NULL) { in dpaa2_flow_ctrl_get()
2066 memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf)); in dpaa2_flow_ctrl_get()
2077 fc_conf->mode = RTE_ETH_FC_FULL; in dpaa2_flow_ctrl_get()
2079 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; in dpaa2_flow_ctrl_get()
2089 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; in dpaa2_flow_ctrl_get()
2091 fc_conf->mode = RTE_ETH_FC_NONE; in dpaa2_flow_ctrl_get()
2098 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) in dpaa2_flow_ctrl_set() argument
2134 switch (fc_conf->mode) { in dpaa2_flow_ctrl_set()
2168 fc_conf->mode); in dpaa2_flow_ctrl_set()
/dpdk/drivers/net/qede/
H A Dqede_ethdev.c1995 struct rte_eth_fc_conf *fc_conf) in qede_flow_ctrl_set() argument
2007 if (fc_conf->autoneg) { in qede_flow_ctrl_set()
2016 if (fc_conf->mode == RTE_ETH_FC_FULL) in qede_flow_ctrl_set()
2019 if (fc_conf->mode == RTE_ETH_FC_TX_PAUSE) in qede_flow_ctrl_set()
2021 if (fc_conf->mode == RTE_ETH_FC_RX_PAUSE) in qede_flow_ctrl_set()
2031 struct rte_eth_fc_conf *fc_conf) in qede_flow_ctrl_get() argument
2041 fc_conf->autoneg = true; in qede_flow_ctrl_get()
2045 fc_conf->mode = RTE_ETH_FC_FULL; in qede_flow_ctrl_get()
2047 fc_conf->mode = RTE_ETH_FC_RX_PAUSE; in qede_flow_ctrl_get()
2049 fc_conf->mode = RTE_ETH_FC_TX_PAUSE; in qede_flow_ctrl_get()
[all …]

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