| /llvm-project-15.0.7/flang/lib/Decimal/ |
| H A D | big-radix-floating-point.h | 349 constexpr Raw SignBit() const { return Raw{isNegative_} << (Real::bits - 1); } in RemoveLeastOrderZeroDigits() function
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| /llvm-project-15.0.7/llvm/include/llvm/DebugInfo/DWARF/ |
| H A D | DWARFExpression.h | 48 SignBit = 0x80, enumerator
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| /llvm-project-15.0.7/llvm/unittests/CodeGen/GlobalISel/ |
| H A D | KnownBitsVectorTest.cpp | 620 auto SignBit = B.buildConstant(V2S32, 0x80000000); in TEST_F() local
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| H A D | KnownBitsTest.cpp | 707 auto SignBit = B.buildConstant(S32, 0x80000000); in TEST_F() local
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 336 SDValue SignBit = DAG.getNode( in SoftenFloatRes_FCOPYSIGN() local
2712 SDValue SignBit = DAG.getNode( in SoftPromoteHalfRes_FCOPYSIGN() local
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| H A D | LegalizeDAG.cpp | 71 uint8_t SignBit; member
1604 SDValue SignBit = DAG.getNode(ISD::AND, DL, IntVT, SignAsInt.IntValue, in ExpandFCOPYSIGN() local
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| H A D | DAGCombiner.cpp | 13704 SDValue SignBit = DAG.getConstant( in visitBITCAST() local
13725 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); in visitBITCAST() local
13773 APInt SignBit = APInt::getSignMask(VT.getSizeInBits() / 2); in visitBITCAST() local
13794 APInt SignBit = APInt::getSignMask(VT.getSizeInBits()); in visitBITCAST() local
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| H A D | TargetLowering.cpp | 7679 APInt SignBit = APInt::getSignMask(BitSize); in expandIS_FPCLASS() local
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 1519 auto SignBit = B.buildShl(S64, ShiftOffset, ExtShift); in applyMappingBFE() local
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| H A D | AMDGPUISelLowering.cpp | 2087 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); in LowerFTRUNC() local
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| H A D | AMDGPULegalizerInfo.cpp | 2160 auto SignBit = B.buildAnd(S32, Hi, SignBitMask); in legalizeIntrinsicTrunc() local
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 8877 APInt SignBit = APInt::getSignMask(32); in PerformDAGCombine() local
9006 APInt SignBit = APInt::getSignMask(FPBits).sext(VT.getSizeInBits()); in PerformDAGCombine() local
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 6041 auto SignBit = MIRBuilder.buildConstant(S64, 63); in lowerSITOFP() local
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 23293 SDValue SignBit = DAG.getNode(X86ISD::FAND, dl, LogicVT, Sign, SignMask); in LowerFCOPYSIGN() local
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