| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandAtomicPseudoInsts.cpp | 343 AtomicRMWInst::BinOp BinOp, bool IsMasked, int Width, in expandAtomicBinOp()
392 AtomicRMWInst::BinOp BinOp, bool IsMasked, int Width, in expandAtomicMinMaxOp()
512 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, bool IsMasked, in expandAtomicCmpXchg()
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| H A D | RISCVISelDAGToDAG.cpp | 251 bool IsMasked, bool IsStridedOrIndexed, SmallVectorImpl<SDValue> &Operands, in addVectorLoadStoreOperands()
296 void RISCVDAGToDAGISel::selectVLSEG(SDNode *Node, bool IsMasked, in selectVLSEG()
339 void RISCVDAGToDAGISel::selectVLSEGFF(SDNode *Node, bool IsMasked) { in selectVLSEGFF()
384 void RISCVDAGToDAGISel::selectVLXSEG(SDNode *Node, bool IsMasked, in selectVLXSEG()
438 void RISCVDAGToDAGISel::selectVSSEG(SDNode *Node, bool IsMasked, in selectVSSEG()
470 void RISCVDAGToDAGISel::selectVSXSEG(SDNode *Node, bool IsMasked, in selectVSXSEG()
1284 bool IsMasked = IntNo == Intrinsic::riscv_vloxei_mask || in Select() local
1334 bool IsMasked = IntNo == Intrinsic::riscv_vle_mask || in Select() local
1373 bool IsMasked = IntNo == Intrinsic::riscv_vleff_mask; in Select() local
1490 bool IsMasked = IntNo == Intrinsic::riscv_vsoxei_mask || in Select() local
[all …]
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| H A D | RISCVISelLowering.cpp | 4720 bool IsMasked = NumOps == 7; in lowerVectorIntrinsicScalars() local
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | VFABIDemangling.cpp | 50 ParseRet tryParseMask(StringRef &MangledName, bool &IsMasked) { in tryParseMask()
336 bool IsMasked; in tryDemangleForVFABI() local
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| /llvm-project-15.0.7/clang/lib/Support/ |
| H A D | RISCVVIntrinsicUtils.cpp | 850 StringRef OverloadedSuffix, StringRef IRName, bool IsMasked, in RVVIntrinsic()
914 bool IsMasked, bool HasMaskedOffOperand, in computeBuiltinTypes()
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| /llvm-project-15.0.7/llvm/unittests/Analysis/ |
| H A D | VectorFunctionABITest.cpp | 89 bool IsMasked() const { in IsMasked() function in __anon36cf3bb40111::VFABIParserTest
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| /llvm-project-15.0.7/clang/include/clang/Support/ |
| H A D | RISCVVIntrinsicUtils.h | 292 bool IsMasked; variable
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 16173 bool &IsLoad, bool &IsMasked, SDValue &Ptr, in getCombineLoadStoreParts()
16225 bool IsMasked = false; in CombineToPreIndexedLoadStore() local
16463 bool IsMasked = false; in shouldCombineToPostInc() local
16486 bool &IsMasked, SDValue &Ptr, in getPostIndexedLoadStoreOp()
16530 bool IsMasked = false; in CombineToPostIndexedLoadStore() local
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 4619 bool IsMasked = InMask.getNode() != nullptr; in tryVPTESTM() local
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| H A D | X86ISelLowering.cpp | 26247 bool IsMasked = false; in getTargetVShiftNode() local
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 19569 bool isSEXTLoad, bool IsMasked, bool isLE, in getMVEIndexedAddressParts()
19636 bool IsMasked = false; in getPreIndexedAddressParts() local
19694 bool IsMasked = false; in getPostIndexedAddressParts() local
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