| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | DetectDeadLanes.cpp | 247 Register DefReg = Def.getReg(); in transferUsedLanes() local
282 Register DefReg = Def.getReg(); in transferDefinedLanesStep() local
425 Register DefReg = Def.getReg(); in determineInitialUsedLanes() local
467 Register DefReg = Def.getReg(); in isUndefInput() local
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| H A D | PHIElimination.cpp | 202 Register DefReg = DefMI->getOperand(0).getReg(); in runOnMachineFunction() local
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| H A D | ImplicitNullChecks.cpp | 718 unsigned DefReg = NoRegister; in insertFaultingInstr() local
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| H A D | MachineSink.cpp | 1667 for (auto DefReg : DefedRegsInCopy) { in getSingleLiveInSuccBB() local
1702 for (unsigned DefReg : DefedRegsInCopy) in updateLiveIn() local
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| H A D | TailDuplicator.cpp | 352 Register DefReg = MI->getOperand(0).getReg(); in processPHI() local
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| H A D | LiveVariables.cpp | 215 Register DefReg = MO.getReg(); in FindLastPartialDef() local
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| H A D | MachineCopyPropagation.cpp | 930 Register DefReg = CopyOperands->Destination->getReg(); in BackwardCopyPropagateBlock() local
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 413 Register DefReg = MI.getOperand(I).getReg(); in tryFoldUnmergeCast() local
725 Register findValueFromDefImpl(Register DefReg, unsigned StartBit, in findValueFromDefImpl()
773 Register findValueFromDef(Register DefReg, unsigned StartBit, in findValueFromDef()
790 Register DefReg = MI.getReg(DefIdx); in tryCombineUnmergeDefs() local
970 Register DefReg = MI.getReg(DefIdx); in tryCombineUnmergeValues() local
985 Register DefReg = MI.getOperand(Idx).getReg(); in tryCombineUnmergeValues() local
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVRedundantCopyElimination.cpp | 125 Register DefReg = MI->getOperand(0).getReg(); in optimizeBlock() local
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXSwapRemoval.cpp | 673 Register DefReg = MI->getOperand(0).getReg(); in recordUnoptimizableWebs() local
726 Register DefReg = DefMI->getOperand(0).getReg(); in recordUnoptimizableWebs() local
785 Register DefReg = MI->getOperand(0).getReg(); in markSwapsForRemoval() local
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| H A D | PPCPreEmitPeephole.cpp | 258 Register DefReg; in addLinkerOpt() member
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 510 const Register DefReg = I.getOperand(0).getReg(); in selectLoadStoreOp() local
570 const Register DefReg = I.getOperand(0).getReg(); in selectFrameIndexOrGep() local
623 const Register DefReg = I.getOperand(0).getReg(); in selectGlobalValue() local
642 const Register DefReg = I.getOperand(0).getReg(); in selectConstant() local
813 Register DefReg = SrcReg; in selectZext() local
1328 Register DefReg = MRI.createGenericVirtualRegister(DstTy); in selectMergeValues() local
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| H A D | X86DomainReassignment.cpp | 593 Register DefReg = DefOp.getReg(); in buildClosure() local
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| H A D | X86LoadValueInjectionLoadHardening.cpp | 371 RegisterRef DefReg = Def.Addr->getRegRef(DFG); in getGadgetGraph() local
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| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXReplaceImageHandles.cpp | 68 unsigned DefReg = MI->getOperand(0).getReg(); in runOnMachineFunction() local
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegStackify.cpp | 468 Register DefReg = MO.getReg(); in oneUseDominatesOtherUses() local
644 Register DefReg = MRI.createVirtualRegister(RegClass); in moveAndTeeForMultiUse() local
909 Register DefReg = SubsequentDef->getReg(); in runOnMachineFunction() local
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| H A D | WebAssemblyExplicitLocals.cpp | 192 for (auto DefReg : Def->defs()) { in findStartOfTree() local
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64RedundantCopyElimination.cpp | 382 Register DefReg = MI->getOperand(0).getReg(); in optimizeBlock() local
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| H A D | AArch64MIPeepholeOpt.cpp | 243 Register DefReg = MI.getOperand(0).getReg(); in visitORR() local
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2200 Register DefReg = I.getOperand(0).getReg(); in earlySelect() local
2351 const Register DefReg = I.getOperand(0).getReg(); in select() local
2518 const Register DefReg = I.getOperand(0).getReg(); in select() local
2949 const Register DefReg = I.getOperand(0).getReg(); in select() local
3008 const Register DefReg = I.getOperand(0).getReg(); in select() local
3193 const Register DefReg = I.getOperand(0).getReg(); in select() local
4484 AArch64InstructionSelector::emitADD(Register DefReg, MachineOperand &LHS, in emitADD()
5244 const Register DefReg = MI.getOperand(0).getReg(); in selectUSMovFromExtend() local
6009 Register DefReg = MI.getOperand(0).getReg(); in isWorthFoldingIntoExtendedReg() local
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 214 Register DefReg = MODef.getReg(); in eraseInstrWithNoUses() local
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | Mips16InstrInfo.cpp | 369 int DefReg = 0; in loadImmediate() local
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | RegBankSelect.cpp | 203 for (Register DefReg : NewVRegs) in repairReg() local
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | GCNSchedStrategy.cpp | 984 Register DefReg = Def->getOperand(0).getReg(); in sinkTriviallyRematInsts() local
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 177 static bool isRegUsedByPhiNodes(Register DefReg, in isRegUsedByPhiNodes()
199 Register DefReg = findLocalRegDef(LocalMI); in flushLocalValueMap() local
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