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Searched defs:DefRC (Results 1 – 12 of 12) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DTargetRegisterInfo.cpp383 const TargetRegisterClass *DefRC, in shareSameRegisterFile()
413 bool TargetRegisterInfo::shouldRewriteCopySrc(const TargetRegisterClass *DefRC, in shouldRewriteCopySrc()
H A DDetectDeadLanes.cpp367 const TargetRegisterClass *DefRC = MRI->getRegClass(Reg); in determineInitialDefinedLanes() local
H A DPeepholeOptimizer.cpp689 const TargetRegisterClass *DefRC = MRI->getRegClass(Reg); in findNextSource() local
1252 const TargetRegisterClass *DefRC = MRI->getRegClass(Def.Reg); in rewriteSource() local
H A DRegisterCoalescer.cpp1333 const TargetRegisterClass *DefRC = TII->getRegClass(MCID, 0, TRI, *MF); in reMaterializeTrivialDef() local
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp429 const TargetRegisterClass *DefRC = nullptr; in select() local
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86RegisterInfo.cpp217 bool X86RegisterInfo::shouldRewriteCopySrc(const TargetRegisterClass *DefRC, in shouldRewriteCopySrc()
H A DX86SpeculativeLoadHardening.cpp1966 auto *DefRC = MRI->getRegClass(OldDefReg); in hardenPostLoad() local
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.cpp936 bool ARMBaseRegisterInfo::shouldRewriteCopySrc(const TargetRegisterClass *DefRC, in shouldRewriteCopySrc()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.cpp2747 const TargetRegisterClass *DefRC, in shouldRewriteCopySrc()
H A DAMDGPUInstructionSelector.cpp214 const TargetRegisterClass *DefRC in selectPHI() local
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonConstPropagation.cpp1953 const TargetRegisterClass &DefRC = *MRI->getRegClass(DefR.Reg); in evaluate() local
/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp2357 const TargetRegisterClass *DefRC in select() local