| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64CondBrTuning.cpp | 140 MachineInstr &DefMI) { in tryToTuneBranch() 307 MachineInstr *DefMI = getOperandDef(MI.getOperand(0)); in runOnMachineFunction() local
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| /llvm-project-15.0.7/llvm/unittests/Target/AMDGPU/ |
| H A D | ExecMayBeModifiedBeforeAnyUse.cpp | 55 MachineInstr *DefMI = in TEST() local
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 94 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getAccDefMI() local 146 MachineInstr *DefMI = MRI->getVRegDef(Reg); in hasLoopHazard() local 217 MachineInstr *DefMI = getAccDefMI(MI); in FindMLxHazard() local
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| H A D | ARMHazardRecognizer.cpp | 28 static bool hasRAWHazard(MachineInstr *DefMI, MachineInstr *MI, in hasRAWHazard() 54 MachineInstr *DefMI = LastMI; in getHazardType() local
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| H A D | ARMFixCortexA57AES1742098Pass.cpp | 367 MachineInstr *DefMI = *It; in analyzeMF() local
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | LiveRangeEdit.cpp | 71 const MachineInstr *DefMI) { in checkRematerializable() 89 MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def); in scanRemattable() local 202 MachineInstr *DefMI = nullptr, *UseMI = nullptr; in foldAsLoad() local
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| H A D | TargetSchedule.cpp | 184 const MachineInstr *DefMI, unsigned DefOperIdx, in computeOperandLatency() 289 computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx, in computeOutputLatency()
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| H A D | MachineTraceMetrics.cpp | 628 const MachineInstr *DefMI; member 770 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); in computeCrossBlockCriticalPath() local 979 addLiveIns(const MachineInstr *DefMI, unsigned DefOp, in addLiveIns() 1135 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); in computeInstrHeights() local 1277 bool MachineTraceMetrics::Trace::isDepInTrace(const MachineInstr &DefMI, in isDepInTrace()
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| H A D | PHIElimination.cpp | 165 MachineInstr *DefMI = MRI->getVRegDef(VirtReg); in runOnMachineFunction() local 496 if (MachineInstr *DefMI = MRI->getVRegDef(SrcReg)) in LowerPHINode() local
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| H A D | MachineSink.cpp | 287 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); in INITIALIZE_PASS_DEPENDENCY() local 625 MachineInstr *DefMI = MRI->getVRegDef(Reg); in isWorthBreakingCriticalEdge() local 825 MachineInstr *DefMI = MRI->getVRegDef(Reg); in isProfitableToSinkTo() local
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| H A D | RegisterCoalescer.cpp | 854 MachineInstr *DefMI = LIS->getInstructionFromIndex(AValNo->def); in removeCopyByCommutingDef() local 1135 MachineInstr *DefMI = LIS->getInstructionFromIndex(PVal->def); in removePartialRedundancy() local 1300 MachineInstr *DefMI = LIS->getInstructionFromIndex(ValNo->def); in reMaterializeTrivialDef() local 2563 LaneBitmask JoinVals::computeWriteLanes(const MachineInstr *DefMI, bool &Redef) in computeWriteLanes() argument 2665 const MachineInstr *DefMI = nullptr; in analyzeValue() local
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXSwapRemoval.cpp | 620 MachineInstr* DefMI = MRI->getVRegDef(Reg); in formWebs() local 725 MachineInstr *DefMI = MRI->getVRegDef(UseReg); in recordUnoptimizableWebs() local 802 MachineInstr *DefMI = MRI->getVRegDef(UseReg); in markSwapsForRemoval() local
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| H A D | PPCInstrInfo.cpp | 167 const MachineInstr &DefMI, unsigned DefIdx, in getOperandLatency() 751 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getConstantFromConstantPool() local 2132 bool PPCInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, in FoldImmediate() 3283 MachineInstr *DefMI = nullptr; in getForwardingDefMI() local 3343 MachineInstr *DefMI = getDefMIPostRA(Reg, MI, SeenIntermediateUse); in getForwardingDefMI() local 3715 MachineInstr *DefMI = getForwardingDefMI(MI, ForwardingOperand, in convertToImmediateForm() local 4397 bool PPCInstrInfo::isDefMIElgibleForForwarding(MachineInstr &DefMI, in isDefMIElgibleForForwarding() 4421 const MachineOperand &RegMO, const MachineInstr &DefMI, in isRegElgibleForForwarding() 4460 const MachineInstr &DefMI, in isImmElgibleForForwarding() 4511 bool PPCInstrInfo::simplifyToLI(MachineInstr &MI, MachineInstr &DefMI, in simplifyToLI() [all …]
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| H A D | PPCMIPeephole.cpp | 531 MachineInstr *DefMI = MRI->getVRegDef(TrueReg1); in simplifyCode() local 651 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode() local 715 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode() local
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| H A D | PPCInstrInfo.h | 425 const MachineInstr &DefMI, in hasLowDefLatency()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64RegisterBankInfo.cpp | 795 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping() local 844 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping() local 924 MachineInstr *DefMI = MRI.getVRegDef(VReg); in getInstrMapping() local
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86TileConfig.cpp | 160 for (auto &DefMI : MRI.def_instructions(R)) { in INITIALIZE_PASS_DEPENDENCY() local
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| H A D | X86OptimizeLEAs.cpp | 352 for (auto DefMI : List) { in chooseBestLEA() local 527 MachineInstr *DefMI; in removeRedundantAddrCalc() local
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| H A D | X86CallFrameOptimization.cpp | 620 MachineInstr &DefMI = *MRI->getVRegDef(Reg); in canFoldIntoRegPush() local
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| H A D | X86PreTileConfig.cpp | 223 MachineInstr *DefMI = MRI->getVRegDef(R); in INITIALIZE_PASS_DEPENDENCY() local
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 252 MachineInstr *DefMI = getDefIgnoringCopies(Reg, MRI); in getOpcodeDef() local
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsOptimizePICCall.cpp | 280 MachineInstr *DefMI = MRI.getVRegDef(Reg); in isCallViaRegister() local
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVInsertVSETVLI.cpp | 977 if (MachineInstr *DefMI = MRI->getVRegDef(Require.getAVLReg())) { in needVSETVLI() local 1031 MachineInstr *DefMI = MRI->getVRegDef(Info.getAVLReg()); in transferBefore() local 1166 MachineInstr *DefMI = MRI->getVRegDef(InReg); in needVSETVLIPHI() local
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| /llvm-project-15.0.7/llvm/lib/Target/BPF/ |
| H A D | BPFMIPeephole.cpp | 463 MachineInstr *DefMI; in eliminateTruncSeq() local
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIFixSGPRCopies.cpp | 750 MachineInstr *DefMI = MRI->getVRegDef(MO->getReg()); in runOnMachineFunction() local 841 MachineInstr *DefMI = MRI->getVRegDef(MI.getOperand(I).getReg()); in processPHINode() local
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