| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86MachineFunctionInfo.cpp | 30 for (const MCPhysReg *CSR = MF->getRegInfo().getCalleeSavedRegs(); in setRestoreBasePointer() local
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| /llvm-project-15.0.7/bolt/include/bolt/Passes/ |
| H A D | LivenessAnalysis.h | 116 BitVector CSR = BitVector(NumRegs, false); in computeNext() local
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| /llvm-project-15.0.7/bolt/lib/Passes/ |
| H A D | ShrinkWrapping.cpp | 890 bool ShrinkWrapping::isBestSavePosCold(unsigned CSR, MCInst *&BestPosSave, in isBestSavePosCold()
972 ShrinkWrapping::doRestorePlacement(MCInst *BestPosSave, unsigned CSR, in doRestorePlacement()
1059 bool ShrinkWrapping::validatePushPopsMode(unsigned CSR, MCInst *BestPosSave, in validatePushPopsMode()
1108 unsigned CSR) { in fixPopsPlacements()
1149 void ShrinkWrapping::scheduleOldSaveRestoresRemoval(unsigned CSR, in scheduleOldSaveRestoresRemoval()
1209 bool ShrinkWrapping::doesInstUsesCSR(const MCInst &Inst, uint16_t CSR) { in doesInstUsesCSR()
1219 unsigned CSR, MCInst *BestPosSave, in scheduleSaveRestoreInsertions()
1541 void ShrinkWrapping::insertUpdatedCFI(unsigned CSR, int SPValPush, in insertUpdatedCFI()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | RegisterClassInfo.cpp | 59 const MCPhysReg *CSR = MF->getRegInfo().getCalleeSavedRegs(); in runOnMachineFunction() local
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| H A D | LiveRegUnits.cpp | 85 for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR) { in addCalleeSavedRegs() local
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| H A D | MachineFrameInfo.cpp | 125 for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; in getPristineRegs() local
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| H A D | LivePhysRegs.cpp | 177 for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR) in addCalleeSavedRegs() local
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| H A D | MachineRegisterInfo.cpp | 601 const MCPhysReg *CSR = TRI->getCalleeSavedRegs(MF); in disableCalleeSavedRegister() local
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| H A D | RegAllocPBQP.cpp | 583 const MCPhysReg *CSR = MF.getRegInfo().getCalleeSavedRegs(); in isACalleeSavedRegister() local
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| H A D | RegAllocGreedy.cpp | 489 MCRegister CSR = RegClassInfo.getLastCalleeSavedAlias(PhysReg); in isUnusedCalleeSavedReg() local
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenExtract.cpp | 100 ConstantInt *CSL = nullptr, *CSR = nullptr, *CM = nullptr; in INITIALIZE_PASS_DEPENDENCY() local
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| H A D | HexagonVLIWPacketizer.cpp | 351 for (auto *CSR = TRI->getCalleeSavedRegs(&MF); CSR && *CSR; ++CSR) in doesModifyCalleeSavedReg() local
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| H A D | HexagonFrameLowering.cpp | 287 static bool needsStackFrame(const MachineBasicBlock &MBB, const BitVector &CSR, in needsStackFrame()
441 BitVector CSR(Hexagon::NUM_TARGET_REGS); in findShrunkPrologEpilog() local
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVFrameLowering.cpp | 43 [&](CalleeSavedInfo &CSR) { return CSR.getReg() == RAReg; })) in emitSCSPrologue()
93 [&](CalleeSavedInfo &CSR) { return CSR.getReg() == RAReg; })) in emitSCSEpilogue()
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| /llvm-project-15.0.7/llvm/tools/llvm-diff/lib/ |
| H A D | DifferenceEngine.cpp | 497 const ConstantStruct *CSR = cast<ConstantStruct>(R); in equivalentAsOperands() local
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| /llvm-project-15.0.7/llvm/lib/Target/XCore/ |
| H A D | XCoreFrameLowering.cpp | 457 for (const CalleeSavedInfo &CSR : CSI) { in restoreCalleeSavedRegisters() local
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| /llvm-project-15.0.7/llvm/include/llvm/ADT/ |
| H A D | Triple.h | 173 CSR, enumerator
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| /llvm-project-15.0.7/clang/lib/Sema/ |
| H A D | SemaChecking.cpp | 10052 const CharSourceRange &CSR = in checkFormatExpr() local
10262 const CharSourceRange &CSR = getSpecifierRange(StartSpecifier, in checkFormatExpr() local
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