History log of /pciutils/tests/cap-aer-root (Results 1 – 1 of 1)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: v3.14.0, v3.13.0, v3.12.0, v3.11.1, v3.11.0, v3.10.0, v3.9.0, v3.8.0, v3.7.0, v3.6.4, v3.6.3, v3.6.2, v3.6.1, v3.6.0, v3.5.6, v3.5.5
# a1492b88 21-Apr-2017 Bjorn Helgaas <[email protected]>

lspci: Decode AER Root Error Command, Root Error Status, Error Source

Decode the AER Root Error Command, Root Error Status, and Error Source
Identification registers.

Per PCIe r3.1, sec 7.10, these

lspci: Decode AER Root Error Command, Root Error Status, Error Source

Decode the AER Root Error Command, Root Error Status, and Error Source
Identification registers.

Per PCIe r3.1, sec 7.10, these registers are only available for Root Ports
and Root Complex Event Collectors, so we have to check the Device/Port Type
from the PCIe capability.

The difference in the "lspci -vv" output looks like this (for a Root Port):

+ RootCmd: CERptEn- NFERptEn- FERptEn-
+ RootSta: CERcvd- MultCERcvd- UERcvd- MultUERcvd-
+ FirstFatal- NonFatalMsg- FatalMsg- IntMsg 0
+ ErrorSrc: ERR_COR: 0000 ERR_FATAL/NONFATAL: 0000

Signed-off-by: Bjorn Helgaas <[email protected]>

show more ...