en Copyright 2015 Java http://172.16.0.5:8080/history/pciutils/tests/cap-aer-root#a1492b88 lspci: Decode AER Root Error Command, Root Error Status, Error SourceDecode the AER Root Error Command, Root Error Status, and Error SourceIdentification registers.Per PCIe r3.1, sec 7.10, these registers are only available for Root Portsand Root Complex Event Collectors, so we have to check the Device/Port Typefrom the PCIe capability.The difference in the "lspci -vv" output looks like this (for a Root Port):+ RootCmd: CERptEn- NFERptEn- FERptEn-+ RootSta: CERcvd- MultCERcvd- UERcvd- MultUERcvd-+ FirstFatal- NonFatalMsg- FatalMsg- IntMsg 0+ ErrorSrc: ERR_COR: 0000 ERR_FATAL/NONFATAL: 0000Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> List of files: /pciutils/tests/cap-aer-root Fri, 21 Apr 2017 19:31:50 +0000 Bjorn Helgaas <bhelgaas@google.com>