arm64: dts: ti: am64-phyboard-electra: Add DT overlay for X27 connector

Add a device tree overlay for SPI1 , UART3 and GPIO1 on
X27 connector.

By default, not all interfaces on the X27 connector ar

arm64: dts: ti: am64-phyboard-electra: Add DT overlay for X27 connector

Add a device tree overlay for SPI1 , UART3 and GPIO1 on
X27 connector.

By default, not all interfaces on the X27 connector are accessible
due to being disabled or set to alternative pin mux configurations.
This overlay activates and configures these interfaces to support
connections with external devices.

Signed-off-by: Wadim Egorov <[email protected]>
Signed-off-by: Daniel Schultz <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: k3-am642-hummingboard-t: Convert overlay to board dts

SolidRun HummingBoard-T has two options for M.2 connector, supporting
either PCI-E or USB-3.1 Gen 1 - depending on configuration

arm64: dts: ti: k3-am642-hummingboard-t: Convert overlay to board dts

SolidRun HummingBoard-T has two options for M.2 connector, supporting
either PCI-E or USB-3.1 Gen 1 - depending on configuration of a mux
on the serdes lane.
The required configurations in device-tree were modeled as overlays.

The USB-3.1 overlay uses /delete-property/ to unset a boolean property
on the usb controller limiting it to USB-2.0 by default.
Overlays can not delete a property from the base dtb, therefore this
overlay is at this time useless.

Convert both overlays into full dts by including the base board dts.
While the pcie overlay was functional, both are converted for a
consistent user experience when selecting between the two mutually
exclusive configurations.

Reported-by: Geert Uytterhoeven <[email protected]>
Closes: https://lore.kernel.org/linux-devicetree/CAMuHMdXTgpTnJ9U7egC2XjFXXNZ5uiY1O+WxNd6LPJW5Rs5KTw@mail.gmail.com
Fixes: bbef42084cc1 ("arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3")
Signed-off-by: Josua Mayer <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Nishanth Menon <[email protected]>

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arm64: dts: ti: k3-am69-sk: Add overlay for PCIE0 Endpoint Mode

Add overlay to enable the PCIE0 instance of PCIe on AM69-SK in Endpoint
mode of operation.

Signed-off-by: Siddharth Vadapalli <s-vada

arm64: dts: ti: k3-am69-sk: Add overlay for PCIE0 Endpoint Mode

Add overlay to enable the PCIE0 instance of PCIe on AM69-SK in Endpoint
mode of operation.

Signed-off-by: Siddharth Vadapalli <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Nishanth Menon <[email protected]>

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arm64: dts: ti: k3-am68-sk-base-board: Add overlay for PCIE1 Endpoint Mode

Add overlay to enable the PCIE1 instance of PCIe on AM68-SK-Base-Board in
Endpoint mode of operation. PCIE1 on AM68-SK-Base

arm64: dts: ti: k3-am68-sk-base-board: Add overlay for PCIE1 Endpoint Mode

Add overlay to enable the PCIE1 instance of PCIe on AM68-SK-Base-Board in
Endpoint mode of operation. PCIE1 on AM68-SK-Base-Board supports x2 Lane
operation unlike its counterpart on J721S2-EVM which supports x1 Lane.

Signed-off-by: Siddharth Vadapalli <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Nishanth Menon <[email protected]>

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arm64: dts: ti: k3-j721e-evm: Add overlay for PCIE1 Endpoint Mode

Add overlay to enable the PCIE1 instance of PCIe on J721E-EVM in Endpoint
mode of operation. Additionally, in order to support both

arm64: dts: ti: k3-j721e-evm: Add overlay for PCIE1 Endpoint Mode

Add overlay to enable the PCIE1 instance of PCIe on J721E-EVM in Endpoint
mode of operation. Additionally, in order to support both PCIE0 and PCIE1
in Endpoint Mode of operation, enable applying device-tree overlays on
"k3-j721e-evm-pcie0-ep.dtb", thereby allowing the overlay for PCIE1 in
Endpoint mode to be applied on the aforementioned DTB.

Signed-off-by: Siddharth Vadapalli <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Nishanth Menon <[email protected]>

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arm64: dts: ti: Makefile: Fix typo "k3-j7200-evm-pcie1-ep.dtbo"

The list of "dtbs" should contain the resultant "dtb" formed by applying
the "dtbo" overlay on the base "dtb", rather than the "dtbo"

arm64: dts: ti: Makefile: Fix typo "k3-j7200-evm-pcie1-ep.dtbo"

The list of "dtbs" should contain the resultant "dtb" formed by applying
the "dtbo" overlay on the base "dtb", rather than the "dtbo" itself.

Hence, change "k3-j7200-evm-pcie1-ep.dtbo" to "k3-j7200-evm-pcie1-ep.dtb"
in the list of "dtbs".

Fixes: f43ec89bbc83 ("arm64: dts: ti: k3-j7200-evm: Add overlay for PCIE1 Endpoint Mode")
Signed-off-by: Siddharth Vadapalli <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Nishanth Menon <[email protected]>

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arm64: dts: ti: k3-am62-verdin: Add Ivy carrier board

Add Toradex Verdin Ivy carrier board support. One notable feature of Ivy
is the analog inputs. These inputs are multiplexed, allowing the same
i

arm64: dts: ti: k3-am62-verdin: Add Ivy carrier board

Add Toradex Verdin Ivy carrier board support. One notable feature of Ivy
is the analog inputs. These inputs are multiplexed, allowing the same
input to measure either voltage or current. For current measurements,
a GPIO switch enables or disables the shunt resistor. This process is
automatically managed by the Linux kernel using the IIO and MUX
subsystems. Voltage measurement is always enabled, but the voltage
measured by the ADC is scaled by a cascade voltage divider. In the
device tree, the equivalent gain of the voltage divider is used, which
can be calculated as follows:

------------
+ |
.-.
R1=30K | |
| |
'-'
|-------------------
Analog Input (AIN) | |
.-. .-.
R2=10K | | R3=30K | |
| | | |
'-' '-'
| |
| |--------
| .-. +
| R4=10K | |
| | | ADC Input (Channels 0 and 1)
| '-'
- | | -
-----------| |--------
=== ===
GND GND

Vin = Analog Input (AIN)
Vout = ADC Input
Rth = Thevenin Equiv. Resistance
Vth = Thevenin Equiv. Voltage
RL = Load Resistor

R1 = 30K, R2 = 10K, R3 = 30K, R4 = 10K
RL = R4 = 10K

Rth = (R1 // R2) + R3 = 37500 Ohms
Vth = (Vin * R2) / (R1 + R2) = Vin/4;
Vout = (Vth * RL)/ (Rth + RL) = Vth/4.75 = Vin/19
Gain = Vout/Vin = 1/19

https://www.toradex.com/products/carrier-board/ivy-carrier-board

Signed-off-by: João Paulo Gonçalves <[email protected]>
Signed-off-by: Francesco Dolcini <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: k3-am642-evm: Add overlay for PCIe0 EP mode

Add overlay to enable the PCIe0 instance of PCIe on AM642-EVM in
Endpoint mode of operation.

Signed-off-by: Siddharth Vadapalli <s-vadapa

arm64: dts: ti: k3-am642-evm: Add overlay for PCIe0 EP mode

Add overlay to enable the PCIe0 instance of PCIe on AM642-EVM in
Endpoint mode of operation.

Signed-off-by: Siddharth Vadapalli <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: k3-j7200-evm: Add overlay for PCIE1 Endpoint Mode

Add overlay to enable the PCIE1 instance of PCIe on J7200-EVM in
Endpoint mode of operation.

Signed-off-by: Siddharth Vadapalli <s-

arm64: dts: ti: k3-j7200-evm: Add overlay for PCIE1 Endpoint Mode

Add overlay to enable the PCIE1 instance of PCIe on J7200-EVM in
Endpoint mode of operation.

Signed-off-by: Siddharth Vadapalli <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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Revert "arm64: dts: ti: am62-phyboard-lyra: Add overlay to increase cpu frequency to 1.4 GHz"

We now configure the a53_opp_table to include a 1.4 GHz node and set our
VDD_CORE to 0.85v in the k3-am6

Revert "arm64: dts: ti: am62-phyboard-lyra: Add overlay to increase cpu frequency to 1.4 GHz"

We now configure the a53_opp_table to include a 1.4 GHz node and set our
VDD_CORE to 0.85v in the k3-am62-phycore-som.dtsi. This change is to
match our PMIC which is now set to output 0.85v by default.

This reverts commit 7a5775a3da906dab059b8de60a2b88f6016cb4b8.

Signed-off-by: Garrett Giordano <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: Add support for J742S2 EVM board

J742S2 EVM board is designed for TI J742S2 SoC. It supports the following
interfaces:
* 16 GB DDR4 RAM
* x2 Gigabit Ethernet interfaces capable of wo

arm64: dts: ti: Add support for J742S2 EVM board

J742S2 EVM board is designed for TI J742S2 SoC. It supports the following
interfaces:
* 16 GB DDR4 RAM
* x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode
* x1 Input Audio Jack, x1 Output Audio Jack
* x1 USB2.0 Hub with two Type A host and x1 USB 3.1 Type-C Port
* x1 4L PCIe connector
* x1 UHS-1 capable micro-SD card slot
* 512 Mbit OSPI flash, 1 Gbit Octal NAND flash, 512 Mbit QSPI flash,
UFS flash.
* x6 UART through UART-USB bridge
* XDS110 for onboard JTAG debug using USB
* Temperature sensors, user push buttons and LEDs
* x1 GESI expander, x2 Display connector
* x1 15-pin CSI header
* x6 MCAN instances

Link: https://www.ti.com/lit/ug/sprujd8/sprujd8.pdf (EVM user guide)
Link: https://www.ti.com/lit/zip/SPAC001 (Schematics)
Reviewed-by: Beleswar Padhi <[email protected]>
Signed-off-by: Manorit Chawdhry <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: Add k3-am67a-beagley-ai

BeagleBoard.org BeagleY-AI is an easy to use, affordable open source
hardware single board computer based on the Texas Instruments AM67A,
which features a qua

arm64: dts: ti: Add k3-am67a-beagley-ai

BeagleBoard.org BeagleY-AI is an easy to use, affordable open source
hardware single board computer based on the Texas Instruments AM67A,
which features a quad-core 64-bit Arm CPU subsystem, 2 general-purpose
digital-signal-processors (DSP) and matrix-multiply-accelerators (MMA),
GPU, vision and deep learning accelerators, and multiple Arm Cortex-R5
cores for low-power, low-latency GPIO control.

https://beagley-ai.org/
https://openbeagle.org/beagley-ai/beagley-ai

Signed-off-by: Robert Nelson <[email protected]>
Reviewed-by: Roger Quadros <[email protected]>
Reviewed-by: Jared McArthur <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Nishanth Menon <[email protected]>

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arm64: dts: ti: iot2050: Add overlays for M.2 used by firmware

To allow firmware to pick up all DTs from here, move the overlays that
are normally applied during DT fixup to the kernel source as wel

arm64: dts: ti: iot2050: Add overlays for M.2 used by firmware

To allow firmware to pick up all DTs from here, move the overlays that
are normally applied during DT fixup to the kernel source as well. Hook
then into the build nevertheless to ensure that regular checks are
performed.

Signed-off-by: Jan Kiszka <[email protected]>
Link: https://lore.kernel.org/r/91f8b825467651ebd51a4051f153ab136eeb1849.1724830741.git.jan.kiszka@siemens.com
Signed-off-by: Nishanth Menon <[email protected]>

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arm64: dts: ti: Add basic support for phyBOARD-Lyra-AM62Ax

The phyCORE-AM62Ax [1] is a SoM (System on Module) featuring TI's AM62Ax SoC.
It can be used in combination with different carrier boards.

arm64: dts: ti: Add basic support for phyBOARD-Lyra-AM62Ax

The phyCORE-AM62Ax [1] is a SoM (System on Module) featuring TI's AM62Ax SoC.
It can be used in combination with different carrier boards.
This module can come with different sizes and models for
DDR, eMMC, SPI NOR Flash and various SoCs from the AM62Ax family.

A development Kit, called phyBOARD-Lyra [2] is used as a carrier board
reference design with a mapper board being used to allow the phyCORE-AM62Ax
to fit the phyBOARD-Lyra.

Supported features:
* Debug UART
* SPI NOR Flash
* eMMC
* 2x Ethernet
* Micro SD card
* I2C EEPROM
* I2C RTC
* GPIO Expander
* LEDs
* USB
* HDMI
* USB-C
* Audio

For more details, see:

[1] Product page SoM: https://www.phytec.com/product/phycore-am62a
[2] Product page CB: https://www.phytec.com/product/phyboard-am62a

Signed-off-by: Garrett Giordano <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: am62-lp-sk: Add overlay for NAND expansion card

The NAND expansion card (PROC143E1) connects over the User/MCU/PRU
Expansion port on the am62-lp-sk EVM.

The following pins are share

arm64: dts: ti: am62-lp-sk: Add overlay for NAND expansion card

The NAND expansion card (PROC143E1) connects over the User/MCU/PRU
Expansion port on the am62-lp-sk EVM.

The following pins are shared between McASP1 and GPMC-NAND so
both cannot work simultaneously.

Pin name McASP1 function GPMC function
======== =============== =============
J17 MCASP1_AXR0 GPMC0_WEN
P21 MCASP1_AFSX GPMC0_WAIT0
K17 MCASP1_ACLKX GPMC0_BE0N_CLE
K20 MCASP1_AXR2 GPMC0_ADVN_ALE

The factory default sets the pins for McASP1 use. (i.e.
Resistor Array RA1 installed, RA4 not installed).

For NAND use, RA1 has to be removed and RA4 must be
installed.

Signed-off-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: k3-am6xx-phycore-qspi-nor: Add overlay to enable QSPI NOR

Add an overlay to change from the default OSPI NOR to QSPI NOR
for all am6xx-phycore-som boards.
The EEPROM on am6xx-phycore

arm64: dts: ti: k3-am6xx-phycore-qspi-nor: Add overlay to enable QSPI NOR

Add an overlay to change from the default OSPI NOR to QSPI NOR
for all am6xx-phycore-som boards.
The EEPROM on am6xx-phycore-soms contains information about the
configuration of the SOM. The standard configuration of the SOM
has an ospi nor, but if qspi nor is populated, the EEPROM will
indicate that change and we can use this overlay to cleanly change to
qspi nor.

Signed-off-by: Nathan Morrisson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: am642-evm: Add overlay for NAND expansion card

The NAND expansion card plugs in over the HSE (High Speed Expansion)
connector. Add support for it.

We add the ranges property to the

arm64: dts: ti: am642-evm: Add overlay for NAND expansion card

The NAND expansion card plugs in over the HSE (High Speed Expansion)
connector. Add support for it.

We add the ranges property to the GPMC node instead of the NAND
overlay file to prevent below warnings.

/fragment@3/__overlay__: Relying on default #address-cells value
/fragment@3/__overlay__: Relying on default #size-cells value

As GPMC is dedicated for NAND use on this board, it should be OK.

Signed-off-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: k3-am6xx-phycore-som: Add overlay to disable spi nor

Add an overlay to disable the spi nor for all am6xx-phycore-som
boards.
The EEPROM on am6xx-phycore-soms contains information abo

arm64: dts: ti: k3-am6xx-phycore-som: Add overlay to disable spi nor

Add an overlay to disable the spi nor for all am6xx-phycore-som
boards.
The EEPROM on am6xx-phycore-soms contains information about the
configuration of the SOM. The standard configuration of the SOM
has an ospi nor, but if no nor is populated, the EEPROM will indicate
that change and we can use this overlay to cleanly disable the
spi nor.

Signed-off-by: Nathan Morrisson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: k3-am6xx-phycore-som: Add overlay to disable rtc

Add an overlay to disable the rtc for all am6xx-phycore-som boards.
The EEPROM on am6xx-phycore-soms contains information about the
c

arm64: dts: ti: k3-am6xx-phycore-som: Add overlay to disable rtc

Add an overlay to disable the rtc for all am6xx-phycore-som boards.
The EEPROM on am6xx-phycore-soms contains information about the
configuration of the SOM. The standard configuration of the SOM
has an rtc, but if no rtc is populated, the EEPROM will indicate that
change and we can use this overlay to cleanly disable the rtc.

Signed-off-by: Nathan Morrisson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: k3-am6xx-phycore-som: Add overlay to disable eth phy

Add an overlay to disable the eth phy for all am6xx-phycore-som
boards.
The EEPROM on am6xx-phycore-soms contains information abo

arm64: dts: ti: k3-am6xx-phycore-som: Add overlay to disable eth phy

Add an overlay to disable the eth phy for all am6xx-phycore-som
boards.
The EEPROM on am6xx-phycore-soms contains information about the
configuration of the SOM. The standard configuration of the SOM
has an ethernet phy, but if no ethernet phy is populated, the EEPROM
will indicate that change and we can use this overlay to cleanly
disable the ethernet phy.

Signed-off-by: Nathan Morrisson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: k3-j721e: Add overlay for J721E Infotainment Expansion Board

J721E common processor board can be interfaced with the infotainment
expansion board[0] to enable the following audio/vid

arm64: dts: ti: k3-j721e: Add overlay for J721E Infotainment Expansion Board

J721E common processor board can be interfaced with the infotainment
expansion board[0] to enable the following audio/video interfaces in
addition to the peripherals provided by the common processor board:
- Two Audio codecs each with three Stereo Inputs and four Stereo Outputs
- Audio input over FPD Link III
- Digital Audio Interface TX/RX
- HDMI/FPD LINK III Display out
- LI/OV Camera input

Add support for TFP410 HDMI bridge located on the Infotainment Expansion
Board (connected to J46 & J51).
Add a HDMI connector node and connect the endpoints as below:
DSS => TFP410 bridge => HDMI connector
Also add the pinmux data and board muxes for DPI.

Rest of the peripherals are not added as of now.

[0]: <https://www.ti.com/lit/ug/spruit0a/spruit0a.pdf>

Signed-off-by: Tomi Valkeinen <[email protected]>
[[email protected]: minor cleanup]
Signed-off-by: Jayesh Choudhary <[email protected]>
Reviewed-by: Aradhya Bhatia <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: am642-phyboard-electra: Add overlay to enable PCIe

Add an overlay to enable PCIe on the am642-phyboard-electra. The
serdes is muxed from USB to PCIe, so we are restricted to USB2 whi

arm64: dts: ti: am642-phyboard-electra: Add overlay to enable PCIe

Add an overlay to enable PCIe on the am642-phyboard-electra. The
serdes is muxed from USB to PCIe, so we are restricted to USB2 while
using this overlay.

Signed-off-by: Nathan Morrisson <[email protected]>
Reviewed-by: Wadim Egorov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: k3-j784s4-evm: Add overlay for PCIe0 and PCIe1 EP Mode

Add overlay to enable the PCIe0 and PCIe1 instances of PCIe on J784S4-EVM
in Endpoint mode of operation.

Signed-off-by: Siddha

arm64: dts: ti: k3-j784s4-evm: Add overlay for PCIe0 and PCIe1 EP Mode

Add overlay to enable the PCIe0 and PCIe1 instances of PCIe on J784S4-EVM
in Endpoint mode of operation.

Signed-off-by: Siddharth Vadapalli <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: am62-phyboard-lyra: Add overlay to increase cpu frequency to 1.4 GHz

The am625 is capable of running at 1.4 GHz when VDD_CORE is increased
from 0.75V to 0.85V. Increasing the voltage

arm64: dts: ti: am62-phyboard-lyra: Add overlay to increase cpu frequency to 1.4 GHz

The am625 is capable of running at 1.4 GHz when VDD_CORE is increased
from 0.75V to 0.85V. Increasing the voltage while the AM625 is
running has not been validated by TI, so we provide an overlay so that
people may choose to run at 1.4 GHz if they need the additional
performance.

Signed-off-by: Nathan Morrisson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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arm64: dts: ti: k3-am642-evm-icssg1-dualemac: add overlay for mii mode

Add device tree overlay to enable both ICSSG1 ports available on AM64x-EVM
in MII mode.

Signed-off-by: MD Danish Anwar <danish

arm64: dts: ti: k3-am642-evm-icssg1-dualemac: add overlay for mii mode

Add device tree overlay to enable both ICSSG1 ports available on AM64x-EVM
in MII mode.

Signed-off-by: MD Danish Anwar <[email protected]>
Reviewed-by: Ravi Gunasekaran <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>

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