PCI: microchip: Move pcie-microchip-host.c to PLDA directory

Since Microchip PolarFire PCIe host is PLDA XpressRich IP, move to PLDA
directory. Prepare for refactoring the codes.

[kwilczynski: comm

PCI: microchip: Move pcie-microchip-host.c to PLDA directory

Since Microchip PolarFire PCIe host is PLDA XpressRich IP, move to PLDA
directory. Prepare for refactoring the codes.

[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/[email protected]
Signed-off-by: Minda Chen <[email protected]>
Signed-off-by: Krzysztof Wilczyński <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>

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PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver

Add support for Xilinx XDMA Soft IP core as Root Port.

The Zynq UltraScale+ MPSoCs devices support XDMA soft IP module in
programmable logic.

The

PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver

Add support for Xilinx XDMA Soft IP core as Root Port.

The Zynq UltraScale+ MPSoCs devices support XDMA soft IP module in
programmable logic.

The integrated XDMA Soft IP block has integrated bridge function that
can act as PCIe Root Port.

[kwilczynski: correct indentation and whitespaces, Kconfig help update]
Link: https://lore.kernel.org/linux-pci/[email protected]
Signed-off-by: Thippeswamy Havalige <[email protected]>
Signed-off-by: Bharat Kumar Gogada <[email protected]>
Signed-off-by: Krzysztof Wilczyński <[email protected]>

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PCI: apple: Add initial hardware bring-up

Add a minimal driver to bring up the PCIe bus on Apple system-on-chips,
particularly the Apple M1. This driver exposes the internal bus used for
the USB typ

PCI: apple: Add initial hardware bring-up

Add a minimal driver to bring up the PCIe bus on Apple system-on-chips,
particularly the Apple M1. This driver exposes the internal bus used for
the USB type-A ports, Ethernet, Wi-Fi, and Bluetooth. Bringing up the
radios requires additional drivers beyond what's necessary for PCIe itself.

Co-developed-by: Stan Skowronek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stan Skowronek <[email protected]>
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Signed-off-by: Marc Zyngier <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Reviewed-by: Sven Peter <[email protected]>

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PCI: mt7621: Add MediaTek MT7621 PCIe host controller driver

Add driver for the PCIe controller of the MT7621 SoC.

[bhelgaas: rename from pci-mt7621.c to pcie-mt7621.c; also rename Kconfig
symbol f

PCI: mt7621: Add MediaTek MT7621 PCIe host controller driver

Add driver for the PCIe controller of the MT7621 SoC.

[bhelgaas: rename from pci-mt7621.c to pcie-mt7621.c; also rename Kconfig
symbol from PCI_MT7621 to PCIE_MT7621]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Sergio Paracuellos <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Acked-by: Greg Kroah-Hartman <[email protected]>

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PCI: ixp4xx: Add a new driver for IXP4xx

This adds a new PCI controller driver for the Intel IXP4xx
(IX425, IXP435 etc), based on the XScale microarchitecture.

This replaces the old driver in arch/

PCI: ixp4xx: Add a new driver for IXP4xx

This adds a new PCI controller driver for the Intel IXP4xx
(IX425, IXP435 etc), based on the XScale microarchitecture.

This replaces the old driver in arch/arm/mach-ixp4xx/common-pci.c
which utilized the ARM-specific BIOS32 PCI framework,
and all parameterization for such things as memory and
IO space as well as interrupt swizzling is done from the
device tree.

The plan is to phase out and delete the old driver piecemal.

The __raw_writel() and __raw_readl() are used for accessing
the PCI controller for the same reason that these accessors
are used in the timer, IRQ and GPIO drivers: the platform
will alter its address bus pattern based on whether the
system is booted in big- or little-endian mode. For this
reason all register on IXP4xx must always be accessed in
native (CPU) endianness.

This driver supports 64MB of PCI memory space, but not the
indirect access of 1GB that is available in the old driver.
We can address that later if and only if there are users
that need all 1GB of PCI address space. Krzysztof reports
having to use indirect MMIO only once for a VGA card. There
is work ongoing for general indirect MMIO. (In practice
the indirect MMIO is performed by writing address and
writing and reading values into/from a controller
register.)

Tested by booting the NSLU2, attaching a USB stick, mounting
and browsing the drive.

Link: https://lore.kernel.org/linux-arm-kernel/[email protected]/
Cc: Arnd Bergmann <[email protected]>
Cc: Imre Kaloz <[email protected]>
Cc: Krzysztof Halasa <[email protected]>
Cc: Zoltan HERPAI <[email protected]>
Cc: Raylynn Knight <[email protected]>
Acked-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Arnd Bergmann <[email protected]>
Acked-by: Lorenzo Pieralisi <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>

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PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192

MediaTek's PCIe host controller has three generation HWs, the new
generation HW is an individual bridge, it supports Gen3 speed and
compatible

PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192

MediaTek's PCIe host controller has three generation HWs, the new
generation HW is an individual bridge, it supports Gen3 speed and
compatible with Gen2, Gen1 speed.

Add support for new Gen3 controller which can be found on MT8192.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jianjun Wang <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Acked-by: Ryder Lee <[email protected]>

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PCI: Avoid building empty drivers

There are harmless warnings when compile testing the kernel with
CONFIG_TRIM_UNUSED_KSYMS:

drivers/pci/controller/dwc/pcie-al.o: no symbols
drivers/pci/control

PCI: Avoid building empty drivers

There are harmless warnings when compile testing the kernel with
CONFIG_TRIM_UNUSED_KSYMS:

drivers/pci/controller/dwc/pcie-al.o: no symbols
drivers/pci/controller/pci-thunder-ecam.o: no symbols
drivers/pci/controller/pci-thunder-pem.o: no symbols

The problem here is that the host drivers get built even when the
configuration symbols are all disabled, as they pretend to not be drivers
but are silently enabled because of the promise that ACPI-based systems
need no drivers.

Add back the normal symbols to have these drivers built, and change the
logic to otherwise only build them when both CONFIG_PCI_QUIRKS and
CONFIG_ACPI are enabled.

As a side-effect, this enables compile-testing the drivers on other
architectures, which in turn needs the acpi_get_rc_resources() function to
be defined.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Robert Richter <[email protected]>

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PCI: microchip: Add Microchip PolarFire PCIe controller driver

Add support for the Microchip PolarFire PCIe controller when configured in
host (Root Complex) mode.

[bhelgaas: wrap lines to fit in 8

PCI: microchip: Add Microchip PolarFire PCIe controller driver

Add support for the Microchip PolarFire PCIe controller when configured in
host (Root Complex) mode.

[bhelgaas: wrap lines to fit in 80 columns, fix trivial style issues]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Daire McNamara <[email protected]>
[[email protected]: minor comments tweak]
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Rob Herring <[email protected]>

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PCI: Remove tango host controller driver

The tango platform is getting removed, so the driver is no
longer needed.

Link: https://lore.kernel.org/r/[email protected]
Signed-of

PCI: Remove tango host controller driver

The tango platform is getting removed, so the driver is no
longer needed.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Acked-by: Mans Rullgard <[email protected]>
Cc: Marc Gonzalez <[email protected]>
Cc: Mans Rullgard <[email protected]>

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PCI: hip: Add handling of HiSilicon HIP PCIe controller errors

The HiSilicon HIP PCIe controller is capable of handling errors
on root port and performing port reset separately at each root port.

A

PCI: hip: Add handling of HiSilicon HIP PCIe controller errors

The HiSilicon HIP PCIe controller is capable of handling errors
on root port and performing port reset separately at each root port.

Add error handling driver for HIP PCIe controller to log
and report recoverable errors. Perform root port reset and restore
link status after the recovery.

Following are some of the PCIe controller's recoverable errors
1. completion transmission timeout error.
2. CRS retry counter over the threshold error.
3. ECC 2 bit errors
4. AXI bresponse/rresponse errors etc.

The driver placed in the drivers/pci/controller/ because the
HIP PCIe controller does not use DWC IP.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Yicong Yang <[email protected]>
Signed-off-by: Shiju Jose <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Acked-by: Bjorn Helgaas <[email protected]>

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PCI: xilinx-cpm: Add Versal CPM Root Port driver

Add support for Versal CPM as Root Port.

The Versal ACAP devices include CCIX-PCIe Module (CPM). The integrated
block for CPM along with the integra

PCI: xilinx-cpm: Add Versal CPM Root Port driver

Add support for Versal CPM as Root Port.

The Versal ACAP devices include CCIX-PCIe Module (CPM). The integrated
block for CPM along with the integrated bridge can function as PCIe Root
Port.

Bridge error and legacy interrupts in Versal CPM are handled using Versal
CPM specific interrupt line.

[bhelgaas: fold in kerneldoc fix from
https://lore.kernel.org/linux-acpi/[email protected]/]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bharat Kumar Gogada <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Rob Herring <[email protected]>

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PCI: Add Loongson PCI Controller support

This controller can be found on Loongson-2K SoC, Loongson-3
systems with RS780E/LS7A PCH.

The RS780E part of code was previously located at
arch/mips/pci/op

PCI: Add Loongson PCI Controller support

This controller can be found on Loongson-2K SoC, Loongson-3
systems with RS780E/LS7A PCH.

The RS780E part of code was previously located at
arch/mips/pci/ops-loongson3.c and now it can use generic PCI
driver implementation.

Signed-off-by: Jiaxun Yang <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Acked-by: Lorenzo Pieralisi <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>

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PCI: rcar: Add endpoint mode support

Add support for R-Car PCIe controller to work in endpoint mode.

Link: https://lore.kernel.org/r/[email protected]

PCI: rcar: Add endpoint mode support

Add support for R-Car PCIe controller to work in endpoint mode.

Link: https://lore.kernel.org/r/1588854799-13710-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Lad Prabhakar <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Reviewed-by: Yoshihiro Shimoda <[email protected]>

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PCI: rcar: Move shareable code to a common file

Move shareable code to common file pcie-rcar.c and the #defines to
pcie-rcar.h so that the common code can be reused with endpoint driver.
There are n

PCI: rcar: Move shareable code to a common file

Move shareable code to common file pcie-rcar.c and the #defines to
pcie-rcar.h so that the common code can be reused with endpoint driver.
There are no functional changes with this patch for the host controller
driver.

Link: https://lore.kernel.org/r/1588854799-13710-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Lad Prabhakar <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Reviewed-by: Yoshihiro Shimoda <[email protected]>

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PCI: rcar: Rename pcie-rcar.c to pcie-rcar-host.c

This commit renames pcie-rcar.c to pcie-rcar-host.c in preparation for
adding support for endpoint mode. CONFIG_PCIE_RCAR is kept so that arm64
defc

PCI: rcar: Rename pcie-rcar.c to pcie-rcar-host.c

This commit renames pcie-rcar.c to pcie-rcar-host.c in preparation for
adding support for endpoint mode. CONFIG_PCIE_RCAR is kept so that arm64
defconfig change can be a separate patch.

With this patch both config options PCIE_RCAR and PCIE_RCAR_HOST will be
available but PCIE_RCAR internally selects PCIE_RCAR_HOST so that bisect
builds wont be affected.

Link: https://lore.kernel.org/r/1588854799-13710-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Lad Prabhakar <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Reviewed-by: Yoshihiro Shimoda <[email protected]>

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PCI: mobiveil: Modularize the Mobiveil PCIe Host Bridge IP driver

Modularize the Mobiveil PCIe host driver according to the abstraction of
Root Complex and Endpoint and move it into a new directory

PCI: mobiveil: Modularize the Mobiveil PCIe Host Bridge IP driver

Modularize the Mobiveil PCIe host driver according to the abstraction of
Root Complex and Endpoint and move it into a new directory in order to
make it easier to reuse the driver functions to add new host drivers for
systems integrating the Mobiveil PCIe GPEX IP.

Signed-off-by: Hou Zhiqiang <[email protected]>
[[email protected]: updated commit log]
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Reviewed-by: Andrew Murray <[email protected]>

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PCI: brcmstb: Add Broadcom STB PCIe host controller driver

This adds a basic driver for Broadcom's STB PCIe controller, for now
aimed at Raspberry Pi 4's SoC, bcm2711.

Signed-off-by: Jim Quinlan <j

PCI: brcmstb: Add Broadcom STB PCIe host controller driver

This adds a basic driver for Broadcom's STB PCIe controller, for now
aimed at Raspberry Pi 4's SoC, bcm2711.

Signed-off-by: Jim Quinlan <[email protected]>
Co-developed-by: Nicolas Saenz Julienne <[email protected]>
Signed-off-by: Nicolas Saenz Julienne <[email protected]>
[[email protected]: updated brcm_pcie_get_rc_bar2_size_and_offset()according to https://lore.kernel.org/linux-pci/[email protected]]
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Reviewed-by: Andrew Murray <[email protected]>
Reviewed-by: Jeremy Linton <[email protected]>

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PCI: cadence: Move all files to per-device cadence directory

Cadence core library files may be used by various platform drivers.
Add a new directory "cadence" to group all the Cadence core library f

PCI: cadence: Move all files to per-device cadence directory

Cadence core library files may be used by various platform drivers.
Add a new directory "cadence" to group all the Cadence core library files
and the platforms using Cadence core library.

Signed-off-by: Tom Joseph <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Reviewed-by: Andrew Murray <[email protected]>

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PCI: cadence: Refactor driver to use as a core library

Cadence PCIe host and endpoint IP may be embedded into a variety of
SoCs/platforms. Let's extract the platform related APIs/Structures in the
c

PCI: cadence: Refactor driver to use as a core library

Cadence PCIe host and endpoint IP may be embedded into a variety of
SoCs/platforms. Let's extract the platform related APIs/Structures in the
current driver to a separate file (pcie-cadence-plat.c), such that the
common functionality can be used by future platforms.

Signed-off-by: Tom Joseph <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Reviewed-by: Andrew Murray <[email protected]>

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PCI: hv: Add a Hyper-V PCI interface driver for software backchannel interface

This interface driver is a helper driver allows other drivers to
have a common interface with the Hyper-V PCI frontend

PCI: hv: Add a Hyper-V PCI interface driver for software backchannel interface

This interface driver is a helper driver allows other drivers to
have a common interface with the Hyper-V PCI frontend driver.

Signed-off-by: Haiyang Zhang <[email protected]>
Signed-off-by: Saeed Mahameed <[email protected]>
Signed-off-by: David S. Miller <[email protected]>

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PCI: mobiveil: Add Kconfig/Makefile entries

commit 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP
driver") did not add the configuration and build infrastructure to
configure and bui

PCI: mobiveil: Add Kconfig/Makefile entries

commit 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP
driver") did not add the configuration and build infrastructure to
configure and build the mobiveil controller driver, so at present the
driver code is in the kernel but cannot be compiled.

Add the mobiveil controller driver Kconfig/Makefile infrastructure.

Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP
driver")
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Cc: Bjorn Helgaas <[email protected]>
Cc: Subrahmanya Lingappa <[email protected]>

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PCI: Collect all native drivers under drivers/pci/controller/

Native PCI drivers for root complex devices were originally all in
drivers/pci/host/. Some of these devices can also be operated in end

PCI: Collect all native drivers under drivers/pci/controller/

Native PCI drivers for root complex devices were originally all in
drivers/pci/host/. Some of these devices can also be operated in endpoint
mode. Drivers for endpoint mode didn't seem to fit in the "host"
directory, so we put both the root complex and endpoint drivers in
per-device directories, e.g., drivers/pci/dwc/, drivers/pci/cadence/, etc.

These per-device directories contain trivial Kconfig and Makefiles and
clutter drivers/pci/. Make a new drivers/pci/controllers/ directory and
collect all the device-specific drivers there.

No functional change intended.

Link: https://lkml.kernel.org/r/[email protected]
Signed-off-by: Shawn Lin <[email protected]>
[bhelgaas: changelog]
Signed-off-by: Bjorn Helgaas <[email protected]>

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