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    <title>Changes in Makefile</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>24934ee8 - PCI: microchip: Move pcie-microchip-host.c to PLDA directory</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#24934ee8</link>
        <description>PCI: microchip: Move pcie-microchip-host.c to PLDA directorySince Microchip PolarFire PCIe host is PLDA XpressRich IP, move to PLDAdirectory. Prepare for refactoring the codes.[kwilczynski: commit log]Link: https://lore.kernel.org/linux-pci/20240328091835.14797-3-minda.chen@starfivetech.comSigned-off-by: Minda Chen &lt;minda.chen@starfivetech.com&gt;Signed-off-by: Krzysztof Wilczy&#324;ski &lt;kwilczynski@kernel.org&gt;Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Thu, 28 Mar 2024 09:18:15 +0000</pubDate>
        <dc:creator>Minda Chen &lt;minda.chen@starfivetech.com&gt;</dc:creator>
    </item>
<item>
        <title>8d786149 - PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#8d786149</link>
        <description>PCI: xilinx-xdma: Add Xilinx XDMA Root Port driverAdd support for Xilinx XDMA Soft IP core as Root Port.The Zynq UltraScale+ MPSoCs devices support XDMA soft IP module inprogrammable logic.The integrated XDMA Soft IP block has integrated bridge function thatcan act as PCIe Root Port.[kwilczynski: correct indentation and whitespaces, Kconfig help update]Link: https://lore.kernel.org/linux-pci/20231003173453.938190-4-thippeswamy.havalige@amd.comSigned-off-by: Thippeswamy Havalige &lt;thippeswamy.havalige@amd.com&gt;Signed-off-by: Bharat Kumar Gogada &lt;bharat.kumar.gogada@amd.com&gt;Signed-off-by: Krzysztof Wilczy&#324;ski &lt;kwilczynski@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Tue, 03 Oct 2023 17:34:53 +0000</pubDate>
        <dc:creator>Thippeswamy Havalige &lt;thippeswamy.havalige@amd.com&gt;</dc:creator>
    </item>
<item>
        <title>1e33888f - PCI: apple: Add initial hardware bring-up</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#1e33888f</link>
        <description>PCI: apple: Add initial hardware bring-upAdd a minimal driver to bring up the PCIe bus on Apple system-on-chips,particularly the Apple M1. This driver exposes the internal bus used forthe USB type-A ports, Ethernet, Wi-Fi, and Bluetooth. Bringing up theradios requires additional drivers beyond what&apos;s necessary for PCIe itself.Co-developed-by: Stan Skowronek &lt;stan@corellium.com&gt;Link: https://lore.kernel.org/r/20210929163847.2807812-5-maz@kernel.orgSigned-off-by: Stan Skowronek &lt;stan@corellium.com&gt;Signed-off-by: Alyssa Rosenzweig &lt;alyssa@rosenzweig.io&gt;Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;Reviewed-by: Sven Peter &lt;sven@svenpeter.dev&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Wed, 29 Sep 2021 16:38:37 +0000</pubDate>
        <dc:creator>Alyssa Rosenzweig &lt;alyssa@rosenzweig.io&gt;</dc:creator>
    </item>
<item>
        <title>2bdd5238 - PCI: mt7621: Add MediaTek MT7621 PCIe host controller driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#2bdd5238</link>
        <description>PCI: mt7621: Add MediaTek MT7621 PCIe host controller driverAdd driver for the PCIe controller of the MT7621 SoC.[bhelgaas: rename from pci-mt7621.c to pcie-mt7621.c; also rename Kconfigsymbol from PCI_MT7621 to PCIE_MT7621]Link: https://lore.kernel.org/r/20210922050035.18162-3-sergio.paracuellos@gmail.comSigned-off-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;Acked-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Wed, 22 Sep 2021 05:00:34 +0000</pubDate>
        <dc:creator>Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</dc:creator>
    </item>
<item>
        <title>f7821b49 - PCI: ixp4xx: Add a new driver for IXP4xx</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#f7821b49</link>
        <description>PCI: ixp4xx: Add a new driver for IXP4xxThis adds a new PCI controller driver for the Intel IXP4xx(IX425, IXP435 etc), based on the XScale microarchitecture.This replaces the old driver in arch/arm/mach-ixp4xx/common-pci.cwhich utilized the ARM-specific BIOS32 PCI framework,and all parameterization for such things as memory andIO space as well as interrupt swizzling is done from thedevice tree.The plan is to phase out and delete the old driver piecemal.The __raw_writel() and __raw_readl() are used for accessingthe PCI controller for the same reason that these accessorsare used in the timer, IRQ and GPIO drivers: the platformwill alter its address bus pattern based on whether thesystem is booted in big- or little-endian mode. For thisreason all register on IXP4xx must always be accessed innative (CPU) endianness.This driver supports 64MB of PCI memory space, but not theindirect access of 1GB that is available in the old driver.We can address that later if and only if there are usersthat need all 1GB of PCI address space. Krzysztof reportshaving to use indirect MMIO only once for a VGA card. Thereis work ongoing for general indirect MMIO. (In practicethe indirect MMIO is performed by writing address andwriting and reading values into/from a controllerregister.)Tested by booting the NSLU2, attaching a USB stick, mountingand browsing the drive.Link: https://lore.kernel.org/linux-arm-kernel/m37edwuv8m.fsf@t19.piap.pl/Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;Cc: Imre Kaloz &lt;kaloz@openwrt.org&gt;Cc: Krzysztof Halasa &lt;khalasa@piap.pl&gt;Cc: Zoltan HERPAI &lt;wigyori@uid0.hu&gt;Cc: Raylynn Knight &lt;rayknight@me.com&gt;Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;Acked-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Sun, 02 May 2021 22:09:20 +0000</pubDate>
        <dc:creator>Linus Walleij &lt;linus.walleij@linaro.org&gt;</dc:creator>
    </item>
<item>
        <title>d3bf75b5 - PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#d3bf75b5</link>
        <description>PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192MediaTek&apos;s PCIe host controller has three generation HWs, the newgeneration HW is an individual bridge, it supports Gen3 speed andcompatible with Gen2, Gen1 speed.Add support for new Gen3 controller which can be found on MT8192.Link: https://lore.kernel.org/r/20210420061723.989-4-jianjun.wang@mediatek.comSigned-off-by: Jianjun Wang &lt;jianjun.wang@mediatek.com&gt;Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Acked-by: Ryder Lee &lt;ryder.lee@mediatek.com&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Tue, 20 Apr 2021 06:17:19 +0000</pubDate>
        <dc:creator>Jianjun Wang &lt;jianjun.wang@mediatek.com&gt;</dc:creator>
    </item>
<item>
        <title>6e5a1fff - PCI: Avoid building empty drivers</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#6e5a1fff</link>
        <description>PCI: Avoid building empty driversThere are harmless warnings when compile testing the kernel withCONFIG_TRIM_UNUSED_KSYMS:  drivers/pci/controller/dwc/pcie-al.o: no symbols  drivers/pci/controller/pci-thunder-ecam.o: no symbols  drivers/pci/controller/pci-thunder-pem.o: no symbolsThe problem here is that the host drivers get built even when theconfiguration symbols are all disabled, as they pretend to not be driversbut are silently enabled because of the promise that ACPI-based systemsneed no drivers.Add back the normal symbols to have these drivers built, and change thelogic to otherwise only build them when both CONFIG_PCI_QUIRKS andCONFIG_ACPI are enabled.As a side-effect, this enables compile-testing the drivers on otherarchitectures, which in turn needs the acpi_get_rc_resources() function tobe defined.Link: https://lore.kernel.org/r/20210308152501.2135937-3-arnd@kernel.orgSigned-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;Reviewed-by: Robert Richter &lt;rric@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Mon, 08 Mar 2021 15:24:48 +0000</pubDate>
        <dc:creator>Arnd Bergmann &lt;arnd@arndb.de&gt;</dc:creator>
    </item>
<item>
        <title>6f15a9c9 - PCI: microchip: Add Microchip PolarFire PCIe controller driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#6f15a9c9</link>
        <description>PCI: microchip: Add Microchip PolarFire PCIe controller driverAdd support for the Microchip PolarFire PCIe controller when configured inhost (Root Complex) mode.[bhelgaas: wrap lines to fit in 80 columns, fix trivial style issues]Link: https://lore.kernel.org/r/20210125162934.5335-4-daire.mcnamara@microchip.comSigned-off-by: Daire McNamara &lt;daire.mcnamara@microchip.com&gt;[lorenzo.pieralisi@arm.com: minor comments tweak]Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Mon, 25 Jan 2021 16:29:33 +0000</pubDate>
        <dc:creator>Daire McNamara &lt;daire.mcnamara@microchip.com&gt;</dc:creator>
    </item>
<item>
        <title>de9427ca - PCI: Remove tango host controller driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#de9427ca</link>
        <description>PCI: Remove tango host controller driverThe tango platform is getting removed, so the driver is nolonger needed.Link: https://lore.kernel.org/r/20210120150800.1650898-1-arnd@kernel.orgSigned-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Acked-by: Mans Rullgard &lt;mans@mansr.com&gt;Cc: Marc Gonzalez &lt;marc.w.gonzalez@free.fr&gt;Cc: Mans Rullgard &lt;mans@mansr.com&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Wed, 20 Jan 2021 15:07:29 +0000</pubDate>
        <dc:creator>Arnd Bergmann &lt;arnd@arndb.de&gt;</dc:creator>
    </item>
<item>
        <title>acb52897 - PCI: hip: Add handling of HiSilicon HIP PCIe controller errors</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#acb52897</link>
        <description>PCI: hip: Add handling of HiSilicon HIP PCIe controller errorsThe HiSilicon HIP PCIe controller is capable of handling errorson root port and performing port reset separately at each root port.Add error handling driver for HIP PCIe controller to logand report recoverable errors. Perform root port reset and restorelink status after the recovery.Following are some of the PCIe controller&apos;s recoverable errors1. completion transmission timeout error.2. CRS retry counter over the threshold error.3. ECC 2 bit errors4. AXI bresponse/rresponse errors etc.The driver placed in the drivers/pci/controller/ because theHIP PCIe controller does not use DWC IP.Link: https://lore.kernel.org/r/20200903123456.1823-3-shiju.jose@huawei.comSigned-off-by: Yicong Yang &lt;yangyicong@hisilicon.com&gt;Signed-off-by: Shiju Jose &lt;shiju.jose@huawei.com&gt;Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Thu, 03 Sep 2020 12:34:56 +0000</pubDate>
        <dc:creator>Yicong Yang &lt;yangyicong@hisilicon.com&gt;</dc:creator>
    </item>
<item>
        <title>508f6106 - PCI: xilinx-cpm: Add Versal CPM Root Port driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#508f6106</link>
        <description>PCI: xilinx-cpm: Add Versal CPM Root Port driverAdd support for Versal CPM as Root Port.The Versal ACAP devices include CCIX-PCIe Module (CPM). The integratedblock for CPM along with the integrated bridge can function as PCIe RootPort.Bridge error and legacy interrupts in Versal CPM are handled using VersalCPM specific interrupt line.[bhelgaas: fold in kerneldoc fix fromhttps://lore.kernel.org/linux-acpi/20200729201224.26799-7-krzk@kernel.org/]Link: https://lore.kernel.org/r/1592312214-9347-3-git-send-email-bharat.kumar.gogada@xilinx.comSigned-off-by: Bharat Kumar Gogada &lt;bharat.kumar.gogada@xilinx.com&gt;Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Tue, 16 Jun 2020 12:56:54 +0000</pubDate>
        <dc:creator>Bharat Kumar Gogada &lt;bharat.kumar.gogada@xilinx.com&gt;</dc:creator>
    </item>
<item>
        <title>1f58cca5 - PCI: Add Loongson PCI Controller support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#1f58cca5</link>
        <description>PCI: Add Loongson PCI Controller supportThis controller can be found on Loongson-2K SoC, Loongson-3systems with RS780E/LS7A PCH.The RS780E part of code was previously located atarch/mips/pci/ops-loongson3.c and now it can use generic PCIdriver implementation.Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;Acked-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Tue, 26 May 2020 09:21:13 +0000</pubDate>
        <dc:creator>Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;</dc:creator>
    </item>
<item>
        <title>2a6d0d63 - PCI: rcar: Add endpoint mode support</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#2a6d0d63</link>
        <description>PCI: rcar: Add endpoint mode supportAdd support for R-Car PCIe controller to work in endpoint mode.Link: https://lore.kernel.org/r/1588854799-13710-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Reviewed-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Thu, 07 May 2020 12:33:18 +0000</pubDate>
        <dc:creator>Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;</dc:creator>
    </item>
<item>
        <title>78a0d7f2 - PCI: rcar: Move shareable code to a common file</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#78a0d7f2</link>
        <description>PCI: rcar: Move shareable code to a common fileMove shareable code to common file pcie-rcar.c and the #defines topcie-rcar.h so that the common code can be reused with endpoint driver.There are no functional changes with this patch for the host controllerdriver.Link: https://lore.kernel.org/r/1588854799-13710-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Reviewed-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Thu, 07 May 2020 12:33:13 +0000</pubDate>
        <dc:creator>Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;</dc:creator>
    </item>
<item>
        <title>a18f4b6e - PCI: rcar: Rename pcie-rcar.c to pcie-rcar-host.c</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#a18f4b6e</link>
        <description>PCI: rcar: Rename pcie-rcar.c to pcie-rcar-host.cThis commit renames pcie-rcar.c to pcie-rcar-host.c in preparation foradding support for endpoint mode. CONFIG_PCIE_RCAR is kept so that arm64defconfig change can be a separate patch.With this patch both config options PCIE_RCAR and PCIE_RCAR_HOST will beavailable but PCIE_RCAR internally selects PCIE_RCAR_HOST so that bisectbuilds wont be affected.Link: https://lore.kernel.org/r/1588854799-13710-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Reviewed-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Thu, 07 May 2020 12:33:12 +0000</pubDate>
        <dc:creator>Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;</dc:creator>
    </item>
<item>
        <title>03bdc388 - PCI: mobiveil: Modularize the Mobiveil PCIe Host Bridge IP driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#03bdc388</link>
        <description>PCI: mobiveil: Modularize the Mobiveil PCIe Host Bridge IP driverModularize the Mobiveil PCIe host driver according to the abstraction ofRoot Complex and Endpoint and move it into a new directory in order tomake it easier to reuse the driver functions to add new host drivers forsystems integrating the Mobiveil PCIe GPEX IP.Signed-off-by: Hou Zhiqiang &lt;Zhiqiang.Hou@nxp.com&gt;[lorenzo.pieralisi@arm.com: updated commit log]Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Thu, 13 Feb 2020 04:06:35 +0000</pubDate>
        <dc:creator>Hou Zhiqiang &lt;Zhiqiang.Hou@nxp.com&gt;</dc:creator>
    </item>
<item>
        <title>c0452137 - PCI: brcmstb: Add Broadcom STB PCIe host controller driver</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#c0452137</link>
        <description>PCI: brcmstb: Add Broadcom STB PCIe host controller driverThis adds a basic driver for Broadcom&apos;s STB PCIe controller, for nowaimed at Raspberry Pi 4&apos;s SoC, bcm2711.Signed-off-by: Jim Quinlan &lt;james.quinlan@broadcom.com&gt;Co-developed-by: Nicolas Saenz Julienne &lt;nsaenzjulienne@suse.de&gt;Signed-off-by: Nicolas Saenz Julienne &lt;nsaenzjulienne@suse.de&gt;[lorenzo.pieralisi@arm.com: updated brcm_pcie_get_rc_bar2_size_and_offset()according to https://lore.kernel.org/linux-pci/be8ddb33a7360af1815cf686f77f3f0913d02be3.camel@suse.de]Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;Reviewed-by: Jeremy Linton &lt;jeremy.linton@arm.com&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Mon, 16 Dec 2019 11:01:09 +0000</pubDate>
        <dc:creator>Jim Quinlan &lt;james.quinlan@broadcom.com&gt;</dc:creator>
    </item>
<item>
        <title>de80f95c - PCI: cadence: Move all files to per-device cadence directory</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#de80f95c</link>
        <description>PCI: cadence: Move all files to per-device cadence directoryCadence core library files may be used by various platform drivers.Add a new directory &quot;cadence&quot; to group all the Cadence core library filesand the platforms using Cadence core library.Signed-off-by: Tom Joseph &lt;tjoseph@cadence.com&gt;Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Mon, 11 Nov 2019 12:30:44 +0000</pubDate>
        <dc:creator>Tom Joseph &lt;tjoseph@cadence.com&gt;</dc:creator>
    </item>
<item>
        <title>bd22885a - PCI: cadence: Refactor driver to use as a core library</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#bd22885a</link>
        <description>PCI: cadence: Refactor driver to use as a core libraryCadence PCIe host and endpoint IP may be embedded into a variety ofSoCs/platforms. Let&apos;s extract the platform related APIs/Structures in thecurrent driver to a separate file (pcie-cadence-plat.c), such that thecommon functionality can be used by future platforms.Signed-off-by: Tom Joseph &lt;tjoseph@cadence.com&gt;Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;Reviewed-by: Andrew Murray &lt;andrew.murray@arm.com&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Mon, 11 Nov 2019 12:30:43 +0000</pubDate>
        <dc:creator>Tom Joseph &lt;tjoseph@cadence.com&gt;</dc:creator>
    </item>
<item>
        <title>348dd93e - PCI: hv: Add a Hyper-V PCI interface driver for software backchannel interface</title>
        <link>http://172.16.0.5:8080/history/linux-6.15/drivers/pci/controller/Makefile#348dd93e</link>
        <description>PCI: hv: Add a Hyper-V PCI interface driver for software backchannel interfaceThis interface driver is a helper driver allows other drivers tohave a common interface with the Hyper-V PCI frontend driver.Signed-off-by: Haiyang Zhang &lt;haiyangz@microsoft.com&gt;Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;

            List of files:
            /linux-6.15/drivers/pci/controller/Makefile</description>
        <pubDate>Thu, 22 Aug 2019 05:05:41 +0000</pubDate>
        <dc:creator>Haiyang Zhang &lt;haiyangz@microsoft.com&gt;</dc:creator>
    </item>
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