drm/amd/display: remove minimum Dispclk and apply oem panel timing.

[why & how]
1. apply oem panel timing (not only on OLED)
2. remove MIN_DPP_DISP_CLK request in driver.

This fix will apply for dc

drm/amd/display: remove minimum Dispclk and apply oem panel timing.

[why & how]
1. apply oem panel timing (not only on OLED)
2. remove MIN_DPP_DISP_CLK request in driver.

This fix will apply for dcn31x but not
sync with DML's output.

Reviewed-by: Ovidiu Bunea <[email protected]>
Signed-off-by: Charlene Liu <[email protected]>
Signed-off-by: Tom Chung <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: assume VBIOS supports DSC as default

[Why & How]
The clear_dsc_setting at boot logic was based on dcn version
check.
As such new ASIC lost this DSC clear up logic, change the
assump

drm/amd/display: assume VBIOS supports DSC as default

[Why & How]
The clear_dsc_setting at boot logic was based on dcn version
check.
As such new ASIC lost this DSC clear up logic, change the
assumption to BIOS support eDP DSC for new ASIC.

Reviewed-by: Alvin Lee <[email protected]>
Signed-off-by: Charlene Liu <[email protected]>
Signed-off-by: Tom Chung <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Do not enable replay when vtotal update is pending.

[Why&How]
Vtotal is not applied to HW when handling vsync interrupt.
Make sure vtotal is aligned before enable replay.

Reviewed-

drm/amd/display: Do not enable replay when vtotal update is pending.

[Why&How]
Vtotal is not applied to HW when handling vsync interrupt.
Make sure vtotal is aligned before enable replay.

Reviewed-by: Anthony Koo <[email protected]>
Reviewed-by: Robin Chen <[email protected]>
Signed-off-by: Danny Wang <[email protected]>
Signed-off-by: Zhongwei Zhang <[email protected]>
Signed-off-by: Tom Chung <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: replace dio encoder access

[WHY]
replace dio encoder access to work with new dio encoder
assignment.

[HOW}
1. before validation, access dio encoder by get_temp_dio_link_enc()
2. af

drm/amd/display: replace dio encoder access

[WHY]
replace dio encoder access to work with new dio encoder
assignment.

[HOW}
1. before validation, access dio encoder by get_temp_dio_link_enc()
2. after validation, access dio encoder through pipe_ctx->link_res

Reviewed-by: Wenjing Liu <[email protected]>
Reviewed-by: Meenakshikumar Somasundaram <[email protected]>
Signed-off-by: Peichen Huang <[email protected]>
Signed-off-by: Zaeem Mohamed <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Add clear DCC and Tiling callback for DCE

Introduce the DCC and Tiling reset callback to all DCE versions that can
call it.

Reviewed-by: Alvin Lee <[email protected]>
Signed-off-b

drm/amd/display: Add clear DCC and Tiling callback for DCE

Introduce the DCC and Tiling reset callback to all DCE versions that can
call it.

Reviewed-by: Alvin Lee <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Roman Li <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Exit idle optimizations before accessing PHY

[why & how]
By default, DCN HW is in idle optimized state which does not allow access
to PHY registers. If BIOS powers up the DCN, it is

drm/amd/display: Exit idle optimizations before accessing PHY

[why & how]
By default, DCN HW is in idle optimized state which does not allow access
to PHY registers. If BIOS powers up the DCN, it is fine because they will
power up everything. Only exit idle optimized state when not taking control
from VBIOS.

Fixes: be704e5ef4bd ("Revert "drm/amd/display: Exit idle optimizations before attempt to access PHY"")
Reviewed-by: Charlene Liu <[email protected]>
Signed-off-by: Ovidiu Bunea <[email protected]>
Signed-off-by: Roman Li <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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drm/amd/display: Support DCN36 DSC

Add case on clean_up_dsc_blocks() to support DCN36 as well.

Acked-by: Harry Wentland <[email protected]>
Reviewed-by: Martin Leung <[email protected]>
Sig

drm/amd/display: Support DCN36 DSC

Add case on clean_up_dsc_blocks() to support DCN36 as well.

Acked-by: Harry Wentland <[email protected]>
Reviewed-by: Martin Leung <[email protected]>
Signed-off-by: Taimur Hassan <[email protected]>
Signed-off-by: Wayne Lin <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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Revert "drm/amd/display: Exit idle optimizations before attempt to access PHY"

This reverts commit de612738e9771bd66aeb20044486c457c512f684.

Reason to revert: screen flashes or gray screen appeared

Revert "drm/amd/display: Exit idle optimizations before attempt to access PHY"

This reverts commit de612738e9771bd66aeb20044486c457c512f684.

Reason to revert: screen flashes or gray screen appeared half of the
screen after resume from S4/S5.

Reviewed-by: Charlene Liu <[email protected]>
Signed-off-by: Brandon Syu <[email protected]>
Signed-off-by: Alex Hung <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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