| e18a9830 | 16-Oct-2024 |
Amelie Delaunay <[email protected]> |
dt-bindings: dma: stm32-dma3: prevent additional transfers
Some devices require a single transfer. For example, reading FMC ECC status
registers does not support multiple transfers.
Add the possibil
dt-bindings: dma: stm32-dma3: prevent additional transfers
Some devices require a single transfer. For example, reading FMC ECC status
registers does not support multiple transfers.
Add the possibility to prevent additional transfers, by setting bit 17 of
the 'DMA transfer requirements' bit mask.
Signed-off-by: Amelie Delaunay <[email protected]>
Reviewed-by: Rob Herring (Arm) <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
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|
| a204f64d | 31-May-2024 |
Amelie Delaunay <[email protected]> |
dt-bindings: dma: Document STM32 DMA3 controller bindings
The STM32 DMA3 is a Direct Memory Access controller with different features
depending on its hardware configuration.
The channels have not t
dt-bindings: dma: Document STM32 DMA3 controller bindings
The STM32 DMA3 is a Direct Memory Access controller with different features
depending on its hardware configuration.
The channels have not the same capabilities, some have a larger FIFO, so
their performance is higher.
This patch describes STM32 DMA3 bindings, used to select a channel that
fits client requirements, and to pre-configure the channel depending on
the client needs.
Reviewed-by: Rob Herring (Arm) <[email protected]>
Signed-off-by: Amelie Delaunay <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
show more ...
|