1; RUN: opt -S %loadPolly -basic-aa -polly-pattern-matching-based-opts=false -polly-vectorizer=polly -polly-opt-isl -polly-print-ast -disable-output < %s | FileCheck %s 2; RUN: opt -S %loadPolly -basic-aa -polly-pattern-matching-based-opts=false -polly-vectorizer=stripmine -polly-opt-isl -polly-print-ast -disable-output < %s | FileCheck %s 3; RUN: opt -S %loadPolly -basic-aa -polly-pattern-matching-based-opts=false -polly-vectorizer=polly -polly-prevect-width=16 -polly-opt-isl -polly-print-ast -disable-output < %s | FileCheck %s -check-prefix=VEC16 4 5target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 6 7@C = common global [1536 x [1536 x float]] zeroinitializer, align 16 8@A = common global [1536 x [1536 x float]] zeroinitializer, align 16 9@B = common global [1536 x [1536 x float]] zeroinitializer, align 16 10 11; Function Attrs: nounwind uwtable 12define void @foo() #0 { 13entry: 14 br label %entry.split 15 16entry.split: ; preds = %entry 17 br label %for.cond1.preheader 18 19for.cond1.preheader: ; preds = %entry.split, %for.inc28 20 %indvar4 = phi i64 [ 0, %entry.split ], [ %indvar.next5, %for.inc28 ] 21 br label %for.body3 22 23for.body3: ; preds = %for.cond1.preheader, %for.inc25 24 %indvar6 = phi i64 [ 0, %for.cond1.preheader ], [ %indvar.next7, %for.inc25 ] 25 %arrayidx24 = getelementptr [1536 x [1536 x float]], [1536 x [1536 x float]]* @C, i64 0, i64 %indvar4, i64 %indvar6 26 store float 0.000000e+00, float* %arrayidx24, align 4 27 br label %for.body8 28 29for.body8: ; preds = %for.body3, %for.body8 30 %indvar = phi i64 [ 0, %for.body3 ], [ %indvar.next, %for.body8 ] 31 %arrayidx16 = getelementptr [1536 x [1536 x float]], [1536 x [1536 x float]]* @A, i64 0, i64 %indvar4, i64 %indvar 32 %arrayidx20 = getelementptr [1536 x [1536 x float]], [1536 x [1536 x float]]* @B, i64 0, i64 %indvar, i64 %indvar6 33 %0 = load float, float* %arrayidx24, align 4 34 %1 = load float, float* %arrayidx16, align 4 35 %2 = load float, float* %arrayidx20, align 4 36 %mul = fmul float %1, %2 37 %add = fadd float %0, %mul 38 store float %add, float* %arrayidx24, align 4 39 %indvar.next = add i64 %indvar, 1 40 %exitcond = icmp ne i64 %indvar.next, 1536 41 br i1 %exitcond, label %for.body8, label %for.inc25 42 43for.inc25: ; preds = %for.body8 44 %indvar.next7 = add i64 %indvar6, 1 45 %exitcond8 = icmp ne i64 %indvar.next7, 1536 46 br i1 %exitcond8, label %for.body3, label %for.inc28 47 48for.inc28: ; preds = %for.inc25 49 %indvar.next5 = add i64 %indvar4, 1 50 %exitcond9 = icmp ne i64 %indvar.next5, 1536 51 br i1 %exitcond9, label %for.cond1.preheader, label %for.end30 52 53for.end30: ; preds = %for.inc28 54 ret void 55} 56 57attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } 58 59; CHECK: #pragma known-parallel 60; CHECK: for (int c0 = 0; c0 <= 47; c0 += 1) 61; CHECK: for (int c1 = 0; c1 <= 47; c1 += 1) 62; CHECK: for (int c2 = 0; c2 <= 31; c2 += 1) 63; CHECK: for (int c3 = 0; c3 <= 7; c3 += 1) 64; CHECK: // SIMD 65; CHECK: for (int c4 = 0; c4 <= 3; c4 += 1) 66; CHECK: Stmt_for_body3(32 * c0 + c2, 32 * c1 + 4 * c3 + c4); 67; CHECK: #pragma known-parallel 68; CHECK: for (int c0 = 0; c0 <= 47; c0 += 1) 69; CHECK: for (int c1 = 0; c1 <= 47; c1 += 1) 70; CHECK: for (int c2 = 0; c2 <= 47; c2 += 1) 71; CHECK: for (int c3 = 0; c3 <= 31; c3 += 1) 72; CHECK: for (int c4 = 0; c4 <= 7; c4 += 1) 73; CHECK: for (int c5 = 0; c5 <= 31; c5 += 1) 74; CHECK: // SIMD 75; CHECK: for (int c6 = 0; c6 <= 3; c6 += 1) 76; CHECK: Stmt_for_body8(32 * c0 + c3, 32 * c1 + 4 * c4 + c6, 32 * c2 + c5); 77 78; VEC16: { 79; VEC16: #pragma known-parallel 80; VEC16: for (int c0 = 0; c0 <= 47; c0 += 1) 81; VEC16: for (int c1 = 0; c1 <= 47; c1 += 1) 82; VEC16: for (int c2 = 0; c2 <= 31; c2 += 1) 83; VEC16: for (int c3 = 0; c3 <= 1; c3 += 1) 84; VEC16: // SIMD 85; VEC16: for (int c4 = 0; c4 <= 15; c4 += 1) 86; VEC16: Stmt_for_body3(32 * c0 + c2, 32 * c1 + 16 * c3 + c4); 87; VEC16: #pragma known-parallel 88; VEC16: for (int c0 = 0; c0 <= 47; c0 += 1) 89; VEC16: for (int c1 = 0; c1 <= 47; c1 += 1) 90; VEC16: for (int c2 = 0; c2 <= 47; c2 += 1) 91; VEC16: for (int c3 = 0; c3 <= 31; c3 += 1) 92; VEC16: for (int c4 = 0; c4 <= 1; c4 += 1) 93; VEC16: for (int c5 = 0; c5 <= 31; c5 += 1) 94; VEC16: // SIMD 95; VEC16: for (int c6 = 0; c6 <= 15; c6 += 1) 96; VEC16: Stmt_for_body8(32 * c0 + c3, 32 * c1 + 16 * c4 + c6, 32 * c2 + c5); 97; VEC16: } 98 99 100!llvm.ident = !{!0} 101 102!0 = !{!"clang version 3.5.0 "} 103