1; RUN: opt %loadPolly -polly-codegen-ppcg -polly-target=gpu \ 2; RUN: -polly-gpu-arch=spir32 \ 3; RUN: -polly-acc-dump-kernel-ir -polly-process-unprofitable -disable-output -enable-new-pm=0 < %s | \ 4; RUN: FileCheck %s 5 6; REQUIRES: pollyacc 7 8; CHECK: target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-i128:128:128-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024" 9; CHECK-NEXT: target triple = "spir-unknown-unknown" 10 11; CHECK-LABEL: define spir_kernel void @FUNC_double_parallel_loop_SCOP_0_KERNEL_0(i8 addrspace(1)* %MemRef_A) #0 !kernel_arg_addr_space !0 !kernel_arg_name !1 !kernel_arg_access_qual !1 !kernel_arg_type !1 !kernel_arg_type_qual !1 !kernel_arg_base_type !1 { 12; CHECK-NEXT: entry: 13; CHECK-NEXT: %0 = call i32 @__gen_ocl_get_group_id0() 14; CHECK-NEXT: %__gen_ocl_get_group_id0 = zext i32 %0 to i64 15; CHECK-NEXT: %1 = call i32 @__gen_ocl_get_group_id1() 16; CHECK-NEXT: %__gen_ocl_get_group_id1 = zext i32 %1 to i64 17; CHECK-NEXT: %2 = call i32 @__gen_ocl_get_local_id0() 18; CHECK-NEXT: %__gen_ocl_get_local_id0 = zext i32 %2 to i64 19; CHECK-NEXT: %3 = call i32 @__gen_ocl_get_local_id1() 20; CHECK-NEXT: %__gen_ocl_get_local_id1 = zext i32 %3 to i64 21; CHECK-NEXT: br label %polly.loop_preheader 22 23; CHECK-LABEL: polly.loop_exit: ; preds = %polly.stmt.bb5 24; CHECK-NEXT: ret void 25 26; CHECK-LABEL: polly.loop_header: ; preds = %polly.stmt.bb5, %polly.loop_preheader 27; CHECK-NEXT: %polly.indvar = phi i64 [ 0, %polly.loop_preheader ], [ %polly.indvar_next, %polly.stmt.bb5 ] 28; CHECK-NEXT: %4 = mul nsw i64 32, %__gen_ocl_get_group_id0 29; CHECK-NEXT: %5 = add nsw i64 %4, %__gen_ocl_get_local_id0 30; CHECK-NEXT: %6 = mul nsw i64 32, %__gen_ocl_get_group_id1 31; CHECK-NEXT: %7 = add nsw i64 %6, %__gen_ocl_get_local_id1 32; CHECK-NEXT: %8 = mul nsw i64 16, %polly.indvar 33; CHECK-NEXT: %9 = add nsw i64 %7, %8 34; CHECK-NEXT: br label %polly.stmt.bb5 35 36; CHECK-LABEL: polly.stmt.bb5: ; preds = %polly.loop_header 37; CHECK-NEXT: %10 = mul i64 %5, %9 38; CHECK-NEXT: %p_tmp6 = sitofp i64 %10 to float 39; CHECK-NEXT: %polly.access.cast.MemRef_A = bitcast i8 addrspace(1)* %MemRef_A to float addrspace(1)* 40; CHECK-NEXT: %11 = mul nsw i64 32, %__gen_ocl_get_group_id0 41; CHECK-NEXT: %12 = add nsw i64 %11, %__gen_ocl_get_local_id0 42; CHECK-NEXT: %polly.access.mul.MemRef_A = mul nsw i64 %12, 1024 43; CHECK-NEXT: %13 = mul nsw i64 32, %__gen_ocl_get_group_id1 44; CHECK-NEXT: %14 = add nsw i64 %13, %__gen_ocl_get_local_id1 45; CHECK-NEXT: %15 = mul nsw i64 16, %polly.indvar 46; CHECK-NEXT: %16 = add nsw i64 %14, %15 47; CHECK-NEXT: %polly.access.add.MemRef_A = add nsw i64 %polly.access.mul.MemRef_A, %16 48; CHECK-NEXT: %polly.access.MemRef_A = getelementptr float, float addrspace(1)* %polly.access.cast.MemRef_A, i64 %polly.access.add.MemRef_A 49; CHECK-NEXT: %tmp8_p_scalar_ = load float, float addrspace(1)* %polly.access.MemRef_A, align 4 50; CHECK-NEXT: %p_tmp9 = fadd float %tmp8_p_scalar_, %p_tmp6 51; CHECK-NEXT: %polly.access.cast.MemRef_A1 = bitcast i8 addrspace(1)* %MemRef_A to float addrspace(1)* 52; CHECK-NEXT: %17 = mul nsw i64 32, %__gen_ocl_get_group_id0 53; CHECK-NEXT: %18 = add nsw i64 %17, %__gen_ocl_get_local_id0 54; CHECK-NEXT: %polly.access.mul.MemRef_A2 = mul nsw i64 %18, 1024 55; CHECK-NEXT: %19 = mul nsw i64 32, %__gen_ocl_get_group_id1 56; CHECK-NEXT: %20 = add nsw i64 %19, %__gen_ocl_get_local_id1 57; CHECK-NEXT: %21 = mul nsw i64 16, %polly.indvar 58; CHECK-NEXT: %22 = add nsw i64 %20, %21 59; CHECK-NEXT: %polly.access.add.MemRef_A3 = add nsw i64 %polly.access.mul.MemRef_A2, %22 60; CHECK-NEXT: %polly.access.MemRef_A4 = getelementptr float, float addrspace(1)* %polly.access.cast.MemRef_A1, i64 %polly.access.add.MemRef_A3 61; CHECK-NEXT: store float %p_tmp9, float addrspace(1)* %polly.access.MemRef_A4, align 4 62; CHECK-NEXT: %polly.indvar_next = add nsw i64 %polly.indvar, 1 63; CHECK-NEXT: %polly.loop_cond = icmp sle i64 %polly.indvar_next, 1 64; CHECK-NEXT: br i1 %polly.loop_cond, label %polly.loop_header, label %polly.loop_exit 65 66; CHECK-LABEL: polly.loop_preheader: ; preds = %entry 67; CHECK-NEXT: br label %polly.loop_header 68 69; CHECK: attributes #0 = { "polly.skip.fn" } 70 71; void double_parallel_loop(float A[][1024]) { 72; for (long i = 0; i < 1024; i++) 73; for (long j = 0; j < 1024; j++) 74; A[i][j] += i * j; 75; } 76; 77target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 78 79define void @double_parallel_loop([1024 x float]* %A) { 80bb: 81 br label %bb2 82 83bb2: ; preds = %bb13, %bb 84 %i.0 = phi i64 [ 0, %bb ], [ %tmp14, %bb13 ] 85 %exitcond1 = icmp ne i64 %i.0, 1024 86 br i1 %exitcond1, label %bb3, label %bb15 87 88bb3: ; preds = %bb2 89 br label %bb4 90 91bb4: ; preds = %bb10, %bb3 92 %j.0 = phi i64 [ 0, %bb3 ], [ %tmp11, %bb10 ] 93 %exitcond = icmp ne i64 %j.0, 1024 94 br i1 %exitcond, label %bb5, label %bb12 95 96bb5: ; preds = %bb4 97 %tmp = mul nuw nsw i64 %i.0, %j.0 98 %tmp6 = sitofp i64 %tmp to float 99 %tmp7 = getelementptr inbounds [1024 x float], [1024 x float]* %A, i64 %i.0, i64 %j.0 100 %tmp8 = load float, float* %tmp7, align 4 101 %tmp9 = fadd float %tmp8, %tmp6 102 store float %tmp9, float* %tmp7, align 4 103 br label %bb10 104 105bb10: ; preds = %bb5 106 %tmp11 = add nuw nsw i64 %j.0, 1 107 br label %bb4 108 109bb12: ; preds = %bb4 110 br label %bb13 111 112bb13: ; preds = %bb12 113 %tmp14 = add nuw nsw i64 %i.0, 1 114 br label %bb2 115 116bb15: ; preds = %bb2 117 ret void 118} 119