15c0c51a9SNicolas Vasilache //===- VectorToLLVM.cpp - Conversion from Vector to the LLVM dialect ------===//
25c0c51a9SNicolas Vasilache //
35c0c51a9SNicolas Vasilache // Copyright 2019 The MLIR Authors.
45c0c51a9SNicolas Vasilache //
55c0c51a9SNicolas Vasilache // Licensed under the Apache License, Version 2.0 (the "License");
65c0c51a9SNicolas Vasilache // you may not use this file except in compliance with the License.
75c0c51a9SNicolas Vasilache // You may obtain a copy of the License at
85c0c51a9SNicolas Vasilache //
95c0c51a9SNicolas Vasilache //   http://www.apache.org/licenses/LICENSE-2.0
105c0c51a9SNicolas Vasilache //
115c0c51a9SNicolas Vasilache // Unless required by applicable law or agreed to in writing, software
125c0c51a9SNicolas Vasilache // distributed under the License is distributed on an "AS IS" BASIS,
135c0c51a9SNicolas Vasilache // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
145c0c51a9SNicolas Vasilache // See the License for the specific language governing permissions and
155c0c51a9SNicolas Vasilache // limitations under the License.
165c0c51a9SNicolas Vasilache // =============================================================================
175c0c51a9SNicolas Vasilache 
185c0c51a9SNicolas Vasilache #include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
195c0c51a9SNicolas Vasilache #include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
205c0c51a9SNicolas Vasilache #include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
215c0c51a9SNicolas Vasilache #include "mlir/Dialect/LLVMIR/LLVMDialect.h"
225c0c51a9SNicolas Vasilache #include "mlir/Dialect/VectorOps/VectorOps.h"
235c0c51a9SNicolas Vasilache #include "mlir/IR/Attributes.h"
245c0c51a9SNicolas Vasilache #include "mlir/IR/Builders.h"
255c0c51a9SNicolas Vasilache #include "mlir/IR/MLIRContext.h"
265c0c51a9SNicolas Vasilache #include "mlir/IR/Module.h"
275c0c51a9SNicolas Vasilache #include "mlir/IR/Operation.h"
285c0c51a9SNicolas Vasilache #include "mlir/IR/PatternMatch.h"
295c0c51a9SNicolas Vasilache #include "mlir/IR/StandardTypes.h"
305c0c51a9SNicolas Vasilache #include "mlir/IR/Types.h"
315c0c51a9SNicolas Vasilache #include "mlir/Pass/Pass.h"
325c0c51a9SNicolas Vasilache #include "mlir/Pass/PassManager.h"
335c0c51a9SNicolas Vasilache #include "mlir/Transforms/DialectConversion.h"
345c0c51a9SNicolas Vasilache #include "mlir/Transforms/Passes.h"
355c0c51a9SNicolas Vasilache 
365c0c51a9SNicolas Vasilache #include "llvm/IR/DerivedTypes.h"
375c0c51a9SNicolas Vasilache #include "llvm/IR/Module.h"
385c0c51a9SNicolas Vasilache #include "llvm/IR/Type.h"
395c0c51a9SNicolas Vasilache #include "llvm/Support/Allocator.h"
405c0c51a9SNicolas Vasilache #include "llvm/Support/ErrorHandling.h"
415c0c51a9SNicolas Vasilache 
425c0c51a9SNicolas Vasilache using namespace mlir;
435c0c51a9SNicolas Vasilache 
445c0c51a9SNicolas Vasilache template <typename T>
455c0c51a9SNicolas Vasilache static LLVM::LLVMType getPtrToElementType(T containerType,
465c0c51a9SNicolas Vasilache                                           LLVMTypeConverter &lowering) {
475c0c51a9SNicolas Vasilache   return lowering.convertType(containerType.getElementType())
485c0c51a9SNicolas Vasilache       .template cast<LLVM::LLVMType>()
495c0c51a9SNicolas Vasilache       .getPointerTo();
505c0c51a9SNicolas Vasilache }
515c0c51a9SNicolas Vasilache 
52*9826fe5cSAart Bik // Helper to reduce vector type by one rank at front.
53*9826fe5cSAart Bik static VectorType reducedVectorTypeFront(VectorType tp) {
54*9826fe5cSAart Bik   assert((tp.getRank() > 1) && "unlowerable vector type");
55*9826fe5cSAart Bik   return VectorType::get(tp.getShape().drop_front(), tp.getElementType());
56*9826fe5cSAart Bik }
57*9826fe5cSAart Bik 
58*9826fe5cSAart Bik // Helper to reduce vector type by *all* but one rank at back.
59*9826fe5cSAart Bik static VectorType reducedVectorTypeBack(VectorType tp) {
60*9826fe5cSAart Bik   assert((tp.getRank() > 1) && "unlowerable vector type");
61*9826fe5cSAart Bik   return VectorType::get(tp.getShape().take_back(), tp.getElementType());
62*9826fe5cSAart Bik }
63*9826fe5cSAart Bik 
64b36aaeafSAart Bik class VectorBroadcastOpConversion : public LLVMOpLowering {
65b36aaeafSAart Bik public:
66b36aaeafSAart Bik   explicit VectorBroadcastOpConversion(MLIRContext *context,
67b36aaeafSAart Bik                                        LLVMTypeConverter &typeConverter)
68b36aaeafSAart Bik       : LLVMOpLowering(vector::BroadcastOp::getOperationName(), context,
69b36aaeafSAart Bik                        typeConverter) {}
70b36aaeafSAart Bik 
71b36aaeafSAart Bik   PatternMatchResult
72b36aaeafSAart Bik   matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
73b36aaeafSAart Bik                   ConversionPatternRewriter &rewriter) const override {
74b36aaeafSAart Bik     auto broadcastOp = cast<vector::BroadcastOp>(op);
75b36aaeafSAart Bik     VectorType dstVectorType = broadcastOp.getVectorType();
76b36aaeafSAart Bik     if (lowering.convertType(dstVectorType) == nullptr)
77b36aaeafSAart Bik       return matchFailure();
78b36aaeafSAart Bik     // Rewrite when the full vector type can be lowered (which
79b36aaeafSAart Bik     // implies all 'reduced' types can be lowered too).
80b36aaeafSAart Bik     VectorType srcVectorType =
81b36aaeafSAart Bik         broadcastOp.getSourceType().dyn_cast<VectorType>();
82b36aaeafSAart Bik     rewriter.replaceOp(
83b36aaeafSAart Bik         op, expandRanks(operands[0],  // source value to be expanded
84b36aaeafSAart Bik                         op->getLoc(), // location of original broadcast
85b36aaeafSAart Bik                         srcVectorType, dstVectorType, rewriter));
86b36aaeafSAart Bik     return matchSuccess();
87b36aaeafSAart Bik   }
88b36aaeafSAart Bik 
89b36aaeafSAart Bik private:
90b36aaeafSAart Bik   // Expands the given source value over all the ranks, as defined
91b36aaeafSAart Bik   // by the source and destination type (a null source type denotes
92b36aaeafSAart Bik   // expansion from a scalar value into a vector).
93b36aaeafSAart Bik   //
94b36aaeafSAart Bik   // TODO(ajcbik): consider replacing this one-pattern lowering
95b36aaeafSAart Bik   //               with a two-pattern lowering using other vector
96b36aaeafSAart Bik   //               ops once all insert/extract/shuffle operations
97b36aaeafSAart Bik   //               are available with lowering implemention.
98b36aaeafSAart Bik   //
99b36aaeafSAart Bik   Value *expandRanks(Value *value, Location loc, VectorType srcVectorType,
100b36aaeafSAart Bik                      VectorType dstVectorType,
101b36aaeafSAart Bik                      ConversionPatternRewriter &rewriter) const {
102b36aaeafSAart Bik     assert((dstVectorType != nullptr) && "invalid result type in broadcast");
103b36aaeafSAart Bik     // Determine rank of source and destination.
104b36aaeafSAart Bik     int64_t srcRank = srcVectorType ? srcVectorType.getRank() : 0;
105b36aaeafSAart Bik     int64_t dstRank = dstVectorType.getRank();
106b36aaeafSAart Bik     int64_t curDim = dstVectorType.getDimSize(0);
107b36aaeafSAart Bik     if (srcRank < dstRank)
108b36aaeafSAart Bik       // Duplicate this rank.
109b36aaeafSAart Bik       return duplicateOneRank(value, loc, srcVectorType, dstVectorType, dstRank,
110b36aaeafSAart Bik                               curDim, rewriter);
111b36aaeafSAart Bik     // If all trailing dimensions are the same, the broadcast consists of
112b36aaeafSAart Bik     // simply passing through the source value and we are done. Otherwise,
113b36aaeafSAart Bik     // any non-matching dimension forces a stretch along this rank.
114b36aaeafSAart Bik     assert((srcVectorType != nullptr) && (srcRank > 0) &&
115b36aaeafSAart Bik            (srcRank == dstRank) && "invalid rank in broadcast");
116b36aaeafSAart Bik     for (int64_t r = 0; r < dstRank; r++) {
117b36aaeafSAart Bik       if (srcVectorType.getDimSize(r) != dstVectorType.getDimSize(r)) {
118b36aaeafSAart Bik         return stretchOneRank(value, loc, srcVectorType, dstVectorType, dstRank,
119b36aaeafSAart Bik                               curDim, rewriter);
120b36aaeafSAart Bik       }
121b36aaeafSAart Bik     }
122b36aaeafSAart Bik     return value;
123b36aaeafSAart Bik   }
124b36aaeafSAart Bik 
125b36aaeafSAart Bik   // Picks the best way to duplicate a single rank. For the 1-D case, a
126b36aaeafSAart Bik   // single insert-elt/shuffle is the most efficient expansion. For higher
127b36aaeafSAart Bik   // dimensions, however, we need dim x insert-values on a new broadcast
128b36aaeafSAart Bik   // with one less leading dimension, which will be lowered "recursively"
129b36aaeafSAart Bik   // to matching LLVM IR.
130b36aaeafSAart Bik   // For example:
131b36aaeafSAart Bik   //   v = broadcast s : f32 to vector<4x2xf32>
132b36aaeafSAart Bik   // becomes:
133b36aaeafSAart Bik   //   x = broadcast s : f32 to vector<2xf32>
134b36aaeafSAart Bik   //   v = [x,x,x,x]
135b36aaeafSAart Bik   // becomes:
136b36aaeafSAart Bik   //   x = [s,s]
137b36aaeafSAart Bik   //   v = [x,x,x,x]
138b36aaeafSAart Bik   Value *duplicateOneRank(Value *value, Location loc, VectorType srcVectorType,
139b36aaeafSAart Bik                           VectorType dstVectorType, int64_t rank, int64_t dim,
140b36aaeafSAart Bik                           ConversionPatternRewriter &rewriter) const {
141b36aaeafSAart Bik     Type llvmType = lowering.convertType(dstVectorType);
142b36aaeafSAart Bik     assert((llvmType != nullptr) && "unlowerable vector type");
143b36aaeafSAart Bik     if (rank == 1) {
144b36aaeafSAart Bik       Value *undef = rewriter.create<LLVM::UndefOp>(loc, llvmType);
145b36aaeafSAart Bik       Value *expand = insertOne(undef, value, loc, llvmType, rank, 0, rewriter);
146b36aaeafSAart Bik       SmallVector<int32_t, 4> zeroValues(dim, 0);
147b36aaeafSAart Bik       return rewriter.create<LLVM::ShuffleVectorOp>(
148b36aaeafSAart Bik           loc, expand, undef, rewriter.getI32ArrayAttr(zeroValues));
149b36aaeafSAart Bik     }
150*9826fe5cSAart Bik     Value *expand =
151*9826fe5cSAart Bik         expandRanks(value, loc, srcVectorType,
152*9826fe5cSAart Bik                     reducedVectorTypeFront(dstVectorType), rewriter);
153b36aaeafSAart Bik     Value *result = rewriter.create<LLVM::UndefOp>(loc, llvmType);
154b36aaeafSAart Bik     for (int64_t d = 0; d < dim; ++d) {
155b36aaeafSAart Bik       result = insertOne(result, expand, loc, llvmType, rank, d, rewriter);
156b36aaeafSAart Bik     }
157b36aaeafSAart Bik     return result;
158b36aaeafSAart Bik   }
159b36aaeafSAart Bik 
160b36aaeafSAart Bik   // Picks the best way to stretch a single rank. For the 1-D case, a
161b36aaeafSAart Bik   // single insert-elt/shuffle is the most efficient expansion when at
162b36aaeafSAart Bik   // a stretch. Otherwise, every dimension needs to be expanded
163b36aaeafSAart Bik   // individually and individually inserted in the resulting vector.
164b36aaeafSAart Bik   // For example:
165b36aaeafSAart Bik   //   v = broadcast w : vector<4x1x2xf32> to vector<4x2x2xf32>
166b36aaeafSAart Bik   // becomes:
167b36aaeafSAart Bik   //   a = broadcast w[0] : vector<1x2xf32> to vector<2x2xf32>
168b36aaeafSAart Bik   //   b = broadcast w[1] : vector<1x2xf32> to vector<2x2xf32>
169b36aaeafSAart Bik   //   c = broadcast w[2] : vector<1x2xf32> to vector<2x2xf32>
170b36aaeafSAart Bik   //   d = broadcast w[3] : vector<1x2xf32> to vector<2x2xf32>
171b36aaeafSAart Bik   //   v = [a,b,c,d]
172b36aaeafSAart Bik   // becomes:
173b36aaeafSAart Bik   //   x = broadcast w[0][0] : vector<2xf32> to vector <2x2xf32>
174b36aaeafSAart Bik   //   y = broadcast w[1][0] : vector<2xf32> to vector <2x2xf32>
175b36aaeafSAart Bik   //   a = [x, y]
176b36aaeafSAart Bik   //   etc.
177b36aaeafSAart Bik   Value *stretchOneRank(Value *value, Location loc, VectorType srcVectorType,
178b36aaeafSAart Bik                         VectorType dstVectorType, int64_t rank, int64_t dim,
179b36aaeafSAart Bik                         ConversionPatternRewriter &rewriter) const {
180b36aaeafSAart Bik     Type llvmType = lowering.convertType(dstVectorType);
181b36aaeafSAart Bik     assert((llvmType != nullptr) && "unlowerable vector type");
182b36aaeafSAart Bik     Value *result = rewriter.create<LLVM::UndefOp>(loc, llvmType);
183b36aaeafSAart Bik     bool atStretch = dim != srcVectorType.getDimSize(0);
184b36aaeafSAart Bik     if (rank == 1) {
185b36aaeafSAart Bik       Type redLlvmType = lowering.convertType(dstVectorType.getElementType());
186b36aaeafSAart Bik       if (atStretch) {
187b36aaeafSAart Bik         Value *one = extractOne(value, loc, redLlvmType, rank, 0, rewriter);
188b36aaeafSAart Bik         Value *expand =
189b36aaeafSAart Bik             insertOne(result, one, loc, llvmType, rank, 0, rewriter);
190b36aaeafSAart Bik         SmallVector<int32_t, 4> zeroValues(dim, 0);
191b36aaeafSAart Bik         return rewriter.create<LLVM::ShuffleVectorOp>(
192b36aaeafSAart Bik             loc, expand, result, rewriter.getI32ArrayAttr(zeroValues));
193b36aaeafSAart Bik       }
194b36aaeafSAart Bik       for (int64_t d = 0; d < dim; ++d) {
195b36aaeafSAart Bik         Value *one = extractOne(value, loc, redLlvmType, rank, d, rewriter);
196b36aaeafSAart Bik         result = insertOne(result, one, loc, llvmType, rank, d, rewriter);
197b36aaeafSAart Bik       }
198b36aaeafSAart Bik     } else {
199*9826fe5cSAart Bik       VectorType redSrcType = reducedVectorTypeFront(srcVectorType);
200*9826fe5cSAart Bik       VectorType redDstType = reducedVectorTypeFront(dstVectorType);
201b36aaeafSAart Bik       Type redLlvmType = lowering.convertType(redSrcType);
202b36aaeafSAart Bik       for (int64_t d = 0; d < dim; ++d) {
203b36aaeafSAart Bik         int64_t pos = atStretch ? 0 : d;
204b36aaeafSAart Bik         Value *one = extractOne(value, loc, redLlvmType, rank, pos, rewriter);
205b36aaeafSAart Bik         Value *expand = expandRanks(one, loc, redSrcType, redDstType, rewriter);
206b36aaeafSAart Bik         result = insertOne(result, expand, loc, llvmType, rank, d, rewriter);
207b36aaeafSAart Bik       }
208b36aaeafSAart Bik     }
209b36aaeafSAart Bik     return result;
210b36aaeafSAart Bik   }
211b36aaeafSAart Bik 
212b36aaeafSAart Bik   // Picks the proper sequence for inserting.
213b36aaeafSAart Bik   Value *insertOne(Value *val1, Value *val2, Location loc, Type llvmType,
214b36aaeafSAart Bik                    int64_t rank, int64_t pos,
215b36aaeafSAart Bik                    ConversionPatternRewriter &rewriter) const {
216b36aaeafSAart Bik     if (rank == 1) {
217b36aaeafSAart Bik       auto idxType = rewriter.getIndexType();
218b36aaeafSAart Bik       auto constant = rewriter.create<LLVM::ConstantOp>(
219b36aaeafSAart Bik           loc, lowering.convertType(idxType),
220b36aaeafSAart Bik           rewriter.getIntegerAttr(idxType, pos));
221b36aaeafSAart Bik       return rewriter.create<LLVM::InsertElementOp>(loc, llvmType, val1, val2,
222b36aaeafSAart Bik                                                     constant);
223b36aaeafSAart Bik     }
224b36aaeafSAart Bik     return rewriter.create<LLVM::InsertValueOp>(loc, llvmType, val1, val2,
225b36aaeafSAart Bik                                                 rewriter.getI64ArrayAttr(pos));
226b36aaeafSAart Bik   }
227b36aaeafSAart Bik 
228b36aaeafSAart Bik   // Picks the proper sequence for extracting.
229b36aaeafSAart Bik   Value *extractOne(Value *value, Location loc, Type llvmType, int64_t rank,
230b36aaeafSAart Bik                     int64_t pos, ConversionPatternRewriter &rewriter) const {
231b36aaeafSAart Bik     if (rank == 1) {
232b36aaeafSAart Bik       auto idxType = rewriter.getIndexType();
233b36aaeafSAart Bik       auto constant = rewriter.create<LLVM::ConstantOp>(
234b36aaeafSAart Bik           loc, lowering.convertType(idxType),
235b36aaeafSAart Bik           rewriter.getIntegerAttr(idxType, pos));
236b36aaeafSAart Bik       return rewriter.create<LLVM::ExtractElementOp>(loc, llvmType, value,
237b36aaeafSAart Bik                                                      constant);
238b36aaeafSAart Bik     }
239b36aaeafSAart Bik     return rewriter.create<LLVM::ExtractValueOp>(loc, llvmType, value,
240b36aaeafSAart Bik                                                  rewriter.getI64ArrayAttr(pos));
241b36aaeafSAart Bik   }
242b36aaeafSAart Bik };
243b36aaeafSAart Bik 
244*9826fe5cSAart Bik class VectorExtractOpConversion : public LLVMOpLowering {
2455c0c51a9SNicolas Vasilache public:
246*9826fe5cSAart Bik   explicit VectorExtractOpConversion(MLIRContext *context,
2475c0c51a9SNicolas Vasilache                                      LLVMTypeConverter &typeConverter)
248d37f2725SAart Bik       : LLVMOpLowering(vector::ExtractOp::getOperationName(), context,
2495c0c51a9SNicolas Vasilache                        typeConverter) {}
2505c0c51a9SNicolas Vasilache 
2515c0c51a9SNicolas Vasilache   PatternMatchResult
2525c0c51a9SNicolas Vasilache   matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
2535c0c51a9SNicolas Vasilache                   ConversionPatternRewriter &rewriter) const override {
2545c0c51a9SNicolas Vasilache     auto loc = op->getLoc();
255d37f2725SAart Bik     auto adaptor = vector::ExtractOpOperandAdaptor(operands);
256d37f2725SAart Bik     auto extractOp = cast<vector::ExtractOp>(op);
257*9826fe5cSAart Bik     auto vectorType = extractOp.getVectorType();
2585c0c51a9SNicolas Vasilache     auto resultType = extractOp.getResult()->getType();
2595c0c51a9SNicolas Vasilache     auto llvmResultType = lowering.convertType(resultType);
2605c0c51a9SNicolas Vasilache     auto positionArrayAttr = extractOp.position();
261*9826fe5cSAart Bik 
262*9826fe5cSAart Bik     // Bail if result type cannot be lowered.
263*9826fe5cSAart Bik     if (!llvmResultType)
264*9826fe5cSAart Bik       return matchFailure();
265*9826fe5cSAart Bik 
2665c0c51a9SNicolas Vasilache     // One-shot extraction of vector from array (only requires extractvalue).
2675c0c51a9SNicolas Vasilache     if (resultType.isa<VectorType>()) {
2685c0c51a9SNicolas Vasilache       Value *extracted = rewriter.create<LLVM::ExtractValueOp>(
2695c0c51a9SNicolas Vasilache           loc, llvmResultType, adaptor.vector(), positionArrayAttr);
2705c0c51a9SNicolas Vasilache       rewriter.replaceOp(op, extracted);
2715c0c51a9SNicolas Vasilache       return matchSuccess();
2725c0c51a9SNicolas Vasilache     }
2735c0c51a9SNicolas Vasilache 
274*9826fe5cSAart Bik     // Potential extraction of 1-D vector from array.
2755c0c51a9SNicolas Vasilache     auto *context = op->getContext();
2765c0c51a9SNicolas Vasilache     Value *extracted = adaptor.vector();
2775c0c51a9SNicolas Vasilache     auto positionAttrs = positionArrayAttr.getValue();
2785c0c51a9SNicolas Vasilache     if (positionAttrs.size() > 1) {
279*9826fe5cSAart Bik       auto oneDVectorType = reducedVectorTypeBack(vectorType);
2805c0c51a9SNicolas Vasilache       auto nMinusOnePositionAttrs =
2815c0c51a9SNicolas Vasilache           ArrayAttr::get(positionAttrs.drop_back(), context);
2825c0c51a9SNicolas Vasilache       extracted = rewriter.create<LLVM::ExtractValueOp>(
2835c0c51a9SNicolas Vasilache           loc, lowering.convertType(oneDVectorType), extracted,
2845c0c51a9SNicolas Vasilache           nMinusOnePositionAttrs);
2855c0c51a9SNicolas Vasilache     }
2865c0c51a9SNicolas Vasilache 
2875c0c51a9SNicolas Vasilache     // Remaining extraction of element from 1-D LLVM vector
2885c0c51a9SNicolas Vasilache     auto position = positionAttrs.back().cast<IntegerAttr>();
289*9826fe5cSAart Bik     auto i32Type = LLVM::LLVMType::getInt32Ty(lowering.getDialect());
290*9826fe5cSAart Bik     auto constant = rewriter.create<LLVM::ConstantOp>(loc, i32Type, position);
2915c0c51a9SNicolas Vasilache     extracted =
2925c0c51a9SNicolas Vasilache         rewriter.create<LLVM::ExtractElementOp>(loc, extracted, constant);
2935c0c51a9SNicolas Vasilache     rewriter.replaceOp(op, extracted);
2945c0c51a9SNicolas Vasilache 
2955c0c51a9SNicolas Vasilache     return matchSuccess();
2965c0c51a9SNicolas Vasilache   }
2975c0c51a9SNicolas Vasilache };
2985c0c51a9SNicolas Vasilache 
299*9826fe5cSAart Bik class VectorInsertOpConversion : public LLVMOpLowering {
300*9826fe5cSAart Bik public:
301*9826fe5cSAart Bik   explicit VectorInsertOpConversion(MLIRContext *context,
302*9826fe5cSAart Bik                                     LLVMTypeConverter &typeConverter)
303*9826fe5cSAart Bik       : LLVMOpLowering(vector::InsertOp::getOperationName(), context,
304*9826fe5cSAart Bik                        typeConverter) {}
305*9826fe5cSAart Bik 
306*9826fe5cSAart Bik   PatternMatchResult
307*9826fe5cSAart Bik   matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
308*9826fe5cSAart Bik                   ConversionPatternRewriter &rewriter) const override {
309*9826fe5cSAart Bik     auto loc = op->getLoc();
310*9826fe5cSAart Bik     auto adaptor = vector::InsertOpOperandAdaptor(operands);
311*9826fe5cSAart Bik     auto insertOp = cast<vector::InsertOp>(op);
312*9826fe5cSAart Bik     auto sourceType = insertOp.getSourceType();
313*9826fe5cSAart Bik     auto destVectorType = insertOp.getDestVectorType();
314*9826fe5cSAart Bik     auto llvmResultType = lowering.convertType(destVectorType);
315*9826fe5cSAart Bik     auto positionArrayAttr = insertOp.position();
316*9826fe5cSAart Bik 
317*9826fe5cSAart Bik     // Bail if result type cannot be lowered.
318*9826fe5cSAart Bik     if (!llvmResultType)
319*9826fe5cSAart Bik       return matchFailure();
320*9826fe5cSAart Bik 
321*9826fe5cSAart Bik     // One-shot insertion of a vector into an array (only requires insertvalue).
322*9826fe5cSAart Bik     if (sourceType.isa<VectorType>()) {
323*9826fe5cSAart Bik       Value *inserted = rewriter.create<LLVM::InsertValueOp>(
324*9826fe5cSAart Bik           loc, llvmResultType, adaptor.dest(), adaptor.source(),
325*9826fe5cSAart Bik           positionArrayAttr);
326*9826fe5cSAart Bik       rewriter.replaceOp(op, inserted);
327*9826fe5cSAart Bik       return matchSuccess();
328*9826fe5cSAart Bik     }
329*9826fe5cSAart Bik 
330*9826fe5cSAart Bik     // Potential extraction of 1-D vector from array.
331*9826fe5cSAart Bik     auto *context = op->getContext();
332*9826fe5cSAart Bik     Value *extracted = adaptor.dest();
333*9826fe5cSAart Bik     auto positionAttrs = positionArrayAttr.getValue();
334*9826fe5cSAart Bik     auto position = positionAttrs.back().cast<IntegerAttr>();
335*9826fe5cSAart Bik     auto oneDVectorType = destVectorType;
336*9826fe5cSAart Bik     if (positionAttrs.size() > 1) {
337*9826fe5cSAart Bik       oneDVectorType = reducedVectorTypeBack(destVectorType);
338*9826fe5cSAart Bik       auto nMinusOnePositionAttrs =
339*9826fe5cSAart Bik           ArrayAttr::get(positionAttrs.drop_back(), context);
340*9826fe5cSAart Bik       extracted = rewriter.create<LLVM::ExtractValueOp>(
341*9826fe5cSAart Bik           loc, lowering.convertType(oneDVectorType), extracted,
342*9826fe5cSAart Bik           nMinusOnePositionAttrs);
343*9826fe5cSAart Bik     }
344*9826fe5cSAart Bik 
345*9826fe5cSAart Bik     // Insertion of an element into a 1-D LLVM vector.
346*9826fe5cSAart Bik     auto i32Type = LLVM::LLVMType::getInt32Ty(lowering.getDialect());
347*9826fe5cSAart Bik     auto constant = rewriter.create<LLVM::ConstantOp>(loc, i32Type, position);
348*9826fe5cSAart Bik     Value *inserted = rewriter.create<LLVM::InsertElementOp>(
349*9826fe5cSAart Bik         loc, lowering.convertType(oneDVectorType), extracted, adaptor.source(),
350*9826fe5cSAart Bik         constant);
351*9826fe5cSAart Bik 
352*9826fe5cSAart Bik     // Potential insertion of resulting 1-D vector into array.
353*9826fe5cSAart Bik     if (positionAttrs.size() > 1) {
354*9826fe5cSAart Bik       auto nMinusOnePositionAttrs =
355*9826fe5cSAart Bik           ArrayAttr::get(positionAttrs.drop_back(), context);
356*9826fe5cSAart Bik       inserted = rewriter.create<LLVM::InsertValueOp>(loc, llvmResultType,
357*9826fe5cSAart Bik                                                       adaptor.dest(), inserted,
358*9826fe5cSAart Bik                                                       nMinusOnePositionAttrs);
359*9826fe5cSAart Bik     }
360*9826fe5cSAart Bik 
361*9826fe5cSAart Bik     rewriter.replaceOp(op, inserted);
362*9826fe5cSAart Bik     return matchSuccess();
363*9826fe5cSAart Bik   }
364*9826fe5cSAart Bik };
365*9826fe5cSAart Bik 
3665c0c51a9SNicolas Vasilache class VectorOuterProductOpConversion : public LLVMOpLowering {
3675c0c51a9SNicolas Vasilache public:
3685c0c51a9SNicolas Vasilache   explicit VectorOuterProductOpConversion(MLIRContext *context,
3695c0c51a9SNicolas Vasilache                                           LLVMTypeConverter &typeConverter)
3705c0c51a9SNicolas Vasilache       : LLVMOpLowering(vector::OuterProductOp::getOperationName(), context,
3715c0c51a9SNicolas Vasilache                        typeConverter) {}
3725c0c51a9SNicolas Vasilache 
3735c0c51a9SNicolas Vasilache   PatternMatchResult
3745c0c51a9SNicolas Vasilache   matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
3755c0c51a9SNicolas Vasilache                   ConversionPatternRewriter &rewriter) const override {
3765c0c51a9SNicolas Vasilache     auto loc = op->getLoc();
3775c0c51a9SNicolas Vasilache     auto adaptor = vector::OuterProductOpOperandAdaptor(operands);
3785c0c51a9SNicolas Vasilache     auto *ctx = op->getContext();
3795c0c51a9SNicolas Vasilache     auto vLHS = adaptor.lhs()->getType().cast<LLVM::LLVMType>();
3805c0c51a9SNicolas Vasilache     auto vRHS = adaptor.rhs()->getType().cast<LLVM::LLVMType>();
3815c0c51a9SNicolas Vasilache     auto rankLHS = vLHS.getUnderlyingType()->getVectorNumElements();
3825c0c51a9SNicolas Vasilache     auto rankRHS = vRHS.getUnderlyingType()->getVectorNumElements();
3835c0c51a9SNicolas Vasilache     auto llvmArrayOfVectType = lowering.convertType(
3845c0c51a9SNicolas Vasilache         cast<vector::OuterProductOp>(op).getResult()->getType());
3855c0c51a9SNicolas Vasilache     Value *desc = rewriter.create<LLVM::UndefOp>(loc, llvmArrayOfVectType);
3865c0c51a9SNicolas Vasilache     Value *a = adaptor.lhs(), *b = adaptor.rhs();
3875c0c51a9SNicolas Vasilache     Value *acc = adaptor.acc().empty() ? nullptr : adaptor.acc().front();
3885c0c51a9SNicolas Vasilache     SmallVector<Value *, 8> lhs, accs;
3895c0c51a9SNicolas Vasilache     lhs.reserve(rankLHS);
3905c0c51a9SNicolas Vasilache     accs.reserve(rankLHS);
3915c0c51a9SNicolas Vasilache     for (unsigned d = 0, e = rankLHS; d < e; ++d) {
3925c0c51a9SNicolas Vasilache       // shufflevector explicitly requires i32.
3935c0c51a9SNicolas Vasilache       auto attr = rewriter.getI32IntegerAttr(d);
3945c0c51a9SNicolas Vasilache       SmallVector<Attribute, 4> bcastAttr(rankRHS, attr);
3955c0c51a9SNicolas Vasilache       auto bcastArrayAttr = ArrayAttr::get(bcastAttr, ctx);
3965c0c51a9SNicolas Vasilache       Value *aD = nullptr, *accD = nullptr;
3975c0c51a9SNicolas Vasilache       // 1. Broadcast the element a[d] into vector aD.
3985c0c51a9SNicolas Vasilache       aD = rewriter.create<LLVM::ShuffleVectorOp>(loc, a, a, bcastArrayAttr);
3995c0c51a9SNicolas Vasilache       // 2. If acc is present, extract 1-d vector acc[d] into accD.
4005c0c51a9SNicolas Vasilache       if (acc)
4015c0c51a9SNicolas Vasilache         accD = rewriter.create<LLVM::ExtractValueOp>(
4025c0c51a9SNicolas Vasilache             loc, vRHS, acc, rewriter.getI64ArrayAttr(d));
4035c0c51a9SNicolas Vasilache       // 3. Compute aD outer b (plus accD, if relevant).
4045c0c51a9SNicolas Vasilache       Value *aOuterbD =
4055c0c51a9SNicolas Vasilache           accD ? rewriter.create<LLVM::FMulAddOp>(loc, vRHS, aD, b, accD)
4065c0c51a9SNicolas Vasilache                      .getResult()
4075c0c51a9SNicolas Vasilache                : rewriter.create<LLVM::FMulOp>(loc, aD, b).getResult();
4085c0c51a9SNicolas Vasilache       // 4. Insert as value `d` in the descriptor.
4095c0c51a9SNicolas Vasilache       desc = rewriter.create<LLVM::InsertValueOp>(loc, llvmArrayOfVectType,
4105c0c51a9SNicolas Vasilache                                                   desc, aOuterbD,
4115c0c51a9SNicolas Vasilache                                                   rewriter.getI64ArrayAttr(d));
4125c0c51a9SNicolas Vasilache     }
4135c0c51a9SNicolas Vasilache     rewriter.replaceOp(op, desc);
4145c0c51a9SNicolas Vasilache     return matchSuccess();
4155c0c51a9SNicolas Vasilache   }
4165c0c51a9SNicolas Vasilache };
4175c0c51a9SNicolas Vasilache 
4185c0c51a9SNicolas Vasilache class VectorTypeCastOpConversion : public LLVMOpLowering {
4195c0c51a9SNicolas Vasilache public:
4205c0c51a9SNicolas Vasilache   explicit VectorTypeCastOpConversion(MLIRContext *context,
4215c0c51a9SNicolas Vasilache                                       LLVMTypeConverter &typeConverter)
4225c0c51a9SNicolas Vasilache       : LLVMOpLowering(vector::TypeCastOp::getOperationName(), context,
4235c0c51a9SNicolas Vasilache                        typeConverter) {}
4245c0c51a9SNicolas Vasilache 
4255c0c51a9SNicolas Vasilache   PatternMatchResult
4265c0c51a9SNicolas Vasilache   matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
4275c0c51a9SNicolas Vasilache                   ConversionPatternRewriter &rewriter) const override {
4285c0c51a9SNicolas Vasilache     auto loc = op->getLoc();
4295c0c51a9SNicolas Vasilache     vector::TypeCastOp castOp = cast<vector::TypeCastOp>(op);
4305c0c51a9SNicolas Vasilache     MemRefType sourceMemRefType =
4315c0c51a9SNicolas Vasilache         castOp.getOperand()->getType().cast<MemRefType>();
4325c0c51a9SNicolas Vasilache     MemRefType targetMemRefType =
4335c0c51a9SNicolas Vasilache         castOp.getResult()->getType().cast<MemRefType>();
4345c0c51a9SNicolas Vasilache 
4355c0c51a9SNicolas Vasilache     // Only static shape casts supported atm.
4365c0c51a9SNicolas Vasilache     if (!sourceMemRefType.hasStaticShape() ||
4375c0c51a9SNicolas Vasilache         !targetMemRefType.hasStaticShape())
4385c0c51a9SNicolas Vasilache       return matchFailure();
4395c0c51a9SNicolas Vasilache 
4405c0c51a9SNicolas Vasilache     auto llvmSourceDescriptorTy =
4415c0c51a9SNicolas Vasilache         operands[0]->getType().dyn_cast<LLVM::LLVMType>();
4425c0c51a9SNicolas Vasilache     if (!llvmSourceDescriptorTy || !llvmSourceDescriptorTy.isStructTy())
4435c0c51a9SNicolas Vasilache       return matchFailure();
4445c0c51a9SNicolas Vasilache     MemRefDescriptor sourceMemRef(operands[0]);
4455c0c51a9SNicolas Vasilache 
4465c0c51a9SNicolas Vasilache     auto llvmTargetDescriptorTy = lowering.convertType(targetMemRefType)
4475c0c51a9SNicolas Vasilache                                       .dyn_cast_or_null<LLVM::LLVMType>();
4485c0c51a9SNicolas Vasilache     if (!llvmTargetDescriptorTy || !llvmTargetDescriptorTy.isStructTy())
4495c0c51a9SNicolas Vasilache       return matchFailure();
4505c0c51a9SNicolas Vasilache 
4515c0c51a9SNicolas Vasilache     int64_t offset;
4525c0c51a9SNicolas Vasilache     SmallVector<int64_t, 4> strides;
4535c0c51a9SNicolas Vasilache     auto successStrides =
4545c0c51a9SNicolas Vasilache         getStridesAndOffset(sourceMemRefType, strides, offset);
4555c0c51a9SNicolas Vasilache     bool isContiguous = (strides.back() == 1);
4565c0c51a9SNicolas Vasilache     if (isContiguous) {
4575c0c51a9SNicolas Vasilache       auto sizes = sourceMemRefType.getShape();
4585c0c51a9SNicolas Vasilache       for (int index = 0, e = strides.size() - 2; index < e; ++index) {
4595c0c51a9SNicolas Vasilache         if (strides[index] != strides[index + 1] * sizes[index + 1]) {
4605c0c51a9SNicolas Vasilache           isContiguous = false;
4615c0c51a9SNicolas Vasilache           break;
4625c0c51a9SNicolas Vasilache         }
4635c0c51a9SNicolas Vasilache       }
4645c0c51a9SNicolas Vasilache     }
4655c0c51a9SNicolas Vasilache     // Only contiguous source tensors supported atm.
4665c0c51a9SNicolas Vasilache     if (failed(successStrides) || !isContiguous)
4675c0c51a9SNicolas Vasilache       return matchFailure();
4685c0c51a9SNicolas Vasilache 
4695c0c51a9SNicolas Vasilache     auto int64Ty = LLVM::LLVMType::getInt64Ty(lowering.getDialect());
4705c0c51a9SNicolas Vasilache 
4715c0c51a9SNicolas Vasilache     // Create descriptor.
4725c0c51a9SNicolas Vasilache     auto desc = MemRefDescriptor::undef(rewriter, loc, llvmTargetDescriptorTy);
4735c0c51a9SNicolas Vasilache     Type llvmTargetElementTy = desc.getElementType();
4745c0c51a9SNicolas Vasilache     // Set allocated ptr.
4755c0c51a9SNicolas Vasilache     Value *allocated = sourceMemRef.allocatedPtr(rewriter, loc);
4765c0c51a9SNicolas Vasilache     allocated =
4775c0c51a9SNicolas Vasilache         rewriter.create<LLVM::BitcastOp>(loc, llvmTargetElementTy, allocated);
4785c0c51a9SNicolas Vasilache     desc.setAllocatedPtr(rewriter, loc, allocated);
4795c0c51a9SNicolas Vasilache     // Set aligned ptr.
4805c0c51a9SNicolas Vasilache     Value *ptr = sourceMemRef.alignedPtr(rewriter, loc);
4815c0c51a9SNicolas Vasilache     ptr = rewriter.create<LLVM::BitcastOp>(loc, llvmTargetElementTy, ptr);
4825c0c51a9SNicolas Vasilache     desc.setAlignedPtr(rewriter, loc, ptr);
4835c0c51a9SNicolas Vasilache     // Fill offset 0.
4845c0c51a9SNicolas Vasilache     auto attr = rewriter.getIntegerAttr(rewriter.getIndexType(), 0);
4855c0c51a9SNicolas Vasilache     auto zero = rewriter.create<LLVM::ConstantOp>(loc, int64Ty, attr);
4865c0c51a9SNicolas Vasilache     desc.setOffset(rewriter, loc, zero);
4875c0c51a9SNicolas Vasilache 
4885c0c51a9SNicolas Vasilache     // Fill size and stride descriptors in memref.
4895c0c51a9SNicolas Vasilache     for (auto indexedSize : llvm::enumerate(targetMemRefType.getShape())) {
4905c0c51a9SNicolas Vasilache       int64_t index = indexedSize.index();
4915c0c51a9SNicolas Vasilache       auto sizeAttr =
4925c0c51a9SNicolas Vasilache           rewriter.getIntegerAttr(rewriter.getIndexType(), indexedSize.value());
4935c0c51a9SNicolas Vasilache       auto size = rewriter.create<LLVM::ConstantOp>(loc, int64Ty, sizeAttr);
4945c0c51a9SNicolas Vasilache       desc.setSize(rewriter, loc, index, size);
4955c0c51a9SNicolas Vasilache       auto strideAttr =
4965c0c51a9SNicolas Vasilache           rewriter.getIntegerAttr(rewriter.getIndexType(), strides[index]);
4975c0c51a9SNicolas Vasilache       auto stride = rewriter.create<LLVM::ConstantOp>(loc, int64Ty, strideAttr);
4985c0c51a9SNicolas Vasilache       desc.setStride(rewriter, loc, index, stride);
4995c0c51a9SNicolas Vasilache     }
5005c0c51a9SNicolas Vasilache 
5015c0c51a9SNicolas Vasilache     rewriter.replaceOp(op, {desc});
5025c0c51a9SNicolas Vasilache     return matchSuccess();
5035c0c51a9SNicolas Vasilache   }
5045c0c51a9SNicolas Vasilache };
5055c0c51a9SNicolas Vasilache 
5065c0c51a9SNicolas Vasilache /// Populate the given list with patterns that convert from Vector to LLVM.
5075c0c51a9SNicolas Vasilache void mlir::populateVectorToLLVMConversionPatterns(
5085c0c51a9SNicolas Vasilache     LLVMTypeConverter &converter, OwningRewritePatternList &patterns) {
509*9826fe5cSAart Bik   patterns.insert<VectorBroadcastOpConversion, VectorExtractOpConversion,
510*9826fe5cSAart Bik                   VectorInsertOpConversion, VectorOuterProductOpConversion,
511*9826fe5cSAart Bik                   VectorTypeCastOpConversion>(
5125c0c51a9SNicolas Vasilache       converter.getDialect()->getContext(), converter);
5135c0c51a9SNicolas Vasilache }
5145c0c51a9SNicolas Vasilache 
5155c0c51a9SNicolas Vasilache namespace {
5165c0c51a9SNicolas Vasilache struct LowerVectorToLLVMPass : public ModulePass<LowerVectorToLLVMPass> {
5175c0c51a9SNicolas Vasilache   void runOnModule() override;
5185c0c51a9SNicolas Vasilache };
5195c0c51a9SNicolas Vasilache } // namespace
5205c0c51a9SNicolas Vasilache 
5215c0c51a9SNicolas Vasilache void LowerVectorToLLVMPass::runOnModule() {
5225c0c51a9SNicolas Vasilache   // Convert to the LLVM IR dialect using the converter defined above.
5235c0c51a9SNicolas Vasilache   OwningRewritePatternList patterns;
5245c0c51a9SNicolas Vasilache   LLVMTypeConverter converter(&getContext());
5255c0c51a9SNicolas Vasilache   populateVectorToLLVMConversionPatterns(converter, patterns);
5265c0c51a9SNicolas Vasilache   populateStdToLLVMConversionPatterns(converter, patterns);
5275c0c51a9SNicolas Vasilache 
5285c0c51a9SNicolas Vasilache   ConversionTarget target(getContext());
5295c0c51a9SNicolas Vasilache   target.addLegalDialect<LLVM::LLVMDialect>();
5305c0c51a9SNicolas Vasilache   target.addDynamicallyLegalOp<FuncOp>(
5315c0c51a9SNicolas Vasilache       [&](FuncOp op) { return converter.isSignatureLegal(op.getType()); });
5325c0c51a9SNicolas Vasilache   if (failed(
5335c0c51a9SNicolas Vasilache           applyPartialConversion(getModule(), target, patterns, &converter))) {
5345c0c51a9SNicolas Vasilache     signalPassFailure();
5355c0c51a9SNicolas Vasilache   }
5365c0c51a9SNicolas Vasilache }
5375c0c51a9SNicolas Vasilache 
5385c0c51a9SNicolas Vasilache OpPassBase<ModuleOp> *mlir::createLowerVectorToLLVMPass() {
5395c0c51a9SNicolas Vasilache   return new LowerVectorToLLVMPass();
5405c0c51a9SNicolas Vasilache }
5415c0c51a9SNicolas Vasilache 
5425c0c51a9SNicolas Vasilache static PassRegistration<LowerVectorToLLVMPass>
5435c0c51a9SNicolas Vasilache     pass("convert-vector-to-llvm",
5445c0c51a9SNicolas Vasilache          "Lower the operations from the vector dialect into the LLVM dialect");
545