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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
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380a1b20 |
| 23-Jul-2022 |
Kazu Hirata <[email protected]> |
Use callables directly in any_of, count_if, etc (NFC)
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8fe076ff |
| 12-Jul-2022 |
Thomas Raoux <[email protected]> |
[mlir][VectorToLLVM] Fix bug in lowering of vector.reduce fmax/fmin
The lowering of fmax/fmin reduce was ignoring the optional accumulator.
Differential Revision: https://reviews.llvm.org/D129597
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fa596c69 |
| 23-Jun-2022 |
Mahesh Ravishankar <[email protected]> |
[mlir][Vector] Fix reordering of floating point adds during lower of `vector.contract`.
Adding the accumulator value after the `vector.contract` changes the precision of the operation. This makes su
[mlir][Vector] Fix reordering of floating point adds during lower of `vector.contract`.
Adding the accumulator value after the `vector.contract` changes the precision of the operation. This makes sure the accumulator is carried through to `vector.reduce` (and down to LLVM).
Differential Revision: https://reviews.llvm.org/D128674
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Revision tags: llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1 |
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7bc8ad51 |
| 24-Mar-2022 |
Javier Setoain <[email protected]> |
[mlir][vector][nfc] Rename index optimizations option
We are using "enable-index-optimizations" and "indexOptimizations" as names for an optimization that consists of using i32 for indices within a
[mlir][vector][nfc] Rename index optimizations option
We are using "enable-index-optimizations" and "indexOptimizations" as names for an optimization that consists of using i32 for indices within a vector. For instance, when building a vector comparison for mask generation. The name is confusing and suggests a scope beyond these vector indices. This change makes the function of the option explicit in its name.
Differential Revision: https://reviews.llvm.org/D122415
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7c38fd60 |
| 28-Mar-2022 |
Jacques Pienaar <[email protected]> |
[mlir] Flip Vector dialect accessors used to prefixed form.
This has been on _Both for a couple of weeks. Flip usages in core with intention to flip flag to _Prefixed in follow up. Needed to add a c
[mlir] Flip Vector dialect accessors used to prefixed form.
This has been on _Both for a couple of weeks. Flip usages in core with intention to flip flag to _Prefixed in follow up. Needed to add a couple of helper methods in AffineOps and Linalg to facilitate a pure flag flip in follow up as some of these classes are used in templates and so sensitive to Vector dialect changes.
Differential Revision: https://reviews.llvm.org/D122151
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Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init |
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a75a46db |
| 26-Jan-2022 |
Javier Setoain <[email protected]> |
[mlir][Vector] Enable create_mask for scalable vectors
The way vector.create_mask is currently lowered is vector-length-dependent, and therefore incompatible with scalable vector types. This patch a
[mlir][Vector] Enable create_mask for scalable vectors
The way vector.create_mask is currently lowered is vector-length-dependent, and therefore incompatible with scalable vector types. This patch adds an alternative lowering path for create_mask operations that return a scalable vector mask.
Differential Revision: https://reviews.llvm.org/D118248
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1f971e23 |
| 28-Feb-2022 |
River Riddle <[email protected]> |
[mlir] Trim a huge number of unnecessary dependencies on the Func dialect
The Func has a large number of legacy dependencies carried over from the old Standard dialect, which was pervasive and conta
[mlir] Trim a huge number of unnecessary dependencies on the Func dialect
The Func has a large number of legacy dependencies carried over from the old Standard dialect, which was pervasive and contained a large number of varied operations. With the split of the standard dialect and its demise, a lot of lingering dead dependencies have survived to the Func dialect. This commit removes a large majority of then, greatly reducing the dependence surface area of the Func dialect.
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23aa5a74 |
| 26-Feb-2022 |
River Riddle <[email protected]> |
[mlir] Rename the Standard dialect to the Func dialect
The last remaining operations in the standard dialect all revolve around FuncOp/function related constructs. This patch simply handles the init
[mlir] Rename the Standard dialect to the Func dialect
The last remaining operations in the standard dialect all revolve around FuncOp/function related constructs. This patch simply handles the initial renaming (which by itself is already huge), but there are a large number of cleanups unlocked/necessary afterwards:
* Removing a bunch of unnecessary dependencies on Func * Cleaning up the From/ToStandard conversion passes * Preparing for the move of FuncOp to the Func dialect
See the discussion at https://discourse.llvm.org/t/standard-dialect-the-final-chapter/6061
Differential Revision: https://reviews.llvm.org/D120624
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fe0bf7d4 |
| 10-Feb-2022 |
Matthias Springer <[email protected]> |
[mlir][vector][NFC] Use CombiningKindAttr instead of StringAttr
This makes the op consistent with other ops in vector dialect.
Differential Revision: https://reviews.llvm.org/D119343
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3c69bc4d |
| 06-Feb-2022 |
River Riddle <[email protected]> |
[mlir][NFC] Remove a few op builders that simply swap parameter order
Differential Revision: https://reviews.llvm.org/D119093
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6a8ba318 |
| 25-Jan-2022 |
River Riddle <[email protected]> |
[mlir] Split std.splat into tensor.splat and vector.splat
This is part of the larger effort to split the standard dialect. This will also allow for pruning some additional dependencies on Standard (
[mlir] Split std.splat into tensor.splat and vector.splat
This is part of the larger effort to split the standard dialect. This will also allow for pruning some additional dependencies on Standard (done in a followup).
Differential Revision: https://reviews.llvm.org/D118202
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99ef9eeb |
| 31-Jan-2022 |
Matthias Springer <[email protected]> |
[mlir][vector][NFC] Split into IR, Transforms and Utils
This reduces the dependencies of the MLIRVector target and makes the dialect consistent with other dialects.
Differential Revision: https://r
[mlir][vector][NFC] Split into IR, Transforms and Utils
This reduces the dependencies of the MLIRVector target and makes the dialect consistent with other dialects.
Differential Revision: https://reviews.llvm.org/D118533
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Revision tags: llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
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e4853be2 |
| 02-Jan-2022 |
Mehdi Amini <[email protected]> |
Apply clang-tidy fixes for performance-for-range-copy to MLIR (NFC)
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Revision tags: llvmorg-13.0.1-rc1 |
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a4830d14 |
| 12-Oct-2021 |
Javier Setoain <[email protected]> |
[mlir][RFC] Add scalable dimensions to VectorType
With VectorType supporting scalable dimensions, we don't need many of the operations currently present in ArmSVE, like mask generation and basic ari
[mlir][RFC] Add scalable dimensions to VectorType
With VectorType supporting scalable dimensions, we don't need many of the operations currently present in ArmSVE, like mask generation and basic arithmetic instructions. Therefore, this patch also gets rid of those.
Having built-in scalable vector support also simplifies the lowering of scalable vector dialects down to LLVMIR.
Scalable dimensions are indicated with the scalable dimensions between square brackets:
vector<[4]xf32>
Is a scalable vector of 4 single precission floating point elements.
More generally, a VectorType can have a set of fixed-length dimensions followed by a set of scalable dimensions:
vector<2x[4x4]xf32>
Is a vector with 2 scalable 4x4 vectors of single precission floating point elements.
The scale of the scalable dimensions can be obtained with the Vector operation:
%vs = vector.vscale
This change is being discussed in the discourse RFC:
https://llvm.discourse.group/t/rfc-add-built-in-support-for-scalable-vector-types/4484
Differential Revision: https://reviews.llvm.org/D111819
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1423e8bf |
| 03-Dec-2021 |
Michal Terepeta <[email protected]> |
[mlir][Vector] Support 0-D vectors in `BitCastOp`
The implementation only allows to bit-cast between two 0-D vectors. We could probably support casting from/to vectors like `vector<1xf32>`, but I wa
[mlir][Vector] Support 0-D vectors in `BitCastOp`
The implementation only allows to bit-cast between two 0-D vectors. We could probably support casting from/to vectors like `vector<1xf32>`, but I wasn't convinced that this would be important and it would require breaking the invariant that `BitCastOp` works only on vectors with equal rank.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D114854
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73863648 |
| 30-Nov-2021 |
Stephen Neuendorffer <[email protected]> |
Revert "[MLIR] Update Vector To LLVM conversion to be aware of assume_alignment"
This reverts commit 29a50c5864ddab283c1ff38694fb5926ce37b39a.
After LLVM lowering, the original patch incorrectly mo
Revert "[MLIR] Update Vector To LLVM conversion to be aware of assume_alignment"
This reverts commit 29a50c5864ddab283c1ff38694fb5926ce37b39a.
After LLVM lowering, the original patch incorrectly moved alignment information across an unconstrained GEP operation. This is only correct for some index offsets in the GEP. It seems that the best approach is, in fact, to rely on LLVM to propagate information from the llvm.assume() to users.
Thanks to Thomas Raoux for catching this.
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cc311a15 |
| 25-Nov-2021 |
Michal Terepeta <[email protected]> |
[mlir][Vector] Support 0-D vectors in `VectorPrintOpConversion`
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D114549
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3ff4e5f2 |
| 23-Nov-2021 |
Nicolas Vasilache <[email protected]> |
[mlir][Vector] Thread 0-d vectors through InsertElementOp.
This revision makes concrete use of 0-d vectors to extend the semantics of InsertElementOp.
Reviewed By: dcaballe, pifon2a
Differential R
[mlir][Vector] Thread 0-d vectors through InsertElementOp.
This revision makes concrete use of 0-d vectors to extend the semantics of InsertElementOp.
Reviewed By: dcaballe, pifon2a
Differential Revision: https://reviews.llvm.org/D114388
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e7026aba |
| 23-Nov-2021 |
Nicolas Vasilache <[email protected]> |
[mlir][Vector] Thread 0-d vectors through ExtractElementOp.
This revision starts making concrete use of 0-d vectors to extend the semantics of ExtractElementOp. In the process a new VectorOfAnyRank
[mlir][Vector] Thread 0-d vectors through ExtractElementOp.
This revision starts making concrete use of 0-d vectors to extend the semantics of ExtractElementOp. In the process a new VectorOfAnyRank Tablegen OpBase.td is added to allow progressive transition to supporting 0-d vectors by gradually opting in.
Differential Revision: https://reviews.llvm.org/D114387
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ee80ffbf |
| 15-Nov-2021 |
Nicolas Vasilache <[email protected]> |
[mlir][Linalg] Add bounded recursion declaration to FMAOp -> LLVM conversion.
FMAOp -> LLVM conversion is done progressively by peeling off 1 dimension from FMAOp at each pattern iteration. Add the
[mlir][Linalg] Add bounded recursion declaration to FMAOp -> LLVM conversion.
FMAOp -> LLVM conversion is done progressively by peeling off 1 dimension from FMAOp at each pattern iteration. Add the recursively bounded property declaration to the pattern so that the rewriter can apply it multiple times.
Without this, FMAOps with 3+D do not lower to LLVM.
Differential Revision: https://reviews.llvm.org/D113886
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015192c6 |
| 27-Oct-2021 |
River Riddle <[email protected]> |
[mlir:DialectConversion] Restructure how argument/target materializations get invoked
The current implementation invokes materializations whenever an input operand does not have a mapping for the de
[mlir:DialectConversion] Restructure how argument/target materializations get invoked
The current implementation invokes materializations whenever an input operand does not have a mapping for the desired type, i.e. it requires materialization at the earliest possible point. This conflicts with goal of dialect conversion (and also the current documentation) which states that a materialization is only required if the materialization is supposed to persist after the conversion process has finished.
This revision refactors this such that whenever a target materialization "might" be necessary, we insert an unrealized_conversion_cast to act as a temporary materialization. This allows for deferring the invocation of the user materialization hooks until the end of the conversion process, where we actually have a better sense if it's actually necessary. This has several benefits:
* In some cases a target materialization hook is no longer necessary When performing a full conversion, there are some situations where a temporary materialization is necessary. Moving forward, these users won't need to provide any target materializations, as the temporary materializations do not require the user to provide materialization hooks.
* getRemappedValue can now handle values that haven't been converted yet Before this commit, it wasn't well supported to get the remapped value of a value that hadn't been converted yet (making it difficult/impossible to convert multiple operations in many situations). This commit updates getRemappedValue to properly handle this case by inserting temporary materializations when necessary.
Another code-health related benefit is that with this change we can move a majority of the complexity related to materializations to the end of the conversion process, instead of handling adhoc while conversion is happening.
Differential Revision: https://reviews.llvm.org/D111620
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d054b80b |
| 25-Oct-2021 |
Nicolas Vasilache <[email protected]> |
[mlir][Vector] NFC - Add option to hook vector.transpose lowering to strategies.
This revision also moves some code around to improve overall structure.
Differential Revision: https://reviews.llvm.
[mlir][Vector] NFC - Add option to hook vector.transpose lowering to strategies.
This revision also moves some code around to improve overall structure.
Differential Revision: https://reviews.llvm.org/D112437
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eda2ebd7 |
| 22-Oct-2021 |
Nicolas Vasilache <[email protected]> |
[mlir][Vector] NFC - Extract rewrites related to insert/extract strided slice in a separate file.
Differential Revision: https://reviews.llvm.org/D112301
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e41ebbec |
| 11-Oct-2021 |
Vladislav Vinogradov <[email protected]> |
[mlir][RFC] Refactor layout representation in MemRefType
The change is based on the proposal from the following discussion: https://llvm.discourse.group/t/rfc-memreftype-affine-maps-list-vs-single-i
[mlir][RFC] Refactor layout representation in MemRefType
The change is based on the proposal from the following discussion: https://llvm.discourse.group/t/rfc-memreftype-affine-maps-list-vs-single-item/3968
* Introduce `MemRefLayoutAttr` interface to get `AffineMap` from an `Attribute` (`AffineMapAttr` implements this interface). * Store layout as a single generic `MemRefLayoutAttr`.
This change removes the affine map composition feature and related API. Actually, while the `MemRefType` itself supported it, almost none of the upstream can work with more than 1 affine map in `MemRefType`.
The introduced `MemRefLayoutAttr` allows to re-implement this feature in a more stable way - via separate attribute class.
Also the interface allows to use different layout representations rather than affine maps. For example, the described "stride + offset" form, which is currently supported in ASM parser only, can now be expressed as separate attribute.
Reviewed By: ftynse, bondhugula
Differential Revision: https://reviews.llvm.org/D111553
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a54f4eae |
| 12-Oct-2021 |
Mogball <[email protected]> |
[MLIR] Replace std ops with arith dialect ops
Precursor: https://reviews.llvm.org/D110200
Removed redundant ops from the standard dialect that were moved to the `arith` or `math` dialects.
Renamed
[MLIR] Replace std ops with arith dialect ops
Precursor: https://reviews.llvm.org/D110200
Removed redundant ops from the standard dialect that were moved to the `arith` or `math` dialects.
Renamed all instances of operations in the codebase and in tests.
Reviewed By: rriddle, jpienaar
Differential Revision: https://reviews.llvm.org/D110797
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