15c0c51a9SNicolas Vasilache //===- VectorToLLVM.cpp - Conversion from Vector to the LLVM dialect ------===// 25c0c51a9SNicolas Vasilache // 35c0c51a9SNicolas Vasilache // Copyright 2019 The MLIR Authors. 45c0c51a9SNicolas Vasilache // 55c0c51a9SNicolas Vasilache // Licensed under the Apache License, Version 2.0 (the "License"); 65c0c51a9SNicolas Vasilache // you may not use this file except in compliance with the License. 75c0c51a9SNicolas Vasilache // You may obtain a copy of the License at 85c0c51a9SNicolas Vasilache // 95c0c51a9SNicolas Vasilache // http://www.apache.org/licenses/LICENSE-2.0 105c0c51a9SNicolas Vasilache // 115c0c51a9SNicolas Vasilache // Unless required by applicable law or agreed to in writing, software 125c0c51a9SNicolas Vasilache // distributed under the License is distributed on an "AS IS" BASIS, 135c0c51a9SNicolas Vasilache // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 145c0c51a9SNicolas Vasilache // See the License for the specific language governing permissions and 155c0c51a9SNicolas Vasilache // limitations under the License. 165c0c51a9SNicolas Vasilache // ============================================================================= 175c0c51a9SNicolas Vasilache 185c0c51a9SNicolas Vasilache #include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h" 195c0c51a9SNicolas Vasilache #include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h" 205c0c51a9SNicolas Vasilache #include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h" 215c0c51a9SNicolas Vasilache #include "mlir/Dialect/LLVMIR/LLVMDialect.h" 225c0c51a9SNicolas Vasilache #include "mlir/Dialect/VectorOps/VectorOps.h" 235c0c51a9SNicolas Vasilache #include "mlir/IR/Attributes.h" 245c0c51a9SNicolas Vasilache #include "mlir/IR/Builders.h" 255c0c51a9SNicolas Vasilache #include "mlir/IR/MLIRContext.h" 265c0c51a9SNicolas Vasilache #include "mlir/IR/Module.h" 275c0c51a9SNicolas Vasilache #include "mlir/IR/Operation.h" 285c0c51a9SNicolas Vasilache #include "mlir/IR/PatternMatch.h" 295c0c51a9SNicolas Vasilache #include "mlir/IR/StandardTypes.h" 305c0c51a9SNicolas Vasilache #include "mlir/IR/Types.h" 315c0c51a9SNicolas Vasilache #include "mlir/Pass/Pass.h" 325c0c51a9SNicolas Vasilache #include "mlir/Pass/PassManager.h" 335c0c51a9SNicolas Vasilache #include "mlir/Transforms/DialectConversion.h" 345c0c51a9SNicolas Vasilache #include "mlir/Transforms/Passes.h" 355c0c51a9SNicolas Vasilache 365c0c51a9SNicolas Vasilache #include "llvm/IR/DerivedTypes.h" 375c0c51a9SNicolas Vasilache #include "llvm/IR/Module.h" 385c0c51a9SNicolas Vasilache #include "llvm/IR/Type.h" 395c0c51a9SNicolas Vasilache #include "llvm/Support/Allocator.h" 405c0c51a9SNicolas Vasilache #include "llvm/Support/ErrorHandling.h" 415c0c51a9SNicolas Vasilache 425c0c51a9SNicolas Vasilache using namespace mlir; 435c0c51a9SNicolas Vasilache 445c0c51a9SNicolas Vasilache template <typename T> 455c0c51a9SNicolas Vasilache static LLVM::LLVMType getPtrToElementType(T containerType, 465c0c51a9SNicolas Vasilache LLVMTypeConverter &lowering) { 475c0c51a9SNicolas Vasilache return lowering.convertType(containerType.getElementType()) 485c0c51a9SNicolas Vasilache .template cast<LLVM::LLVMType>() 495c0c51a9SNicolas Vasilache .getPointerTo(); 505c0c51a9SNicolas Vasilache } 515c0c51a9SNicolas Vasilache 529826fe5cSAart Bik // Helper to reduce vector type by one rank at front. 539826fe5cSAart Bik static VectorType reducedVectorTypeFront(VectorType tp) { 549826fe5cSAart Bik assert((tp.getRank() > 1) && "unlowerable vector type"); 559826fe5cSAart Bik return VectorType::get(tp.getShape().drop_front(), tp.getElementType()); 569826fe5cSAart Bik } 579826fe5cSAart Bik 589826fe5cSAart Bik // Helper to reduce vector type by *all* but one rank at back. 599826fe5cSAart Bik static VectorType reducedVectorTypeBack(VectorType tp) { 609826fe5cSAart Bik assert((tp.getRank() > 1) && "unlowerable vector type"); 619826fe5cSAart Bik return VectorType::get(tp.getShape().take_back(), tp.getElementType()); 629826fe5cSAart Bik } 639826fe5cSAart Bik 64*1c81adf3SAart Bik // Helper that picks the proper sequence for inserting. 65*1c81adf3SAart Bik static Value *insertOne(ConversionPatternRewriter &rewriter, 66*1c81adf3SAart Bik LLVMTypeConverter &lowering, Location loc, Value *val1, 67*1c81adf3SAart Bik Value *val2, Type llvmType, int64_t rank, int64_t pos) { 68*1c81adf3SAart Bik if (rank == 1) { 69*1c81adf3SAart Bik auto idxType = rewriter.getIndexType(); 70*1c81adf3SAart Bik auto constant = rewriter.create<LLVM::ConstantOp>( 71*1c81adf3SAart Bik loc, lowering.convertType(idxType), 72*1c81adf3SAart Bik rewriter.getIntegerAttr(idxType, pos)); 73*1c81adf3SAart Bik return rewriter.create<LLVM::InsertElementOp>(loc, llvmType, val1, val2, 74*1c81adf3SAart Bik constant); 75*1c81adf3SAart Bik } 76*1c81adf3SAart Bik return rewriter.create<LLVM::InsertValueOp>(loc, llvmType, val1, val2, 77*1c81adf3SAart Bik rewriter.getI64ArrayAttr(pos)); 78*1c81adf3SAart Bik } 79*1c81adf3SAart Bik 80*1c81adf3SAart Bik // Helper that picks the proper sequence for extracting. 81*1c81adf3SAart Bik static Value *extractOne(ConversionPatternRewriter &rewriter, 82*1c81adf3SAart Bik LLVMTypeConverter &lowering, Location loc, Value *val, 83*1c81adf3SAart Bik Type llvmType, int64_t rank, int64_t pos) { 84*1c81adf3SAart Bik if (rank == 1) { 85*1c81adf3SAart Bik auto idxType = rewriter.getIndexType(); 86*1c81adf3SAart Bik auto constant = rewriter.create<LLVM::ConstantOp>( 87*1c81adf3SAart Bik loc, lowering.convertType(idxType), 88*1c81adf3SAart Bik rewriter.getIntegerAttr(idxType, pos)); 89*1c81adf3SAart Bik return rewriter.create<LLVM::ExtractElementOp>(loc, llvmType, val, 90*1c81adf3SAart Bik constant); 91*1c81adf3SAart Bik } 92*1c81adf3SAart Bik return rewriter.create<LLVM::ExtractValueOp>(loc, llvmType, val, 93*1c81adf3SAart Bik rewriter.getI64ArrayAttr(pos)); 94*1c81adf3SAart Bik } 95*1c81adf3SAart Bik 96b36aaeafSAart Bik class VectorBroadcastOpConversion : public LLVMOpLowering { 97b36aaeafSAart Bik public: 98b36aaeafSAart Bik explicit VectorBroadcastOpConversion(MLIRContext *context, 99b36aaeafSAart Bik LLVMTypeConverter &typeConverter) 100b36aaeafSAart Bik : LLVMOpLowering(vector::BroadcastOp::getOperationName(), context, 101b36aaeafSAart Bik typeConverter) {} 102b36aaeafSAart Bik 103b36aaeafSAart Bik PatternMatchResult 104b36aaeafSAart Bik matchAndRewrite(Operation *op, ArrayRef<Value *> operands, 105b36aaeafSAart Bik ConversionPatternRewriter &rewriter) const override { 106b36aaeafSAart Bik auto broadcastOp = cast<vector::BroadcastOp>(op); 107b36aaeafSAart Bik VectorType dstVectorType = broadcastOp.getVectorType(); 108b36aaeafSAart Bik if (lowering.convertType(dstVectorType) == nullptr) 109b36aaeafSAart Bik return matchFailure(); 110b36aaeafSAart Bik // Rewrite when the full vector type can be lowered (which 111b36aaeafSAart Bik // implies all 'reduced' types can be lowered too). 112*1c81adf3SAart Bik auto adaptor = vector::BroadcastOpOperandAdaptor(operands); 113b36aaeafSAart Bik VectorType srcVectorType = 114b36aaeafSAart Bik broadcastOp.getSourceType().dyn_cast<VectorType>(); 115b36aaeafSAart Bik rewriter.replaceOp( 116*1c81adf3SAart Bik op, expandRanks(adaptor.source(), // source value to be expanded 117b36aaeafSAart Bik op->getLoc(), // location of original broadcast 118b36aaeafSAart Bik srcVectorType, dstVectorType, rewriter)); 119b36aaeafSAart Bik return matchSuccess(); 120b36aaeafSAart Bik } 121b36aaeafSAart Bik 122b36aaeafSAart Bik private: 123b36aaeafSAart Bik // Expands the given source value over all the ranks, as defined 124b36aaeafSAart Bik // by the source and destination type (a null source type denotes 125b36aaeafSAart Bik // expansion from a scalar value into a vector). 126b36aaeafSAart Bik // 127b36aaeafSAart Bik // TODO(ajcbik): consider replacing this one-pattern lowering 128b36aaeafSAart Bik // with a two-pattern lowering using other vector 129b36aaeafSAart Bik // ops once all insert/extract/shuffle operations 130b36aaeafSAart Bik // are available with lowering implemention. 131b36aaeafSAart Bik // 132b36aaeafSAart Bik Value *expandRanks(Value *value, Location loc, VectorType srcVectorType, 133b36aaeafSAart Bik VectorType dstVectorType, 134b36aaeafSAart Bik ConversionPatternRewriter &rewriter) const { 135b36aaeafSAart Bik assert((dstVectorType != nullptr) && "invalid result type in broadcast"); 136b36aaeafSAart Bik // Determine rank of source and destination. 137b36aaeafSAart Bik int64_t srcRank = srcVectorType ? srcVectorType.getRank() : 0; 138b36aaeafSAart Bik int64_t dstRank = dstVectorType.getRank(); 139b36aaeafSAart Bik int64_t curDim = dstVectorType.getDimSize(0); 140b36aaeafSAart Bik if (srcRank < dstRank) 141b36aaeafSAart Bik // Duplicate this rank. 142b36aaeafSAart Bik return duplicateOneRank(value, loc, srcVectorType, dstVectorType, dstRank, 143b36aaeafSAart Bik curDim, rewriter); 144b36aaeafSAart Bik // If all trailing dimensions are the same, the broadcast consists of 145b36aaeafSAart Bik // simply passing through the source value and we are done. Otherwise, 146b36aaeafSAart Bik // any non-matching dimension forces a stretch along this rank. 147b36aaeafSAart Bik assert((srcVectorType != nullptr) && (srcRank > 0) && 148b36aaeafSAart Bik (srcRank == dstRank) && "invalid rank in broadcast"); 149b36aaeafSAart Bik for (int64_t r = 0; r < dstRank; r++) { 150b36aaeafSAart Bik if (srcVectorType.getDimSize(r) != dstVectorType.getDimSize(r)) { 151b36aaeafSAart Bik return stretchOneRank(value, loc, srcVectorType, dstVectorType, dstRank, 152b36aaeafSAart Bik curDim, rewriter); 153b36aaeafSAart Bik } 154b36aaeafSAart Bik } 155b36aaeafSAart Bik return value; 156b36aaeafSAart Bik } 157b36aaeafSAart Bik 158b36aaeafSAart Bik // Picks the best way to duplicate a single rank. For the 1-D case, a 159b36aaeafSAart Bik // single insert-elt/shuffle is the most efficient expansion. For higher 160b36aaeafSAart Bik // dimensions, however, we need dim x insert-values on a new broadcast 161b36aaeafSAart Bik // with one less leading dimension, which will be lowered "recursively" 162b36aaeafSAart Bik // to matching LLVM IR. 163b36aaeafSAart Bik // For example: 164b36aaeafSAart Bik // v = broadcast s : f32 to vector<4x2xf32> 165b36aaeafSAart Bik // becomes: 166b36aaeafSAart Bik // x = broadcast s : f32 to vector<2xf32> 167b36aaeafSAart Bik // v = [x,x,x,x] 168b36aaeafSAart Bik // becomes: 169b36aaeafSAart Bik // x = [s,s] 170b36aaeafSAart Bik // v = [x,x,x,x] 171b36aaeafSAart Bik Value *duplicateOneRank(Value *value, Location loc, VectorType srcVectorType, 172b36aaeafSAart Bik VectorType dstVectorType, int64_t rank, int64_t dim, 173b36aaeafSAart Bik ConversionPatternRewriter &rewriter) const { 174b36aaeafSAart Bik Type llvmType = lowering.convertType(dstVectorType); 175b36aaeafSAart Bik assert((llvmType != nullptr) && "unlowerable vector type"); 176b36aaeafSAart Bik if (rank == 1) { 177b36aaeafSAart Bik Value *undef = rewriter.create<LLVM::UndefOp>(loc, llvmType); 178*1c81adf3SAart Bik Value *expand = 179*1c81adf3SAart Bik insertOne(rewriter, lowering, loc, undef, value, llvmType, rank, 0); 180b36aaeafSAart Bik SmallVector<int32_t, 4> zeroValues(dim, 0); 181b36aaeafSAart Bik return rewriter.create<LLVM::ShuffleVectorOp>( 182b36aaeafSAart Bik loc, expand, undef, rewriter.getI32ArrayAttr(zeroValues)); 183b36aaeafSAart Bik } 1849826fe5cSAart Bik Value *expand = 1859826fe5cSAart Bik expandRanks(value, loc, srcVectorType, 1869826fe5cSAart Bik reducedVectorTypeFront(dstVectorType), rewriter); 187b36aaeafSAart Bik Value *result = rewriter.create<LLVM::UndefOp>(loc, llvmType); 188b36aaeafSAart Bik for (int64_t d = 0; d < dim; ++d) { 189*1c81adf3SAart Bik result = 190*1c81adf3SAart Bik insertOne(rewriter, lowering, loc, result, expand, llvmType, rank, d); 191b36aaeafSAart Bik } 192b36aaeafSAart Bik return result; 193b36aaeafSAart Bik } 194b36aaeafSAart Bik 195b36aaeafSAart Bik // Picks the best way to stretch a single rank. For the 1-D case, a 196b36aaeafSAart Bik // single insert-elt/shuffle is the most efficient expansion when at 197b36aaeafSAart Bik // a stretch. Otherwise, every dimension needs to be expanded 198b36aaeafSAart Bik // individually and individually inserted in the resulting vector. 199b36aaeafSAart Bik // For example: 200b36aaeafSAart Bik // v = broadcast w : vector<4x1x2xf32> to vector<4x2x2xf32> 201b36aaeafSAart Bik // becomes: 202b36aaeafSAart Bik // a = broadcast w[0] : vector<1x2xf32> to vector<2x2xf32> 203b36aaeafSAart Bik // b = broadcast w[1] : vector<1x2xf32> to vector<2x2xf32> 204b36aaeafSAart Bik // c = broadcast w[2] : vector<1x2xf32> to vector<2x2xf32> 205b36aaeafSAart Bik // d = broadcast w[3] : vector<1x2xf32> to vector<2x2xf32> 206b36aaeafSAart Bik // v = [a,b,c,d] 207b36aaeafSAart Bik // becomes: 208b36aaeafSAart Bik // x = broadcast w[0][0] : vector<2xf32> to vector <2x2xf32> 209b36aaeafSAart Bik // y = broadcast w[1][0] : vector<2xf32> to vector <2x2xf32> 210b36aaeafSAart Bik // a = [x, y] 211b36aaeafSAart Bik // etc. 212b36aaeafSAart Bik Value *stretchOneRank(Value *value, Location loc, VectorType srcVectorType, 213b36aaeafSAart Bik VectorType dstVectorType, int64_t rank, int64_t dim, 214b36aaeafSAart Bik ConversionPatternRewriter &rewriter) const { 215b36aaeafSAart Bik Type llvmType = lowering.convertType(dstVectorType); 216b36aaeafSAart Bik assert((llvmType != nullptr) && "unlowerable vector type"); 217b36aaeafSAart Bik Value *result = rewriter.create<LLVM::UndefOp>(loc, llvmType); 218b36aaeafSAart Bik bool atStretch = dim != srcVectorType.getDimSize(0); 219b36aaeafSAart Bik if (rank == 1) { 220*1c81adf3SAart Bik assert(atStretch); 221b36aaeafSAart Bik Type redLlvmType = lowering.convertType(dstVectorType.getElementType()); 222*1c81adf3SAart Bik Value *one = 223*1c81adf3SAart Bik extractOne(rewriter, lowering, loc, value, redLlvmType, rank, 0); 224b36aaeafSAart Bik Value *expand = 225*1c81adf3SAart Bik insertOne(rewriter, lowering, loc, result, one, llvmType, rank, 0); 226b36aaeafSAart Bik SmallVector<int32_t, 4> zeroValues(dim, 0); 227b36aaeafSAart Bik return rewriter.create<LLVM::ShuffleVectorOp>( 228b36aaeafSAart Bik loc, expand, result, rewriter.getI32ArrayAttr(zeroValues)); 229b36aaeafSAart Bik } 2309826fe5cSAart Bik VectorType redSrcType = reducedVectorTypeFront(srcVectorType); 2319826fe5cSAart Bik VectorType redDstType = reducedVectorTypeFront(dstVectorType); 232b36aaeafSAart Bik Type redLlvmType = lowering.convertType(redSrcType); 233b36aaeafSAart Bik for (int64_t d = 0; d < dim; ++d) { 234b36aaeafSAart Bik int64_t pos = atStretch ? 0 : d; 235*1c81adf3SAart Bik Value *one = 236*1c81adf3SAart Bik extractOne(rewriter, lowering, loc, value, redLlvmType, rank, pos); 237b36aaeafSAart Bik Value *expand = expandRanks(one, loc, redSrcType, redDstType, rewriter); 238*1c81adf3SAart Bik result = 239*1c81adf3SAart Bik insertOne(rewriter, lowering, loc, result, expand, llvmType, rank, d); 240b36aaeafSAart Bik } 241b36aaeafSAart Bik return result; 242b36aaeafSAart Bik } 243*1c81adf3SAart Bik }; 244b36aaeafSAart Bik 245*1c81adf3SAart Bik class VectorShuffleOpConversion : public LLVMOpLowering { 246*1c81adf3SAart Bik public: 247*1c81adf3SAart Bik explicit VectorShuffleOpConversion(MLIRContext *context, 248*1c81adf3SAart Bik LLVMTypeConverter &typeConverter) 249*1c81adf3SAart Bik : LLVMOpLowering(vector::ShuffleOp::getOperationName(), context, 250*1c81adf3SAart Bik typeConverter) {} 251*1c81adf3SAart Bik 252*1c81adf3SAart Bik PatternMatchResult 253*1c81adf3SAart Bik matchAndRewrite(Operation *op, ArrayRef<Value *> operands, 254*1c81adf3SAart Bik ConversionPatternRewriter &rewriter) const override { 255*1c81adf3SAart Bik auto loc = op->getLoc(); 256*1c81adf3SAart Bik auto adaptor = vector::ShuffleOpOperandAdaptor(operands); 257*1c81adf3SAart Bik auto shuffleOp = cast<vector::ShuffleOp>(op); 258*1c81adf3SAart Bik auto v1Type = shuffleOp.getV1VectorType(); 259*1c81adf3SAart Bik auto v2Type = shuffleOp.getV2VectorType(); 260*1c81adf3SAart Bik auto vectorType = shuffleOp.getVectorType(); 261*1c81adf3SAart Bik Type llvmType = lowering.convertType(vectorType); 262*1c81adf3SAart Bik auto maskArrayAttr = shuffleOp.mask(); 263*1c81adf3SAart Bik 264*1c81adf3SAart Bik // Bail if result type cannot be lowered. 265*1c81adf3SAart Bik if (!llvmType) 266*1c81adf3SAart Bik return matchFailure(); 267*1c81adf3SAart Bik 268*1c81adf3SAart Bik // Get rank and dimension sizes. 269*1c81adf3SAart Bik int64_t rank = vectorType.getRank(); 270*1c81adf3SAart Bik assert(v1Type.getRank() == rank); 271*1c81adf3SAart Bik assert(v2Type.getRank() == rank); 272*1c81adf3SAart Bik int64_t v1Dim = v1Type.getDimSize(0); 273*1c81adf3SAart Bik 274*1c81adf3SAart Bik // For rank 1, where both operands have *exactly* the same vector type, 275*1c81adf3SAart Bik // there is direct shuffle support in LLVM. Use it! 276*1c81adf3SAart Bik if (rank == 1 && v1Type == v2Type) { 277*1c81adf3SAart Bik Value *shuffle = rewriter.create<LLVM::ShuffleVectorOp>( 278*1c81adf3SAart Bik loc, adaptor.v1(), adaptor.v2(), maskArrayAttr); 279*1c81adf3SAart Bik rewriter.replaceOp(op, shuffle); 280*1c81adf3SAart Bik return matchSuccess(); 281b36aaeafSAart Bik } 282b36aaeafSAart Bik 283*1c81adf3SAart Bik // For all other cases, insert the individual values individually. 284*1c81adf3SAart Bik Value *insert = rewriter.create<LLVM::UndefOp>(loc, llvmType); 285*1c81adf3SAart Bik int64_t insPos = 0; 286*1c81adf3SAart Bik for (auto en : llvm::enumerate(maskArrayAttr)) { 287*1c81adf3SAart Bik int64_t extPos = en.value().cast<IntegerAttr>().getInt(); 288*1c81adf3SAart Bik Value *value = adaptor.v1(); 289*1c81adf3SAart Bik if (extPos >= v1Dim) { 290*1c81adf3SAart Bik extPos -= v1Dim; 291*1c81adf3SAart Bik value = adaptor.v2(); 292b36aaeafSAart Bik } 293*1c81adf3SAart Bik Value *extract = 294*1c81adf3SAart Bik extractOne(rewriter, lowering, loc, value, llvmType, rank, extPos); 295*1c81adf3SAart Bik insert = insertOne(rewriter, lowering, loc, insert, extract, llvmType, 296*1c81adf3SAart Bik rank, insPos++); 297*1c81adf3SAart Bik } 298*1c81adf3SAart Bik rewriter.replaceOp(op, insert); 299*1c81adf3SAart Bik return matchSuccess(); 300b36aaeafSAart Bik } 301b36aaeafSAart Bik }; 302b36aaeafSAart Bik 3039826fe5cSAart Bik class VectorExtractOpConversion : public LLVMOpLowering { 3045c0c51a9SNicolas Vasilache public: 3059826fe5cSAart Bik explicit VectorExtractOpConversion(MLIRContext *context, 3065c0c51a9SNicolas Vasilache LLVMTypeConverter &typeConverter) 307d37f2725SAart Bik : LLVMOpLowering(vector::ExtractOp::getOperationName(), context, 3085c0c51a9SNicolas Vasilache typeConverter) {} 3095c0c51a9SNicolas Vasilache 3105c0c51a9SNicolas Vasilache PatternMatchResult 3115c0c51a9SNicolas Vasilache matchAndRewrite(Operation *op, ArrayRef<Value *> operands, 3125c0c51a9SNicolas Vasilache ConversionPatternRewriter &rewriter) const override { 3135c0c51a9SNicolas Vasilache auto loc = op->getLoc(); 314d37f2725SAart Bik auto adaptor = vector::ExtractOpOperandAdaptor(operands); 315d37f2725SAart Bik auto extractOp = cast<vector::ExtractOp>(op); 3169826fe5cSAart Bik auto vectorType = extractOp.getVectorType(); 3175c0c51a9SNicolas Vasilache auto resultType = extractOp.getResult()->getType(); 3185c0c51a9SNicolas Vasilache auto llvmResultType = lowering.convertType(resultType); 3195c0c51a9SNicolas Vasilache auto positionArrayAttr = extractOp.position(); 3209826fe5cSAart Bik 3219826fe5cSAart Bik // Bail if result type cannot be lowered. 3229826fe5cSAart Bik if (!llvmResultType) 3239826fe5cSAart Bik return matchFailure(); 3249826fe5cSAart Bik 3255c0c51a9SNicolas Vasilache // One-shot extraction of vector from array (only requires extractvalue). 3265c0c51a9SNicolas Vasilache if (resultType.isa<VectorType>()) { 3275c0c51a9SNicolas Vasilache Value *extracted = rewriter.create<LLVM::ExtractValueOp>( 3285c0c51a9SNicolas Vasilache loc, llvmResultType, adaptor.vector(), positionArrayAttr); 3295c0c51a9SNicolas Vasilache rewriter.replaceOp(op, extracted); 3305c0c51a9SNicolas Vasilache return matchSuccess(); 3315c0c51a9SNicolas Vasilache } 3325c0c51a9SNicolas Vasilache 3339826fe5cSAart Bik // Potential extraction of 1-D vector from array. 3345c0c51a9SNicolas Vasilache auto *context = op->getContext(); 3355c0c51a9SNicolas Vasilache Value *extracted = adaptor.vector(); 3365c0c51a9SNicolas Vasilache auto positionAttrs = positionArrayAttr.getValue(); 3375c0c51a9SNicolas Vasilache if (positionAttrs.size() > 1) { 3389826fe5cSAart Bik auto oneDVectorType = reducedVectorTypeBack(vectorType); 3395c0c51a9SNicolas Vasilache auto nMinusOnePositionAttrs = 3405c0c51a9SNicolas Vasilache ArrayAttr::get(positionAttrs.drop_back(), context); 3415c0c51a9SNicolas Vasilache extracted = rewriter.create<LLVM::ExtractValueOp>( 3425c0c51a9SNicolas Vasilache loc, lowering.convertType(oneDVectorType), extracted, 3435c0c51a9SNicolas Vasilache nMinusOnePositionAttrs); 3445c0c51a9SNicolas Vasilache } 3455c0c51a9SNicolas Vasilache 3465c0c51a9SNicolas Vasilache // Remaining extraction of element from 1-D LLVM vector 3475c0c51a9SNicolas Vasilache auto position = positionAttrs.back().cast<IntegerAttr>(); 3489826fe5cSAart Bik auto i32Type = LLVM::LLVMType::getInt32Ty(lowering.getDialect()); 3499826fe5cSAart Bik auto constant = rewriter.create<LLVM::ConstantOp>(loc, i32Type, position); 3505c0c51a9SNicolas Vasilache extracted = 3515c0c51a9SNicolas Vasilache rewriter.create<LLVM::ExtractElementOp>(loc, extracted, constant); 3525c0c51a9SNicolas Vasilache rewriter.replaceOp(op, extracted); 3535c0c51a9SNicolas Vasilache 3545c0c51a9SNicolas Vasilache return matchSuccess(); 3555c0c51a9SNicolas Vasilache } 3565c0c51a9SNicolas Vasilache }; 3575c0c51a9SNicolas Vasilache 3589826fe5cSAart Bik class VectorInsertOpConversion : public LLVMOpLowering { 3599826fe5cSAart Bik public: 3609826fe5cSAart Bik explicit VectorInsertOpConversion(MLIRContext *context, 3619826fe5cSAart Bik LLVMTypeConverter &typeConverter) 3629826fe5cSAart Bik : LLVMOpLowering(vector::InsertOp::getOperationName(), context, 3639826fe5cSAart Bik typeConverter) {} 3649826fe5cSAart Bik 3659826fe5cSAart Bik PatternMatchResult 3669826fe5cSAart Bik matchAndRewrite(Operation *op, ArrayRef<Value *> operands, 3679826fe5cSAart Bik ConversionPatternRewriter &rewriter) const override { 3689826fe5cSAart Bik auto loc = op->getLoc(); 3699826fe5cSAart Bik auto adaptor = vector::InsertOpOperandAdaptor(operands); 3709826fe5cSAart Bik auto insertOp = cast<vector::InsertOp>(op); 3719826fe5cSAart Bik auto sourceType = insertOp.getSourceType(); 3729826fe5cSAart Bik auto destVectorType = insertOp.getDestVectorType(); 3739826fe5cSAart Bik auto llvmResultType = lowering.convertType(destVectorType); 3749826fe5cSAart Bik auto positionArrayAttr = insertOp.position(); 3759826fe5cSAart Bik 3769826fe5cSAart Bik // Bail if result type cannot be lowered. 3779826fe5cSAart Bik if (!llvmResultType) 3789826fe5cSAart Bik return matchFailure(); 3799826fe5cSAart Bik 3809826fe5cSAart Bik // One-shot insertion of a vector into an array (only requires insertvalue). 3819826fe5cSAart Bik if (sourceType.isa<VectorType>()) { 3829826fe5cSAart Bik Value *inserted = rewriter.create<LLVM::InsertValueOp>( 3839826fe5cSAart Bik loc, llvmResultType, adaptor.dest(), adaptor.source(), 3849826fe5cSAart Bik positionArrayAttr); 3859826fe5cSAart Bik rewriter.replaceOp(op, inserted); 3869826fe5cSAart Bik return matchSuccess(); 3879826fe5cSAart Bik } 3889826fe5cSAart Bik 3899826fe5cSAart Bik // Potential extraction of 1-D vector from array. 3909826fe5cSAart Bik auto *context = op->getContext(); 3919826fe5cSAart Bik Value *extracted = adaptor.dest(); 3929826fe5cSAart Bik auto positionAttrs = positionArrayAttr.getValue(); 3939826fe5cSAart Bik auto position = positionAttrs.back().cast<IntegerAttr>(); 3949826fe5cSAart Bik auto oneDVectorType = destVectorType; 3959826fe5cSAart Bik if (positionAttrs.size() > 1) { 3969826fe5cSAart Bik oneDVectorType = reducedVectorTypeBack(destVectorType); 3979826fe5cSAart Bik auto nMinusOnePositionAttrs = 3989826fe5cSAart Bik ArrayAttr::get(positionAttrs.drop_back(), context); 3999826fe5cSAart Bik extracted = rewriter.create<LLVM::ExtractValueOp>( 4009826fe5cSAart Bik loc, lowering.convertType(oneDVectorType), extracted, 4019826fe5cSAart Bik nMinusOnePositionAttrs); 4029826fe5cSAart Bik } 4039826fe5cSAart Bik 4049826fe5cSAart Bik // Insertion of an element into a 1-D LLVM vector. 4059826fe5cSAart Bik auto i32Type = LLVM::LLVMType::getInt32Ty(lowering.getDialect()); 4069826fe5cSAart Bik auto constant = rewriter.create<LLVM::ConstantOp>(loc, i32Type, position); 4079826fe5cSAart Bik Value *inserted = rewriter.create<LLVM::InsertElementOp>( 4089826fe5cSAart Bik loc, lowering.convertType(oneDVectorType), extracted, adaptor.source(), 4099826fe5cSAart Bik constant); 4109826fe5cSAart Bik 4119826fe5cSAart Bik // Potential insertion of resulting 1-D vector into array. 4129826fe5cSAart Bik if (positionAttrs.size() > 1) { 4139826fe5cSAart Bik auto nMinusOnePositionAttrs = 4149826fe5cSAart Bik ArrayAttr::get(positionAttrs.drop_back(), context); 4159826fe5cSAart Bik inserted = rewriter.create<LLVM::InsertValueOp>(loc, llvmResultType, 4169826fe5cSAart Bik adaptor.dest(), inserted, 4179826fe5cSAart Bik nMinusOnePositionAttrs); 4189826fe5cSAart Bik } 4199826fe5cSAart Bik 4209826fe5cSAart Bik rewriter.replaceOp(op, inserted); 4219826fe5cSAart Bik return matchSuccess(); 4229826fe5cSAart Bik } 4239826fe5cSAart Bik }; 4249826fe5cSAart Bik 4255c0c51a9SNicolas Vasilache class VectorOuterProductOpConversion : public LLVMOpLowering { 4265c0c51a9SNicolas Vasilache public: 4275c0c51a9SNicolas Vasilache explicit VectorOuterProductOpConversion(MLIRContext *context, 4285c0c51a9SNicolas Vasilache LLVMTypeConverter &typeConverter) 4295c0c51a9SNicolas Vasilache : LLVMOpLowering(vector::OuterProductOp::getOperationName(), context, 4305c0c51a9SNicolas Vasilache typeConverter) {} 4315c0c51a9SNicolas Vasilache 4325c0c51a9SNicolas Vasilache PatternMatchResult 4335c0c51a9SNicolas Vasilache matchAndRewrite(Operation *op, ArrayRef<Value *> operands, 4345c0c51a9SNicolas Vasilache ConversionPatternRewriter &rewriter) const override { 4355c0c51a9SNicolas Vasilache auto loc = op->getLoc(); 4365c0c51a9SNicolas Vasilache auto adaptor = vector::OuterProductOpOperandAdaptor(operands); 4375c0c51a9SNicolas Vasilache auto *ctx = op->getContext(); 4385c0c51a9SNicolas Vasilache auto vLHS = adaptor.lhs()->getType().cast<LLVM::LLVMType>(); 4395c0c51a9SNicolas Vasilache auto vRHS = adaptor.rhs()->getType().cast<LLVM::LLVMType>(); 4405c0c51a9SNicolas Vasilache auto rankLHS = vLHS.getUnderlyingType()->getVectorNumElements(); 4415c0c51a9SNicolas Vasilache auto rankRHS = vRHS.getUnderlyingType()->getVectorNumElements(); 4425c0c51a9SNicolas Vasilache auto llvmArrayOfVectType = lowering.convertType( 4435c0c51a9SNicolas Vasilache cast<vector::OuterProductOp>(op).getResult()->getType()); 4445c0c51a9SNicolas Vasilache Value *desc = rewriter.create<LLVM::UndefOp>(loc, llvmArrayOfVectType); 4455c0c51a9SNicolas Vasilache Value *a = adaptor.lhs(), *b = adaptor.rhs(); 4465c0c51a9SNicolas Vasilache Value *acc = adaptor.acc().empty() ? nullptr : adaptor.acc().front(); 4475c0c51a9SNicolas Vasilache SmallVector<Value *, 8> lhs, accs; 4485c0c51a9SNicolas Vasilache lhs.reserve(rankLHS); 4495c0c51a9SNicolas Vasilache accs.reserve(rankLHS); 4505c0c51a9SNicolas Vasilache for (unsigned d = 0, e = rankLHS; d < e; ++d) { 4515c0c51a9SNicolas Vasilache // shufflevector explicitly requires i32. 4525c0c51a9SNicolas Vasilache auto attr = rewriter.getI32IntegerAttr(d); 4535c0c51a9SNicolas Vasilache SmallVector<Attribute, 4> bcastAttr(rankRHS, attr); 4545c0c51a9SNicolas Vasilache auto bcastArrayAttr = ArrayAttr::get(bcastAttr, ctx); 4555c0c51a9SNicolas Vasilache Value *aD = nullptr, *accD = nullptr; 4565c0c51a9SNicolas Vasilache // 1. Broadcast the element a[d] into vector aD. 4575c0c51a9SNicolas Vasilache aD = rewriter.create<LLVM::ShuffleVectorOp>(loc, a, a, bcastArrayAttr); 4585c0c51a9SNicolas Vasilache // 2. If acc is present, extract 1-d vector acc[d] into accD. 4595c0c51a9SNicolas Vasilache if (acc) 4605c0c51a9SNicolas Vasilache accD = rewriter.create<LLVM::ExtractValueOp>( 4615c0c51a9SNicolas Vasilache loc, vRHS, acc, rewriter.getI64ArrayAttr(d)); 4625c0c51a9SNicolas Vasilache // 3. Compute aD outer b (plus accD, if relevant). 4635c0c51a9SNicolas Vasilache Value *aOuterbD = 4645c0c51a9SNicolas Vasilache accD ? rewriter.create<LLVM::FMulAddOp>(loc, vRHS, aD, b, accD) 4655c0c51a9SNicolas Vasilache .getResult() 4665c0c51a9SNicolas Vasilache : rewriter.create<LLVM::FMulOp>(loc, aD, b).getResult(); 4675c0c51a9SNicolas Vasilache // 4. Insert as value `d` in the descriptor. 4685c0c51a9SNicolas Vasilache desc = rewriter.create<LLVM::InsertValueOp>(loc, llvmArrayOfVectType, 4695c0c51a9SNicolas Vasilache desc, aOuterbD, 4705c0c51a9SNicolas Vasilache rewriter.getI64ArrayAttr(d)); 4715c0c51a9SNicolas Vasilache } 4725c0c51a9SNicolas Vasilache rewriter.replaceOp(op, desc); 4735c0c51a9SNicolas Vasilache return matchSuccess(); 4745c0c51a9SNicolas Vasilache } 4755c0c51a9SNicolas Vasilache }; 4765c0c51a9SNicolas Vasilache 4775c0c51a9SNicolas Vasilache class VectorTypeCastOpConversion : public LLVMOpLowering { 4785c0c51a9SNicolas Vasilache public: 4795c0c51a9SNicolas Vasilache explicit VectorTypeCastOpConversion(MLIRContext *context, 4805c0c51a9SNicolas Vasilache LLVMTypeConverter &typeConverter) 4815c0c51a9SNicolas Vasilache : LLVMOpLowering(vector::TypeCastOp::getOperationName(), context, 4825c0c51a9SNicolas Vasilache typeConverter) {} 4835c0c51a9SNicolas Vasilache 4845c0c51a9SNicolas Vasilache PatternMatchResult 4855c0c51a9SNicolas Vasilache matchAndRewrite(Operation *op, ArrayRef<Value *> operands, 4865c0c51a9SNicolas Vasilache ConversionPatternRewriter &rewriter) const override { 4875c0c51a9SNicolas Vasilache auto loc = op->getLoc(); 4885c0c51a9SNicolas Vasilache vector::TypeCastOp castOp = cast<vector::TypeCastOp>(op); 4895c0c51a9SNicolas Vasilache MemRefType sourceMemRefType = 4905c0c51a9SNicolas Vasilache castOp.getOperand()->getType().cast<MemRefType>(); 4915c0c51a9SNicolas Vasilache MemRefType targetMemRefType = 4925c0c51a9SNicolas Vasilache castOp.getResult()->getType().cast<MemRefType>(); 4935c0c51a9SNicolas Vasilache 4945c0c51a9SNicolas Vasilache // Only static shape casts supported atm. 4955c0c51a9SNicolas Vasilache if (!sourceMemRefType.hasStaticShape() || 4965c0c51a9SNicolas Vasilache !targetMemRefType.hasStaticShape()) 4975c0c51a9SNicolas Vasilache return matchFailure(); 4985c0c51a9SNicolas Vasilache 4995c0c51a9SNicolas Vasilache auto llvmSourceDescriptorTy = 5005c0c51a9SNicolas Vasilache operands[0]->getType().dyn_cast<LLVM::LLVMType>(); 5015c0c51a9SNicolas Vasilache if (!llvmSourceDescriptorTy || !llvmSourceDescriptorTy.isStructTy()) 5025c0c51a9SNicolas Vasilache return matchFailure(); 5035c0c51a9SNicolas Vasilache MemRefDescriptor sourceMemRef(operands[0]); 5045c0c51a9SNicolas Vasilache 5055c0c51a9SNicolas Vasilache auto llvmTargetDescriptorTy = lowering.convertType(targetMemRefType) 5065c0c51a9SNicolas Vasilache .dyn_cast_or_null<LLVM::LLVMType>(); 5075c0c51a9SNicolas Vasilache if (!llvmTargetDescriptorTy || !llvmTargetDescriptorTy.isStructTy()) 5085c0c51a9SNicolas Vasilache return matchFailure(); 5095c0c51a9SNicolas Vasilache 5105c0c51a9SNicolas Vasilache int64_t offset; 5115c0c51a9SNicolas Vasilache SmallVector<int64_t, 4> strides; 5125c0c51a9SNicolas Vasilache auto successStrides = 5135c0c51a9SNicolas Vasilache getStridesAndOffset(sourceMemRefType, strides, offset); 5145c0c51a9SNicolas Vasilache bool isContiguous = (strides.back() == 1); 5155c0c51a9SNicolas Vasilache if (isContiguous) { 5165c0c51a9SNicolas Vasilache auto sizes = sourceMemRefType.getShape(); 5175c0c51a9SNicolas Vasilache for (int index = 0, e = strides.size() - 2; index < e; ++index) { 5185c0c51a9SNicolas Vasilache if (strides[index] != strides[index + 1] * sizes[index + 1]) { 5195c0c51a9SNicolas Vasilache isContiguous = false; 5205c0c51a9SNicolas Vasilache break; 5215c0c51a9SNicolas Vasilache } 5225c0c51a9SNicolas Vasilache } 5235c0c51a9SNicolas Vasilache } 5245c0c51a9SNicolas Vasilache // Only contiguous source tensors supported atm. 5255c0c51a9SNicolas Vasilache if (failed(successStrides) || !isContiguous) 5265c0c51a9SNicolas Vasilache return matchFailure(); 5275c0c51a9SNicolas Vasilache 5285c0c51a9SNicolas Vasilache auto int64Ty = LLVM::LLVMType::getInt64Ty(lowering.getDialect()); 5295c0c51a9SNicolas Vasilache 5305c0c51a9SNicolas Vasilache // Create descriptor. 5315c0c51a9SNicolas Vasilache auto desc = MemRefDescriptor::undef(rewriter, loc, llvmTargetDescriptorTy); 5325c0c51a9SNicolas Vasilache Type llvmTargetElementTy = desc.getElementType(); 5335c0c51a9SNicolas Vasilache // Set allocated ptr. 5345c0c51a9SNicolas Vasilache Value *allocated = sourceMemRef.allocatedPtr(rewriter, loc); 5355c0c51a9SNicolas Vasilache allocated = 5365c0c51a9SNicolas Vasilache rewriter.create<LLVM::BitcastOp>(loc, llvmTargetElementTy, allocated); 5375c0c51a9SNicolas Vasilache desc.setAllocatedPtr(rewriter, loc, allocated); 5385c0c51a9SNicolas Vasilache // Set aligned ptr. 5395c0c51a9SNicolas Vasilache Value *ptr = sourceMemRef.alignedPtr(rewriter, loc); 5405c0c51a9SNicolas Vasilache ptr = rewriter.create<LLVM::BitcastOp>(loc, llvmTargetElementTy, ptr); 5415c0c51a9SNicolas Vasilache desc.setAlignedPtr(rewriter, loc, ptr); 5425c0c51a9SNicolas Vasilache // Fill offset 0. 5435c0c51a9SNicolas Vasilache auto attr = rewriter.getIntegerAttr(rewriter.getIndexType(), 0); 5445c0c51a9SNicolas Vasilache auto zero = rewriter.create<LLVM::ConstantOp>(loc, int64Ty, attr); 5455c0c51a9SNicolas Vasilache desc.setOffset(rewriter, loc, zero); 5465c0c51a9SNicolas Vasilache 5475c0c51a9SNicolas Vasilache // Fill size and stride descriptors in memref. 5485c0c51a9SNicolas Vasilache for (auto indexedSize : llvm::enumerate(targetMemRefType.getShape())) { 5495c0c51a9SNicolas Vasilache int64_t index = indexedSize.index(); 5505c0c51a9SNicolas Vasilache auto sizeAttr = 5515c0c51a9SNicolas Vasilache rewriter.getIntegerAttr(rewriter.getIndexType(), indexedSize.value()); 5525c0c51a9SNicolas Vasilache auto size = rewriter.create<LLVM::ConstantOp>(loc, int64Ty, sizeAttr); 5535c0c51a9SNicolas Vasilache desc.setSize(rewriter, loc, index, size); 5545c0c51a9SNicolas Vasilache auto strideAttr = 5555c0c51a9SNicolas Vasilache rewriter.getIntegerAttr(rewriter.getIndexType(), strides[index]); 5565c0c51a9SNicolas Vasilache auto stride = rewriter.create<LLVM::ConstantOp>(loc, int64Ty, strideAttr); 5575c0c51a9SNicolas Vasilache desc.setStride(rewriter, loc, index, stride); 5585c0c51a9SNicolas Vasilache } 5595c0c51a9SNicolas Vasilache 5605c0c51a9SNicolas Vasilache rewriter.replaceOp(op, {desc}); 5615c0c51a9SNicolas Vasilache return matchSuccess(); 5625c0c51a9SNicolas Vasilache } 5635c0c51a9SNicolas Vasilache }; 5645c0c51a9SNicolas Vasilache 5655c0c51a9SNicolas Vasilache /// Populate the given list with patterns that convert from Vector to LLVM. 5665c0c51a9SNicolas Vasilache void mlir::populateVectorToLLVMConversionPatterns( 5675c0c51a9SNicolas Vasilache LLVMTypeConverter &converter, OwningRewritePatternList &patterns) { 568*1c81adf3SAart Bik patterns.insert<VectorBroadcastOpConversion, VectorShuffleOpConversion, 569*1c81adf3SAart Bik VectorExtractOpConversion, VectorInsertOpConversion, 570*1c81adf3SAart Bik VectorOuterProductOpConversion, VectorTypeCastOpConversion>( 5715c0c51a9SNicolas Vasilache converter.getDialect()->getContext(), converter); 5725c0c51a9SNicolas Vasilache } 5735c0c51a9SNicolas Vasilache 5745c0c51a9SNicolas Vasilache namespace { 5755c0c51a9SNicolas Vasilache struct LowerVectorToLLVMPass : public ModulePass<LowerVectorToLLVMPass> { 5765c0c51a9SNicolas Vasilache void runOnModule() override; 5775c0c51a9SNicolas Vasilache }; 5785c0c51a9SNicolas Vasilache } // namespace 5795c0c51a9SNicolas Vasilache 5805c0c51a9SNicolas Vasilache void LowerVectorToLLVMPass::runOnModule() { 5815c0c51a9SNicolas Vasilache // Convert to the LLVM IR dialect using the converter defined above. 5825c0c51a9SNicolas Vasilache OwningRewritePatternList patterns; 5835c0c51a9SNicolas Vasilache LLVMTypeConverter converter(&getContext()); 5845c0c51a9SNicolas Vasilache populateVectorToLLVMConversionPatterns(converter, patterns); 5855c0c51a9SNicolas Vasilache populateStdToLLVMConversionPatterns(converter, patterns); 5865c0c51a9SNicolas Vasilache 5875c0c51a9SNicolas Vasilache ConversionTarget target(getContext()); 5885c0c51a9SNicolas Vasilache target.addLegalDialect<LLVM::LLVMDialect>(); 5895c0c51a9SNicolas Vasilache target.addDynamicallyLegalOp<FuncOp>( 5905c0c51a9SNicolas Vasilache [&](FuncOp op) { return converter.isSignatureLegal(op.getType()); }); 5915c0c51a9SNicolas Vasilache if (failed( 5925c0c51a9SNicolas Vasilache applyPartialConversion(getModule(), target, patterns, &converter))) { 5935c0c51a9SNicolas Vasilache signalPassFailure(); 5945c0c51a9SNicolas Vasilache } 5955c0c51a9SNicolas Vasilache } 5965c0c51a9SNicolas Vasilache 5975c0c51a9SNicolas Vasilache OpPassBase<ModuleOp> *mlir::createLowerVectorToLLVMPass() { 5985c0c51a9SNicolas Vasilache return new LowerVectorToLLVMPass(); 5995c0c51a9SNicolas Vasilache } 6005c0c51a9SNicolas Vasilache 6015c0c51a9SNicolas Vasilache static PassRegistration<LowerVectorToLLVMPass> 6025c0c51a9SNicolas Vasilache pass("convert-vector-to-llvm", 6035c0c51a9SNicolas Vasilache "Lower the operations from the vector dialect into the LLVM dialect"); 604