1 //===- TableGen.cpp - Top-Level TableGen implementation for LLVM ----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the main function for LLVM's TableGen.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "TableGenBackends.h" // Declares all backends.
14 #include "llvm/Support/CommandLine.h"
15 #include "llvm/Support/InitLLVM.h"
16 #include "llvm/TableGen/Main.h"
17 #include "llvm/TableGen/Record.h"
18 #include "llvm/TableGen/SetTheory.h"
19 
20 using namespace llvm;
21 
22 enum ActionType {
23   PrintRecords,
24   PrintDetailedRecords,
25   NullBackend,
26   DumpJSON,
27   GenEmitter,
28   GenCodeBeads,
29   GenRegisterInfo,
30   GenInstrInfo,
31   GenInstrDocs,
32   GenAsmWriter,
33   GenAsmMatcher,
34   GenDisassembler,
35   GenPseudoLowering,
36   GenCompressInst,
37   GenCallingConv,
38   GenDAGISel,
39   GenDFAPacketizer,
40   GenFastISel,
41   GenSubtarget,
42   GenIntrinsicEnums,
43   GenIntrinsicImpl,
44   PrintEnums,
45   PrintSets,
46   GenOptParserDefs,
47   GenOptRST,
48   GenCTags,
49   GenAttributes,
50   GenSearchableTables,
51   GenGlobalISel,
52   GenGICombiner,
53   GenX86EVEX2VEXTables,
54   GenX86FoldTables,
55   GenX86MnemonicTables,
56   GenRegisterBank,
57   GenExegesis,
58   GenAutomata,
59   GenDirectivesEnumDecl,
60   GenDirectivesEnumImpl,
61 };
62 
63 namespace llvm {
64 cl::opt<bool> EmitLongStrLiterals(
65     "long-string-literals",
66     cl::desc("when emitting large string tables, prefer string literals over "
67              "comma-separated char literals. This can be a readability and "
68              "compile-time performance win, but upsets some compilers"),
69     cl::Hidden, cl::init(true));
70 } // end namespace llvm
71 
72 namespace {
73 cl::opt<ActionType> Action(
74     cl::desc("Action to perform:"),
75     cl::values(
76         clEnumValN(PrintRecords, "print-records",
77                    "Print all records to stdout (default)"),
78         clEnumValN(PrintDetailedRecords, "print-detailed-records",
79                    "Print full details of all records to stdout"),
80         clEnumValN(NullBackend, "null-backend",
81                    "Do nothing after parsing (useful for timing)"),
82         clEnumValN(DumpJSON, "dump-json",
83                    "Dump all records as machine-readable JSON"),
84         clEnumValN(GenEmitter, "gen-emitter", "Generate machine code emitter"),
85         clEnumValN(GenCodeBeads, "gen-code-beads",
86                    "Generate machine code beads"),
87         clEnumValN(GenRegisterInfo, "gen-register-info",
88                    "Generate registers and register classes info"),
89         clEnumValN(GenInstrInfo, "gen-instr-info",
90                    "Generate instruction descriptions"),
91         clEnumValN(GenInstrDocs, "gen-instr-docs",
92                    "Generate instruction documentation"),
93         clEnumValN(GenCallingConv, "gen-callingconv",
94                    "Generate calling convention descriptions"),
95         clEnumValN(GenAsmWriter, "gen-asm-writer", "Generate assembly writer"),
96         clEnumValN(GenDisassembler, "gen-disassembler",
97                    "Generate disassembler"),
98         clEnumValN(GenPseudoLowering, "gen-pseudo-lowering",
99                    "Generate pseudo instruction lowering"),
100         clEnumValN(GenCompressInst, "gen-compress-inst-emitter",
101                    "Generate RISCV compressed instructions."),
102         clEnumValN(GenAsmMatcher, "gen-asm-matcher",
103                    "Generate assembly instruction matcher"),
104         clEnumValN(GenDAGISel, "gen-dag-isel",
105                    "Generate a DAG instruction selector"),
106         clEnumValN(GenDFAPacketizer, "gen-dfa-packetizer",
107                    "Generate DFA Packetizer for VLIW targets"),
108         clEnumValN(GenFastISel, "gen-fast-isel",
109                    "Generate a \"fast\" instruction selector"),
110         clEnumValN(GenSubtarget, "gen-subtarget",
111                    "Generate subtarget enumerations"),
112         clEnumValN(GenIntrinsicEnums, "gen-intrinsic-enums",
113                    "Generate intrinsic enums"),
114         clEnumValN(GenIntrinsicImpl, "gen-intrinsic-impl",
115                    "Generate intrinsic information"),
116         clEnumValN(PrintEnums, "print-enums", "Print enum values for a class"),
117         clEnumValN(PrintSets, "print-sets",
118                    "Print expanded sets for testing DAG exprs"),
119         clEnumValN(GenOptParserDefs, "gen-opt-parser-defs",
120                    "Generate option definitions"),
121         clEnumValN(GenOptRST, "gen-opt-rst", "Generate option RST"),
122         clEnumValN(GenCTags, "gen-ctags", "Generate ctags-compatible index"),
123         clEnumValN(GenAttributes, "gen-attrs", "Generate attributes"),
124         clEnumValN(GenSearchableTables, "gen-searchable-tables",
125                    "Generate generic binary-searchable table"),
126         clEnumValN(GenGlobalISel, "gen-global-isel",
127                    "Generate GlobalISel selector"),
128         clEnumValN(GenGICombiner, "gen-global-isel-combiner",
129                    "Generate GlobalISel combiner"),
130         clEnumValN(GenX86EVEX2VEXTables, "gen-x86-EVEX2VEX-tables",
131                    "Generate X86 EVEX to VEX compress tables"),
132         clEnumValN(GenX86FoldTables, "gen-x86-fold-tables",
133                    "Generate X86 fold tables"),
134         clEnumValN(GenX86MnemonicTables, "gen-x86-mnemonic-tables",
135                    "Generate X86 mnemonic tables"),
136         clEnumValN(GenRegisterBank, "gen-register-bank",
137                    "Generate registers bank descriptions"),
138         clEnumValN(GenExegesis, "gen-exegesis",
139                    "Generate llvm-exegesis tables"),
140         clEnumValN(GenAutomata, "gen-automata", "Generate generic automata"),
141         clEnumValN(GenDirectivesEnumDecl, "gen-directive-decl",
142                    "Generate directive related declaration code (header file)"),
143         clEnumValN(GenDirectivesEnumImpl, "gen-directive-impl",
144                    "Generate directive related implementation code")));
145 
146 cl::OptionCategory PrintEnumsCat("Options for -print-enums");
147 cl::opt<std::string> Class("class", cl::desc("Print Enum list for this class"),
148                            cl::value_desc("class name"),
149                            cl::cat(PrintEnumsCat));
150 
151 bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) {
152   switch (Action) {
153   case PrintRecords:
154     OS << Records;              // No argument, dump all contents
155     break;
156   case PrintDetailedRecords:
157     EmitDetailedRecords(Records, OS);
158     break;
159   case NullBackend:             // No backend at all.
160     break;
161   case DumpJSON:
162     EmitJSON(Records, OS);
163     break;
164   case GenEmitter:
165     EmitCodeEmitter(Records, OS);
166     break;
167   case GenCodeBeads:
168     EmitCodeBeads(Records, OS);
169     break;
170   case GenRegisterInfo:
171     EmitRegisterInfo(Records, OS);
172     break;
173   case GenInstrInfo:
174     EmitInstrInfo(Records, OS);
175     break;
176   case GenInstrDocs:
177     EmitInstrDocs(Records, OS);
178     break;
179   case GenCallingConv:
180     EmitCallingConv(Records, OS);
181     break;
182   case GenAsmWriter:
183     EmitAsmWriter(Records, OS);
184     break;
185   case GenAsmMatcher:
186     EmitAsmMatcher(Records, OS);
187     break;
188   case GenDisassembler:
189     EmitDisassembler(Records, OS);
190     break;
191   case GenPseudoLowering:
192     EmitPseudoLowering(Records, OS);
193     break;
194   case GenCompressInst:
195     EmitCompressInst(Records, OS);
196     break;
197   case GenDAGISel:
198     EmitDAGISel(Records, OS);
199     break;
200   case GenDFAPacketizer:
201     EmitDFAPacketizer(Records, OS);
202     break;
203   case GenFastISel:
204     EmitFastISel(Records, OS);
205     break;
206   case GenSubtarget:
207     EmitSubtarget(Records, OS);
208     break;
209   case GenIntrinsicEnums:
210     EmitIntrinsicEnums(Records, OS);
211     break;
212   case GenIntrinsicImpl:
213     EmitIntrinsicImpl(Records, OS);
214     break;
215   case GenOptParserDefs:
216     EmitOptParser(Records, OS);
217     break;
218   case GenOptRST:
219     EmitOptRST(Records, OS);
220     break;
221   case PrintEnums:
222   {
223     for (Record *Rec : Records.getAllDerivedDefinitions(Class))
224       OS << Rec->getName() << ", ";
225     OS << "\n";
226     break;
227   }
228   case PrintSets:
229   {
230     SetTheory Sets;
231     Sets.addFieldExpander("Set", "Elements");
232     for (Record *Rec : Records.getAllDerivedDefinitions("Set")) {
233       OS << Rec->getName() << " = [";
234       const std::vector<Record*> *Elts = Sets.expand(Rec);
235       assert(Elts && "Couldn't expand Set instance");
236       for (Record *Elt : *Elts)
237         OS << ' ' << Elt->getName();
238       OS << " ]\n";
239     }
240     break;
241   }
242   case GenCTags:
243     EmitCTags(Records, OS);
244     break;
245   case GenAttributes:
246     EmitAttributes(Records, OS);
247     break;
248   case GenSearchableTables:
249     EmitSearchableTables(Records, OS);
250     break;
251   case GenGlobalISel:
252     EmitGlobalISel(Records, OS);
253     break;
254   case GenGICombiner:
255     EmitGICombiner(Records, OS);
256     break;
257   case GenRegisterBank:
258     EmitRegisterBank(Records, OS);
259     break;
260   case GenX86EVEX2VEXTables:
261     EmitX86EVEX2VEXTables(Records, OS);
262     break;
263   case GenX86MnemonicTables:
264     EmitX86MnemonicTables(Records, OS);
265     break;
266   case GenX86FoldTables:
267     EmitX86FoldTables(Records, OS);
268     break;
269   case GenExegesis:
270     EmitExegesis(Records, OS);
271     break;
272   case GenAutomata:
273     EmitAutomata(Records, OS);
274     break;
275   case GenDirectivesEnumDecl:
276     EmitDirectivesDecl(Records, OS);
277     break;
278   case GenDirectivesEnumImpl:
279     EmitDirectivesImpl(Records, OS);
280     break;
281   }
282 
283   return false;
284 }
285 }
286 
287 int main(int argc, char **argv) {
288   InitLLVM X(argc, argv);
289   cl::ParseCommandLineOptions(argc, argv);
290 
291   return TableGenMain(argv[0], &LLVMTableGenMain);
292 }
293 
294 #ifndef __has_feature
295 #define __has_feature(x) 0
296 #endif
297 
298 #if __has_feature(address_sanitizer) ||                                        \
299     (defined(__SANITIZE_ADDRESS__) && defined(__GNUC__)) ||                    \
300     __has_feature(leak_sanitizer)
301 
302 #include <sanitizer/lsan_interface.h>
303 // Disable LeakSanitizer for this binary as it has too many leaks that are not
304 // very interesting to fix. See compiler-rt/include/sanitizer/lsan_interface.h .
305 LLVM_ATTRIBUTE_USED int __lsan_is_turned_off() { return 1; }
306 
307 #endif
308