1 //===- TableGen.cpp - Top-Level TableGen implementation for LLVM ----------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the main function for LLVM's TableGen. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "TableGenBackends.h" // Declares all backends. 15 #include "llvm/Support/CommandLine.h" 16 #include "llvm/Support/ManagedStatic.h" 17 #include "llvm/Support/PrettyStackTrace.h" 18 #include "llvm/Support/Signals.h" 19 #include "llvm/TableGen/Main.h" 20 #include "llvm/TableGen/Record.h" 21 #include "llvm/TableGen/SetTheory.h" 22 23 using namespace llvm; 24 25 enum ActionType { 26 PrintRecords, 27 GenEmitter, 28 GenRegisterInfo, 29 GenInstrInfo, 30 GenInstrDocs, 31 GenAsmWriter, 32 GenAsmMatcher, 33 GenDisassembler, 34 GenPseudoLowering, 35 GenCallingConv, 36 GenDAGISel, 37 GenDFAPacketizer, 38 GenFastISel, 39 GenSubtarget, 40 GenIntrinsic, 41 GenTgtIntrinsic, 42 PrintEnums, 43 PrintSets, 44 GenOptParserDefs, 45 GenCTags, 46 GenAttributes, 47 GenSearchableTables, 48 GenGlobalISel, 49 GenX86EVEX2VEXTables, 50 GenX86FoldTables, 51 GenRegisterBank, 52 }; 53 54 namespace { 55 cl::opt<ActionType> 56 Action(cl::desc("Action to perform:"), 57 cl::values(clEnumValN(PrintRecords, "print-records", 58 "Print all records to stdout (default)"), 59 clEnumValN(GenEmitter, "gen-emitter", 60 "Generate machine code emitter"), 61 clEnumValN(GenRegisterInfo, "gen-register-info", 62 "Generate registers and register classes info"), 63 clEnumValN(GenInstrInfo, "gen-instr-info", 64 "Generate instruction descriptions"), 65 clEnumValN(GenInstrDocs, "gen-instr-docs", 66 "Generate instruction documentation"), 67 clEnumValN(GenCallingConv, "gen-callingconv", 68 "Generate calling convention descriptions"), 69 clEnumValN(GenAsmWriter, "gen-asm-writer", 70 "Generate assembly writer"), 71 clEnumValN(GenDisassembler, "gen-disassembler", 72 "Generate disassembler"), 73 clEnumValN(GenPseudoLowering, "gen-pseudo-lowering", 74 "Generate pseudo instruction lowering"), 75 clEnumValN(GenAsmMatcher, "gen-asm-matcher", 76 "Generate assembly instruction matcher"), 77 clEnumValN(GenDAGISel, "gen-dag-isel", 78 "Generate a DAG instruction selector"), 79 clEnumValN(GenDFAPacketizer, "gen-dfa-packetizer", 80 "Generate DFA Packetizer for VLIW targets"), 81 clEnumValN(GenFastISel, "gen-fast-isel", 82 "Generate a \"fast\" instruction selector"), 83 clEnumValN(GenSubtarget, "gen-subtarget", 84 "Generate subtarget enumerations"), 85 clEnumValN(GenIntrinsic, "gen-intrinsic", 86 "Generate intrinsic information"), 87 clEnumValN(GenTgtIntrinsic, "gen-tgt-intrinsic", 88 "Generate target intrinsic information"), 89 clEnumValN(PrintEnums, "print-enums", 90 "Print enum values for a class"), 91 clEnumValN(PrintSets, "print-sets", 92 "Print expanded sets for testing DAG exprs"), 93 clEnumValN(GenOptParserDefs, "gen-opt-parser-defs", 94 "Generate option definitions"), 95 clEnumValN(GenCTags, "gen-ctags", 96 "Generate ctags-compatible index"), 97 clEnumValN(GenAttributes, "gen-attrs", 98 "Generate attributes"), 99 clEnumValN(GenSearchableTables, "gen-searchable-tables", 100 "Generate generic binary-searchable table"), 101 clEnumValN(GenGlobalISel, "gen-global-isel", 102 "Generate GlobalISel selector"), 103 clEnumValN(GenX86EVEX2VEXTables, "gen-x86-EVEX2VEX-tables", 104 "Generate X86 EVEX to VEX compress tables"), 105 clEnumValN(GenX86FoldTables, "gen-x86-fold-tables", 106 "Generate X86 fold tables"), 107 clEnumValN(GenRegisterBank, "gen-register-bank", 108 "Generate registers bank descriptions"))); 109 110 cl::OptionCategory PrintEnumsCat("Options for -print-enums"); 111 cl::opt<std::string> 112 Class("class", cl::desc("Print Enum list for this class"), 113 cl::value_desc("class name"), cl::cat(PrintEnumsCat)); 114 115 bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) { 116 switch (Action) { 117 case PrintRecords: 118 OS << Records; // No argument, dump all contents 119 break; 120 case GenEmitter: 121 EmitCodeEmitter(Records, OS); 122 break; 123 case GenRegisterInfo: 124 EmitRegisterInfo(Records, OS); 125 break; 126 case GenInstrInfo: 127 EmitInstrInfo(Records, OS); 128 break; 129 case GenInstrDocs: 130 EmitInstrDocs(Records, OS); 131 break; 132 case GenCallingConv: 133 EmitCallingConv(Records, OS); 134 break; 135 case GenAsmWriter: 136 EmitAsmWriter(Records, OS); 137 break; 138 case GenAsmMatcher: 139 EmitAsmMatcher(Records, OS); 140 break; 141 case GenDisassembler: 142 EmitDisassembler(Records, OS); 143 break; 144 case GenPseudoLowering: 145 EmitPseudoLowering(Records, OS); 146 break; 147 case GenDAGISel: 148 EmitDAGISel(Records, OS); 149 break; 150 case GenDFAPacketizer: 151 EmitDFAPacketizer(Records, OS); 152 break; 153 case GenFastISel: 154 EmitFastISel(Records, OS); 155 break; 156 case GenSubtarget: 157 EmitSubtarget(Records, OS); 158 break; 159 case GenIntrinsic: 160 EmitIntrinsics(Records, OS); 161 break; 162 case GenTgtIntrinsic: 163 EmitIntrinsics(Records, OS, true); 164 break; 165 case GenOptParserDefs: 166 EmitOptParser(Records, OS); 167 break; 168 case PrintEnums: 169 { 170 for (Record *Rec : Records.getAllDerivedDefinitions(Class)) 171 OS << Rec->getName() << ", "; 172 OS << "\n"; 173 break; 174 } 175 case PrintSets: 176 { 177 SetTheory Sets; 178 Sets.addFieldExpander("Set", "Elements"); 179 for (Record *Rec : Records.getAllDerivedDefinitions("Set")) { 180 OS << Rec->getName() << " = ["; 181 const std::vector<Record*> *Elts = Sets.expand(Rec); 182 assert(Elts && "Couldn't expand Set instance"); 183 for (Record *Elt : *Elts) 184 OS << ' ' << Elt->getName(); 185 OS << " ]\n"; 186 } 187 break; 188 } 189 case GenCTags: 190 EmitCTags(Records, OS); 191 break; 192 case GenAttributes: 193 EmitAttributes(Records, OS); 194 break; 195 case GenSearchableTables: 196 EmitSearchableTables(Records, OS); 197 break; 198 case GenGlobalISel: 199 EmitGlobalISel(Records, OS); 200 break; 201 case GenRegisterBank: 202 EmitRegisterBank(Records, OS); 203 break; 204 case GenX86EVEX2VEXTables: 205 EmitX86EVEX2VEXTables(Records, OS); 206 break; 207 case GenX86FoldTables: 208 EmitX86FoldTables(Records, OS); 209 break; 210 } 211 212 return false; 213 } 214 } 215 216 int main(int argc, char **argv) { 217 sys::PrintStackTraceOnErrorSignal(argv[0]); 218 PrettyStackTraceProgram X(argc, argv); 219 cl::ParseCommandLineOptions(argc, argv); 220 221 llvm_shutdown_obj Y; 222 223 return TableGenMain(argv[0], &LLVMTableGenMain); 224 } 225 226 #ifdef __has_feature 227 #if __has_feature(address_sanitizer) 228 #include <sanitizer/lsan_interface.h> 229 // Disable LeakSanitizer for this binary as it has too many leaks that are not 230 // very interesting to fix. See compiler-rt/include/sanitizer/lsan_interface.h . 231 LLVM_ATTRIBUTE_USED int __lsan_is_turned_off() { return 1; } 232 #endif // __has_feature(address_sanitizer) 233 #endif // defined(__has_feature) 234