1 //===- TableGen.cpp - Top-Level TableGen implementation -------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // TableGen is a tool which can be used to build up a description of something, 11 // then invoke one or more "tablegen backends" to emit information about the 12 // description in some predefined format. In practice, this is used by the LLVM 13 // code generators to automate generation of a code generator through a 14 // high-level description of the target. 15 // 16 //===----------------------------------------------------------------------===// 17 18 #include "AsmMatcherEmitter.h" 19 #include "AsmWriterEmitter.h" 20 #include "CallingConvEmitter.h" 21 #include "ClangASTNodesEmitter.h" 22 #include "ClangAttrEmitter.h" 23 #include "ClangDiagnosticsEmitter.h" 24 #include "CodeEmitterGen.h" 25 #include "DAGISelEmitter.h" 26 #include "DisassemblerEmitter.h" 27 #include "EDEmitter.h" 28 #include "FastISelEmitter.h" 29 #include "InstrEnumEmitter.h" 30 #include "InstrInfoEmitter.h" 31 #include "IntrinsicEmitter.h" 32 #include "LLVMCConfigurationEmitter.h" 33 #include "NeonEmitter.h" 34 #include "OptParserEmitter.h" 35 #include "Record.h" 36 #include "RegisterInfoEmitter.h" 37 #include "ARMDecoderEmitter.h" 38 #include "SubtargetEmitter.h" 39 #include "TGParser.h" 40 #include "llvm/ADT/OwningPtr.h" 41 #include "llvm/Support/CommandLine.h" 42 #include "llvm/Support/MemoryBuffer.h" 43 #include "llvm/Support/PrettyStackTrace.h" 44 #include "llvm/Support/ToolOutputFile.h" 45 #include "llvm/Support/Signals.h" 46 #include "llvm/Support/system_error.h" 47 #include <algorithm> 48 #include <cstdio> 49 using namespace llvm; 50 51 enum ActionType { 52 PrintRecords, 53 GenEmitter, 54 GenRegisterEnums, GenRegister, GenRegisterHeader, 55 GenInstrEnums, GenInstrs, GenAsmWriter, GenAsmMatcher, 56 GenARMDecoder, 57 GenDisassembler, 58 GenCallingConv, 59 GenClangAttrClasses, 60 GenClangAttrImpl, 61 GenClangAttrList, 62 GenClangAttrPCHRead, 63 GenClangAttrPCHWrite, 64 GenClangAttrSpellingList, 65 GenClangDiagsDefs, 66 GenClangDiagGroups, 67 GenClangDeclNodes, 68 GenClangStmtNodes, 69 GenDAGISel, 70 GenFastISel, 71 GenOptParserDefs, GenOptParserImpl, 72 GenSubtarget, 73 GenIntrinsic, 74 GenTgtIntrinsic, 75 GenLLVMCConf, 76 GenEDInfo, 77 GenArmNeon, 78 GenArmNeonSema, 79 GenArmNeonTest, 80 PrintEnums 81 }; 82 83 namespace { 84 cl::opt<ActionType> 85 Action(cl::desc("Action to perform:"), 86 cl::values(clEnumValN(PrintRecords, "print-records", 87 "Print all records to stdout (default)"), 88 clEnumValN(GenEmitter, "gen-emitter", 89 "Generate machine code emitter"), 90 clEnumValN(GenRegisterEnums, "gen-register-enums", 91 "Generate enum values for registers"), 92 clEnumValN(GenRegister, "gen-register-desc", 93 "Generate a register info description"), 94 clEnumValN(GenRegisterHeader, "gen-register-desc-header", 95 "Generate a register info description header"), 96 clEnumValN(GenInstrEnums, "gen-instr-enums", 97 "Generate enum values for instructions"), 98 clEnumValN(GenInstrs, "gen-instr-desc", 99 "Generate instruction descriptions"), 100 clEnumValN(GenCallingConv, "gen-callingconv", 101 "Generate calling convention descriptions"), 102 clEnumValN(GenAsmWriter, "gen-asm-writer", 103 "Generate assembly writer"), 104 clEnumValN(GenARMDecoder, "gen-arm-decoder", 105 "Generate decoders for ARM/Thumb"), 106 clEnumValN(GenDisassembler, "gen-disassembler", 107 "Generate disassembler"), 108 clEnumValN(GenAsmMatcher, "gen-asm-matcher", 109 "Generate assembly instruction matcher"), 110 clEnumValN(GenDAGISel, "gen-dag-isel", 111 "Generate a DAG instruction selector"), 112 clEnumValN(GenFastISel, "gen-fast-isel", 113 "Generate a \"fast\" instruction selector"), 114 clEnumValN(GenOptParserDefs, "gen-opt-parser-defs", 115 "Generate option definitions"), 116 clEnumValN(GenOptParserImpl, "gen-opt-parser-impl", 117 "Generate option parser implementation"), 118 clEnumValN(GenSubtarget, "gen-subtarget", 119 "Generate subtarget enumerations"), 120 clEnumValN(GenIntrinsic, "gen-intrinsic", 121 "Generate intrinsic information"), 122 clEnumValN(GenTgtIntrinsic, "gen-tgt-intrinsic", 123 "Generate target intrinsic information"), 124 clEnumValN(GenClangAttrClasses, "gen-clang-attr-classes", 125 "Generate clang attribute clases"), 126 clEnumValN(GenClangAttrImpl, "gen-clang-attr-impl", 127 "Generate clang attribute implementations"), 128 clEnumValN(GenClangAttrList, "gen-clang-attr-list", 129 "Generate a clang attribute list"), 130 clEnumValN(GenClangAttrPCHRead, "gen-clang-attr-pch-read", 131 "Generate clang PCH attribute reader"), 132 clEnumValN(GenClangAttrPCHWrite, "gen-clang-attr-pch-write", 133 "Generate clang PCH attribute writer"), 134 clEnumValN(GenClangAttrSpellingList, "gen-clang-attr-spelling-list", 135 "Generate a clang attribute spelling list"), 136 clEnumValN(GenClangDiagsDefs, "gen-clang-diags-defs", 137 "Generate Clang diagnostics definitions"), 138 clEnumValN(GenClangDiagGroups, "gen-clang-diag-groups", 139 "Generate Clang diagnostic groups"), 140 clEnumValN(GenClangDeclNodes, "gen-clang-decl-nodes", 141 "Generate Clang AST declaration nodes"), 142 clEnumValN(GenClangStmtNodes, "gen-clang-stmt-nodes", 143 "Generate Clang AST statement nodes"), 144 clEnumValN(GenLLVMCConf, "gen-llvmc", 145 "Generate LLVMC configuration library"), 146 clEnumValN(GenEDInfo, "gen-enhanced-disassembly-info", 147 "Generate enhanced disassembly info"), 148 clEnumValN(GenArmNeon, "gen-arm-neon", 149 "Generate arm_neon.h for clang"), 150 clEnumValN(GenArmNeonSema, "gen-arm-neon-sema", 151 "Generate ARM NEON sema support for clang"), 152 clEnumValN(GenArmNeonTest, "gen-arm-neon-test", 153 "Generate ARM NEON tests for clang"), 154 clEnumValN(PrintEnums, "print-enums", 155 "Print enum values for a class"), 156 clEnumValEnd)); 157 158 cl::opt<std::string> 159 Class("class", cl::desc("Print Enum list for this class"), 160 cl::value_desc("class name")); 161 162 cl::opt<std::string> 163 OutputFilename("o", cl::desc("Output filename"), cl::value_desc("filename"), 164 cl::init("-")); 165 166 cl::opt<std::string> 167 InputFilename(cl::Positional, cl::desc("<input file>"), cl::init("-")); 168 169 cl::list<std::string> 170 IncludeDirs("I", cl::desc("Directory of include files"), 171 cl::value_desc("directory"), cl::Prefix); 172 173 cl::opt<std::string> 174 ClangComponent("clang-component", 175 cl::desc("Only use warnings from specified component"), 176 cl::value_desc("component"), cl::Hidden); 177 } 178 179 180 static SourceMgr SrcMgr; 181 182 void llvm::PrintError(SMLoc ErrorLoc, const Twine &Msg) { 183 SrcMgr.PrintMessage(ErrorLoc, Msg, "error"); 184 } 185 186 187 188 /// ParseFile - this function begins the parsing of the specified tablegen 189 /// file. 190 static bool ParseFile(const std::string &Filename, 191 const std::vector<std::string> &IncludeDirs, 192 SourceMgr &SrcMgr, 193 RecordKeeper &Records) { 194 OwningPtr<MemoryBuffer> File; 195 if (error_code ec = MemoryBuffer::getFileOrSTDIN(Filename.c_str(), File)) { 196 errs() << "Could not open input file '" << Filename << "': " 197 << ec.message() <<"\n"; 198 return true; 199 } 200 MemoryBuffer *F = File.take(); 201 202 // Tell SrcMgr about this buffer, which is what TGParser will pick up. 203 SrcMgr.AddNewSourceBuffer(F, SMLoc()); 204 205 // Record the location of the include directory so that the lexer can find 206 // it later. 207 SrcMgr.setIncludeDirs(IncludeDirs); 208 209 TGParser Parser(SrcMgr, Records); 210 211 return Parser.ParseFile(); 212 } 213 214 int main(int argc, char **argv) { 215 RecordKeeper Records; 216 217 sys::PrintStackTraceOnErrorSignal(); 218 PrettyStackTraceProgram X(argc, argv); 219 cl::ParseCommandLineOptions(argc, argv); 220 221 222 // Parse the input file. 223 if (ParseFile(InputFilename, IncludeDirs, SrcMgr, Records)) 224 return 1; 225 226 std::string Error; 227 tool_output_file Out(OutputFilename.c_str(), Error); 228 if (!Error.empty()) { 229 errs() << argv[0] << ": error opening " << OutputFilename 230 << ":" << Error << "\n"; 231 return 1; 232 } 233 234 try { 235 switch (Action) { 236 case PrintRecords: 237 Out.os() << Records; // No argument, dump all contents 238 break; 239 case GenEmitter: 240 CodeEmitterGen(Records).run(Out.os()); 241 break; 242 243 case GenRegisterEnums: 244 RegisterInfoEmitter(Records).runEnums(Out.os()); 245 break; 246 case GenRegister: 247 RegisterInfoEmitter(Records).run(Out.os()); 248 break; 249 case GenRegisterHeader: 250 RegisterInfoEmitter(Records).runHeader(Out.os()); 251 break; 252 case GenInstrEnums: 253 InstrEnumEmitter(Records).run(Out.os()); 254 break; 255 case GenInstrs: 256 InstrInfoEmitter(Records).run(Out.os()); 257 break; 258 case GenCallingConv: 259 CallingConvEmitter(Records).run(Out.os()); 260 break; 261 case GenAsmWriter: 262 AsmWriterEmitter(Records).run(Out.os()); 263 break; 264 case GenARMDecoder: 265 ARMDecoderEmitter(Records).run(Out.os()); 266 break; 267 case GenAsmMatcher: 268 AsmMatcherEmitter(Records).run(Out.os()); 269 break; 270 case GenClangAttrClasses: 271 ClangAttrClassEmitter(Records).run(Out.os()); 272 break; 273 case GenClangAttrImpl: 274 ClangAttrImplEmitter(Records).run(Out.os()); 275 break; 276 case GenClangAttrList: 277 ClangAttrListEmitter(Records).run(Out.os()); 278 break; 279 case GenClangAttrPCHRead: 280 ClangAttrPCHReadEmitter(Records).run(Out.os()); 281 break; 282 case GenClangAttrPCHWrite: 283 ClangAttrPCHWriteEmitter(Records).run(Out.os()); 284 break; 285 case GenClangAttrSpellingList: 286 ClangAttrSpellingListEmitter(Records).run(Out.os()); 287 break; 288 case GenClangDiagsDefs: 289 ClangDiagsDefsEmitter(Records, ClangComponent).run(Out.os()); 290 break; 291 case GenClangDiagGroups: 292 ClangDiagGroupsEmitter(Records).run(Out.os()); 293 break; 294 case GenClangDeclNodes: 295 ClangASTNodesEmitter(Records, "Decl", "Decl").run(Out.os()); 296 ClangDeclContextEmitter(Records).run(Out.os()); 297 break; 298 case GenClangStmtNodes: 299 ClangASTNodesEmitter(Records, "Stmt", "").run(Out.os()); 300 break; 301 case GenDisassembler: 302 DisassemblerEmitter(Records).run(Out.os()); 303 break; 304 case GenOptParserDefs: 305 OptParserEmitter(Records, true).run(Out.os()); 306 break; 307 case GenOptParserImpl: 308 OptParserEmitter(Records, false).run(Out.os()); 309 break; 310 case GenDAGISel: 311 DAGISelEmitter(Records).run(Out.os()); 312 break; 313 case GenFastISel: 314 FastISelEmitter(Records).run(Out.os()); 315 break; 316 case GenSubtarget: 317 SubtargetEmitter(Records).run(Out.os()); 318 break; 319 case GenIntrinsic: 320 IntrinsicEmitter(Records).run(Out.os()); 321 break; 322 case GenTgtIntrinsic: 323 IntrinsicEmitter(Records, true).run(Out.os()); 324 break; 325 case GenLLVMCConf: 326 LLVMCConfigurationEmitter(Records).run(Out.os()); 327 break; 328 case GenEDInfo: 329 EDEmitter(Records).run(Out.os()); 330 break; 331 case GenArmNeon: 332 NeonEmitter(Records).run(Out.os()); 333 break; 334 case GenArmNeonSema: 335 NeonEmitter(Records).runHeader(Out.os()); 336 break; 337 case GenArmNeonTest: 338 NeonEmitter(Records).runTests(Out.os()); 339 break; 340 case PrintEnums: 341 { 342 std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class); 343 for (unsigned i = 0, e = Recs.size(); i != e; ++i) 344 Out.os() << Recs[i]->getName() << ", "; 345 Out.os() << "\n"; 346 break; 347 } 348 default: 349 assert(1 && "Invalid Action"); 350 return 1; 351 } 352 353 // Declare success. 354 Out.keep(); 355 return 0; 356 357 } catch (const TGError &Error) { 358 errs() << argv[0] << ": error:\n"; 359 PrintError(Error.getLoc(), Error.getMessage()); 360 361 } catch (const std::string &Error) { 362 errs() << argv[0] << ": " << Error << "\n"; 363 } catch (const char *Error) { 364 errs() << argv[0] << ": " << Error << "\n"; 365 } catch (...) { 366 errs() << argv[0] << ": Unknown unexpected exception occurred.\n"; 367 } 368 369 return 1; 370 } 371