1 //===- TableGen.cpp - Top-Level TableGen implementation for LLVM ----------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the main function for LLVM's TableGen. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "TableGenBackends.h" // Declares all backends. 15 #include "llvm/Support/CommandLine.h" 16 #include "llvm/Support/ManagedStatic.h" 17 #include "llvm/Support/PrettyStackTrace.h" 18 #include "llvm/Support/Signals.h" 19 #include "llvm/TableGen/Error.h" 20 #include "llvm/TableGen/Main.h" 21 #include "llvm/TableGen/Record.h" 22 #include "llvm/TableGen/SetTheory.h" 23 24 using namespace llvm; 25 26 enum ActionType { 27 PrintRecords, 28 GenEmitter, 29 GenRegisterInfo, 30 GenInstrInfo, 31 GenAsmWriter, 32 GenAsmMatcher, 33 GenDisassembler, 34 GenPseudoLowering, 35 GenCallingConv, 36 GenDAGISel, 37 GenDFAPacketizer, 38 GenFastISel, 39 GenSubtarget, 40 GenIntrinsic, 41 GenTgtIntrinsic, 42 PrintEnums, 43 PrintSets, 44 GenOptParserDefs, 45 GenCTags, 46 GenAttributes, 47 GenSearchableTables, 48 }; 49 50 namespace { 51 cl::opt<ActionType> 52 Action(cl::desc("Action to perform:"), 53 cl::values(clEnumValN(PrintRecords, "print-records", 54 "Print all records to stdout (default)"), 55 clEnumValN(GenEmitter, "gen-emitter", 56 "Generate machine code emitter"), 57 clEnumValN(GenRegisterInfo, "gen-register-info", 58 "Generate registers and register classes info"), 59 clEnumValN(GenInstrInfo, "gen-instr-info", 60 "Generate instruction descriptions"), 61 clEnumValN(GenCallingConv, "gen-callingconv", 62 "Generate calling convention descriptions"), 63 clEnumValN(GenAsmWriter, "gen-asm-writer", 64 "Generate assembly writer"), 65 clEnumValN(GenDisassembler, "gen-disassembler", 66 "Generate disassembler"), 67 clEnumValN(GenPseudoLowering, "gen-pseudo-lowering", 68 "Generate pseudo instruction lowering"), 69 clEnumValN(GenAsmMatcher, "gen-asm-matcher", 70 "Generate assembly instruction matcher"), 71 clEnumValN(GenDAGISel, "gen-dag-isel", 72 "Generate a DAG instruction selector"), 73 clEnumValN(GenDFAPacketizer, "gen-dfa-packetizer", 74 "Generate DFA Packetizer for VLIW targets"), 75 clEnumValN(GenFastISel, "gen-fast-isel", 76 "Generate a \"fast\" instruction selector"), 77 clEnumValN(GenSubtarget, "gen-subtarget", 78 "Generate subtarget enumerations"), 79 clEnumValN(GenIntrinsic, "gen-intrinsic", 80 "Generate intrinsic information"), 81 clEnumValN(GenTgtIntrinsic, "gen-tgt-intrinsic", 82 "Generate target intrinsic information"), 83 clEnumValN(PrintEnums, "print-enums", 84 "Print enum values for a class"), 85 clEnumValN(PrintSets, "print-sets", 86 "Print expanded sets for testing DAG exprs"), 87 clEnumValN(GenOptParserDefs, "gen-opt-parser-defs", 88 "Generate option definitions"), 89 clEnumValN(GenCTags, "gen-ctags", 90 "Generate ctags-compatible index"), 91 clEnumValN(GenAttributes, "gen-attrs", 92 "Generate attributes"), 93 clEnumValN(GenSearchableTables, "gen-searchable-tables", 94 "Generate generic binary-searchable table"))); 95 96 cl::opt<std::string> 97 Class("class", cl::desc("Print Enum list for this class"), 98 cl::value_desc("class name")); 99 100 bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) { 101 switch (Action) { 102 case PrintRecords: 103 OS << Records; // No argument, dump all contents 104 break; 105 case GenEmitter: 106 EmitCodeEmitter(Records, OS); 107 break; 108 case GenRegisterInfo: 109 EmitRegisterInfo(Records, OS); 110 break; 111 case GenInstrInfo: 112 EmitInstrInfo(Records, OS); 113 break; 114 case GenCallingConv: 115 EmitCallingConv(Records, OS); 116 break; 117 case GenAsmWriter: 118 EmitAsmWriter(Records, OS); 119 break; 120 case GenAsmMatcher: 121 EmitAsmMatcher(Records, OS); 122 break; 123 case GenDisassembler: 124 EmitDisassembler(Records, OS); 125 break; 126 case GenPseudoLowering: 127 EmitPseudoLowering(Records, OS); 128 break; 129 case GenDAGISel: 130 EmitDAGISel(Records, OS); 131 break; 132 case GenDFAPacketizer: 133 EmitDFAPacketizer(Records, OS); 134 break; 135 case GenFastISel: 136 EmitFastISel(Records, OS); 137 break; 138 case GenSubtarget: 139 EmitSubtarget(Records, OS); 140 break; 141 case GenIntrinsic: 142 EmitIntrinsics(Records, OS); 143 break; 144 case GenTgtIntrinsic: 145 EmitIntrinsics(Records, OS, true); 146 break; 147 case GenOptParserDefs: 148 EmitOptParser(Records, OS); 149 break; 150 case PrintEnums: 151 { 152 for (Record *Rec : Records.getAllDerivedDefinitions(Class)) 153 OS << Rec->getName() << ", "; 154 OS << "\n"; 155 break; 156 } 157 case PrintSets: 158 { 159 SetTheory Sets; 160 Sets.addFieldExpander("Set", "Elements"); 161 for (Record *Rec : Records.getAllDerivedDefinitions("Set")) { 162 OS << Rec->getName() << " = ["; 163 const std::vector<Record*> *Elts = Sets.expand(Rec); 164 assert(Elts && "Couldn't expand Set instance"); 165 for (Record *Elt : *Elts) 166 OS << ' ' << Elt->getName(); 167 OS << " ]\n"; 168 } 169 break; 170 } 171 case GenCTags: 172 EmitCTags(Records, OS); 173 break; 174 case GenAttributes: 175 EmitAttributes(Records, OS); 176 break; 177 case GenSearchableTables: 178 EmitSearchableTables(Records, OS); 179 break; 180 } 181 182 return false; 183 } 184 } 185 186 int main(int argc, char **argv) { 187 sys::PrintStackTraceOnErrorSignal(argv[0]); 188 PrettyStackTraceProgram X(argc, argv); 189 cl::ParseCommandLineOptions(argc, argv); 190 191 llvm_shutdown_obj Y; 192 193 return TableGenMain(argv[0], &LLVMTableGenMain); 194 } 195 196 #ifdef __has_feature 197 #if __has_feature(address_sanitizer) 198 #include <sanitizer/lsan_interface.h> 199 // Disable LeakSanitizer for this binary as it has too many leaks that are not 200 // very interesting to fix. See compiler-rt/include/sanitizer/lsan_interface.h . 201 int __lsan_is_turned_off() { return 1; } 202 #endif // __has_feature(address_sanitizer) 203 #endif // defined(__has_feature) 204